MPQ4210GU-AEC1-Z

MPQ4210 40V, 100W Synchronous Buck-Boost Controller with I2C and Current Monitor, AEC-Q100 Qualified DESCRIPTION FEATURES The MPQ4210 is a synchronous, four-switch, buck-boost controller capable of regulating different output voltages with a wide input voltage range and high efficiency. It provides an I2C interface, which supports VOUT voltage programmability, VOUT slew-rate control, and output constant current limit programmability, making the MPQ4210 suitable for USB power delivery (PD) design in USB Type-C power supplies.    The MPQ4210 uses valley current control in buck mode and peak current control in boost mode, providing fast load transient response and smooth buck-boost mode transient. The MPQ4210 provides forced continuous conduction mode (FCCM) and a programmable average current limit, which supports flexible designs for different applications. It also features programmable over-current protection (OCP) mode, programmable overvoltage protection (OVP) mode, and programmable VIN UVLO hysteresis. The MPQ4210 is available in a QFN-27 (5mmx5mm) package.            6V to 40V Start-Up Input Voltage Range 5V to 40V Operation Input Voltage Range Flexible I2C Interface Control for: o 0.5V to 28V Output Voltage Range o 0.3V to 2.047V Reference Voltage Range with 1mV Step o Selectable VOUT Slew Rate o Programmable Constant Current Limit Output Current Monitor Function (IMON) Programmable Soft-Start Time Switching Frequency Spread Spectrum for EMI Optimization Integrated VOUT Discharge Function Selectable 200kHz, 300kHz, 400kHz, and 600kHz Switching Frequency Forced CCM Operation Mode Programmable VIN UVLO Hysteresis OCP, SCP, and OVP Interrupt Indicator for OCP, OVP, and PNG Available in a QFN-27 (5mmx5mm) Package with Wettable Flank AEC-Q100 Qualified APPLICATIONS    USB Power Delivery Industrial PC Power Supplies Super-Capacitor Charging All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries. MPQ4210 Rev. 1.1 www.MonolithicPower.com 7/12/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 1 MPQ4210 – 40V, SYNCHRONOUS BUCK-BOOST CONTROLLER WITH I2C TYPICAL APPLICATION VIN R3 VIN VOUT C1 VCC C7 BST1 C8 VOUT MPQ4210 SDA SWB LG1 SWC R4 CSN FB IMON C12 C2B C4 ADDR R2 C2A CSP INT R1 SWD VOUT SW1 EN SCL SWA HG1 AVDD 5V/9V/ 15V/20V LG2 SS BST2 C9 C3 SW2 HG2 COMP PGND C10 AGND R16 IAVGP IAVGN MPQ4210 Rev. 1.1 www.MonolithicPower.com 7/12/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 2 MPQ4210 – 40V, SYNCHRONOUS BUCK-BOOST CONTROLLER WITH I2C ORDERING INFORMATION Part Number MPQ4210GU-AEC1* Package QFN-27 (5mmx5mm) Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MPQ4210GU–AEC1-Z). TOP MARKING MPS: MPS prefix YY: Year code WW: Week code MP4210: Part number LLLLLLL: Lot number EVALUATION KIT EVKT-MPQ4210 EVKT-MPQ4210 Kit contents: (Items below can be ordered separately). # 1 2 Part Number EVQ4210-U-00B EVKT-USBI2C-02BAG Item MPQ4210GU Evaluation Board Includes USB to I2C Communication interface device, USB Cable, and Ribbon Cable Quantity 1 1 Order direct from MonolithicPower.com or our distributors. Figure A-1: EVKT-MPQ4210 Evaluation Kit Set-Up MPQ4210 Rev. 1.1 www.MonolithicPower.com 7/12/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 3 MPQ4210 – 40V, SYNCHRONOUS BUCK-BOOST CONTROLLER WITH I2C PACKAGE REFERENCE TOP VIEW QFN-27 (5mmx5mm) PIN FUNCTIONS Pin # 1 2 3 Name ADDR SDA SCL 4 INT 5 IMON 6 CSP 7 CSN 8 9 AVDD AGND 10 COMP 11 12 FB SS 13 IAVGN Description I2C slave address set pin. I2C data signal. I2C clock signal. Interrupt for PNG, OCP, OTP and OVP events. In default set-up, INT is masked off for response to a PNG event. It is an open-drain output, and is pulled low when an interrupt event occurs, recovering to open drain when the fault is cleared. INT is an open drain when the IC is not enabled. Current monitor output. Represents the signal between IAVGP and IAVGN. Positive input of the switching current-sense signal. Connect to the high side of the current-sense resistor. Negative input of the switching current-sense signal. Connect to the low side of the current-sense resistor. 5V internal control circuit bias supply. Decouple with a ≥2.2μF capacitor. Analog ground. Internal error amplifier output pin. Connect a capacitor and resistor in series to AGND for loop compensation. VOUT voltage feedback pin. Connect a resistor divider from VOUT to FB. Soft-start set pin. Sets the hiccup off-time period. Connect an external capacitor to SS. Negative terminal of average current limit sense input. The IAVGN and IAVGP pins can only be used for the output current limit setting by connecting to the positive terminal of the output rail. MPQ4210 Rev. 1.1 www.MonolithicPower.com 7/12/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 4 MPQ4210 – 40V, SYNCHRONOUS BUCK-BOOST CONTROLLER WITH I2C PIN FUNCTIONS (continued) Pin # 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Name Description Positive terminal of average current limit sense input. The IAVGN and IAVGP pins IAVGP can only be used for the output current limit setting by connecting to the positive terminal of the output rail. Voltage sense input. Supplies power to VCC based on VCC power logic. Connect to VOUT the output capacitor. Boost switch node of the converter. Connect to the source of SWD and the drain of SW2 SWC. HG2 Boost high-side MOSFET gate driver pin. Connect directly to the gate of SWD. Bootstrap power pin for boost high-side MOSFET gate driver. Connect one BST2 capacitor between BST2 and SW2. BST2 is supplied by VCC or BST1. LG2 Boost high-side MOSFET gate driver pin. Connect directly to the gate of SWC. PGND Power ground. Gate-driving current return pin. Driver circuit and internal bias supply. Powered by VIN or VOUT. Decouple with a VCC ≥2.2μF ceramic capacitor as close to this pin as possible. LG1 Buck low-side MOSFET gate driver pin. Connect directly to the gate of the SWB. Bootstrap power pin for buck high-side MOSFET gate driver. Supplied by VCC or BST1 BST2. Connect one capacitor between BST1 and SW1. HG1 Buck high-side MOSFET gate driver pin. Connect directly to the gate of SWA. Buck switch node of the converter. Connect to the source of SWA and the drain of SW1 SWB. VIN VIN power supply and voltage sense input. Chip enable control pin. If not used, connect EN to the input source for automatic startEN up. EN can also program VIN UVLO. Do not float this pin. Exposed Pad Connect to ground. MPQ4210 Rev. 1.1 www.MonolithicPower.com 7/12/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 5 MPQ4210 – 40V, SYNCHRONOUS BUCK-BOOST CONTROLLER WITH I2C ABSOLUTE MAXIMUM RATINGS (1) VIN, EN ......................................... -0.3V to +45V VOUT, IAVGP, IAVGN ................. -0.3V to +30V VCC .............................................. -0.3V to +8.5V SW1, SW2 ........................................................... ............ -1V to +45V (-5V to +50V for VOUT) When VIN is significantly higher than VOUT, the MPQ4210 works in buck mode. SWA and SWB switch during buck regulation; while SWC is off, SWD remains on to conduct the inductor current. tBUC K-BOOS T tBUC K-BOOS T Figure 4: Buck-Boost Waveform If VIN is close to VOUT, buck-boost mode engages, and one boost switching is inserted into each buck switching period. The MOSFET turn-on sequence is: SWA&SWD  SWA&SWC  SWA&SWD  SWB&SWD. Then the inductor current can meet the COMP voltage requirement, and supply enough current to output. In each cycle of buck mode, SWA turns on when the FB voltage (VFB) drops below the reference voltage (VREF). After SWA turns off, SWB turns on to conduct the inductor current until it triggers MPQ4210 Rev. 1.1 www.MonolithicPower.com 7/12/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 21 MPQ4210 – 40V, SYNCHRONOUS BUCK-BOOST CONTROLLER WITH I2C Power Supply The MPQ4210’s internal circuit is powered by 5.2V AVDD, while the gate drivers are powered by 7.2V VCC. VCC is regulated from VIN and VOUT, while AVDD is powered by VCC. When VIN power is supplied and EN is high, the MPQ4210 tries to regulate VCC at 7.2V, and at the same time AVDD is regulated to 5.2V. When AVDD rises above the UVLO voltage, the part starts switching if ENPWR is high, and regulates VOUT by soft-start control. If VIN and VOUT are both above 8.8V, the MPQ4210 powers VCC from whichever is the lower voltage source to reduce power-loss. Otherwise, it powers VCC from the higher voltage power source of VIN and VOUT to get enough VCC voltage. VCC and BST have separate UVLO, which keeps the gate signal off. VCC and BST should have enough voltage to enable MPQ4210 switching, except for AVDD UVLO. The MPQ4210 operates within a 6V to 40V input voltage range. When VCC is powered from VOUT after start-up, the part works until VIN drops below 5V. When the MPQ4210 is powered off by AVDD_UVLO or the EN signal, the I2C interface cannot respond to the host, and COMP is immediately pulled low. The VCC, AVDD, and BST voltages drop slowly with leakage, but all logic is off. Start-Up When the MPQ4210 is enabled, it starts switching with soft-start (SS) control. The SS circuit charges current to the SS pin and ramps the SS voltage up from 0V. It then feeds to the error amplifier to control output voltage. After the SS signal rises to the programmed reference voltage (set by VREF bits), soft start completes and closed-loop regulation starts. The SS voltage rises and clamps at 0.6V higher than VREF in steady state, unless a protection is triggered. Normally the MPQ4210 starts with buck switching after start-up because VOUT is much lower than VIN. If there is some bias voltage on VOUT, the part will not switch until the SS signal rises above VFB, which is proportional to the VOUT bias voltage. During SS, the IC works in auto PFM mode. OVP and hiccup-OCP do not work during the SS period. Enable (EN) and Programmable UVLO The EN pin enables and disables the MPQ4210. When applying a voltage higher than the EN high threshold (>1.1V), the part starts up some of the internal circuits (micro-power mode). If the EN voltage exceeds the turn-on threshold (1.35V), the MPQ4210 enables all functions and starts switching operation. Switching operation is disabled when the EN voltage falls below its lower threshold (