MPQ4313
45V, 3A, Low IQ Synchronous Step-Down
Converter with Frequency Spread Spectrum,
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ4313 is a frequency-programmable,
synchronous, step-down switching regulator with
integrated internal high-side and low-side power
MOSFET. It provides up to 3A of highly efficient
output, with current mode control for fast loop
response.
•
•
•
•
•
The wide 3.3V to 45V input voltage range
accommodates a variety of step-down
applications in an automotive input environment.
A 1.7μA shutdown mode quiescent current
allows the part to be used in battery-powered
applications. High power conversion efficiency
over a wide load range is achieved by scaling
down the switching frequency in light-load
conditions to reduce the switching and gate
driver losses.
•
An open-drain power good signal indicates
whether the output is within 95% to 105% of its
nominal voltage.
Frequency foldback helps prevent inductor
current runaway during start-up. Thermal
shutdown provides reliable, fault-tolerant
operation. High-duty cycle and low-dropout
mode are provided for automotive cold crank
conditions.
•
•
•
•
•
•
•
•
•
•
•
•
Wide 3.3V to 45V Operating Range
3A Continuous Output Current
1.7μA Low Shutdown Supply Current
18μA Sleep Mode Quiescent Current
Internal 48mΩ High-Side and 20mΩ LowSide MOSFETs
350kHz to 1000kHz Programmable
Switching Frequency for Car Battery
Applications
Switching Frequency Can Be Synchronized
to External Clock
Out-of-Phase Synchronized Clock Output
3.3V, 5V Fixed Output Options
Frequency Spread Spectrum (FSS) for Low
EMI
Symmetric VIN for Low EMI
Power Good Output
External Soft Start
100ns Minimum On Time
Selectable Advanced Asynchronous Mode
(AAM) or Forced Continuous Conduction
Mode (FCCM)
Low-Dropout Mode
Hiccup Over-Current Protection
Available in a QFN-20 (4mmx4mm)
Package
Available in a Wettable Flank Package
Available in AEC-Q100 Grade 1
The MPQ4313 is available in a QFN-20
(4mmx4mm) package.
•
•
MPQ4313 FAMILY VERSIONS
APPLICATIONS
Part
Number
MPQ4312
MPQ4313
MPQ4314
MPQ4315
MPQ4316
MPQ4317
Output
Current
2A
3A
4A
5A
6A
7A
Package Options
QFN-20 (4mmx4mm)
WF (1)
•
•
•
•
Automotive Infotainment
Automotive Clusters
Advanced Driver Assistance Systems
Industrial Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit the MPS website under Quality
Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
Note:
1)
“WF” means wettable flank.
MPQ4313 Rev. 1.1
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11/8/2022
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© 2022 MPS. All Rights Reserved.
1
MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL APPLICATION
VIN
3.3V to
45V
Efficiency vs. Load Current
BST
100
MODE
SYNCO
80
SW
MPQ4313
FREQ
FB
PG
VCC
NC
SYNCIN
SS
EFFICIENCY (%)
VOUT
VOUT = 3.3V, fSW = 470kHz, L = 5.6μH,
AAM
EN
VIN
60
40
VIN=12V
VIN=24V
VIN=36V
VIN=45V
20
GND
0
Adjustable Output Version
VIN
3.3V to
45V
100
1000
LOAD CURRENT (mA)
3000
EN
VIN
BST
VOUT
10
MODE
SYNCO
SW
MPQ4313
FREQ
FB
PG
VCC
NC
SYNCIN
SS
GND
Fixed Output Version
MPQ4313 Rev. 1.1
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© 2022 MPS. All Rights Reserved.
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
ORDERING INFORMATION
Part Number*
MPQ4313GRE-AEC1***
Package
Top Marking
MSL Rating**
MPQ4313GRE-33-AEC1***
QFN-20 (4mmx4mm)
See Below
1
MPQ4313GRE-5-AEC1***
* For Tape & Reel, add suffix -Z (e.g. MPQ4313GRE-AEC1-Z).
** Moisture Sensitivity Level Rating
*** Wettable flank
TOP MARKING
MPS: MPS prefix
Y: Year code
WW: Week code
MP4313: Part number
LLLLLL: Lot number
E: Wettable flank
PACKAGE REFERENCE
TOP VIEW
20
SS
FB
19
18
NC
17
16
15
MODE
SYNCIN
14
2
13
VIN
3
12
VIN
PGND
4
11
PGND
PGND
5
10
6
7
8
9
BST
SW
SW
EN
QFN-20 (4mmx4mm)
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
PIN FUNCTIONS
Pin #
Name
1
MODE
2
SYNCIN
3, 12
VIN
4, 5, 10, 11
PGND
6
BST
7, 8
SW
9
EN
13
SYNCO
14
PG
15
NC
16
VCC
17
AGND
18
FB
19
SS
20
FREQ
Description
AAM or FCCM selection pin. Pull this pin high to put the part in forced continuous
conduction mode (FCCM), and pull it low for AAM at light-load. Do not leave this pin
floating.
SYNC input. Apply a 350kHz to 1000kHz clock signal to this pin to synchronize the
internal oscillator frequency to the external clock. SYNCIN has an internally high
impedance. Do not float the pin under any circumstances. If used, ensure that the
external sync clock has adequate pull-up and pull-down capability. It is recommended to
place a ≤51kΩ resistor between SYNCIN and GND in case the external sync clock’s pulldown capability is insufficient or SYNCIN enters a high-impedance state.
Input supply. VIN supplies power to all the internal control circuitry and the power switch
connected to SW. A decoupling capacitor to ground is recommended to be placed close
to VIN to minimize switching spikes.
Power ground.
Bootstrap. BST is the positive power supply for the high-side MOSFET driver connected
to SW. Connect a bypass capacitor between this BST and SW.
Switch node. SW is the output of the internal power switch.
Enable. Pull this pin below the specified threshold (0.85V) to shut down the chip. Pull it
above the specified threshold (1V) to enable the chip.
SYNC output. Output a clock signal to be 180° out-of-phase from the internal oscillator
signal or to be opposite from the clock signal applied at the SYNCIN pin. Leave this pin
floating if not used.
Power good indicator. The output of PG is an open drain; if this pin is used, a pull-up
resistor to the power source is required. It goes high if the output voltage is within 95%
to 105% of the nominal voltage, and goes low if the output voltage is above 106.5% or
below 93.5% of the nominal voltage.
Not connected. Connect this pin to the VCC pin or VOUT, which must be no less than
3V. Do not float this pin.
Bias supply. This supplies power to the internal control circuit and gate drivers. A
decoupling capacitor to ground must be placed close to this pin. To calculate the size of
this capacitor, see the Setting the VCC Capacitor section on page 31.
Analog ground.
Feedback input. For the adjustable output version, connect FB to the center point of the
external resistor divider from the output to AGND to set the output voltage. The feedback
threshold voltage is 0.815V. Place the resistor divider as close to FB as possible. For
the fixed output version, connect the FB pin directly to the output. Avoid placing vias on
the FB traces.
Soft-start input. Place a capacitor from SS to GND to set the soft-start period. The
MPQ4313 sources 6µA from SS to the soft-start capacitor at start-up. As the SS voltage
rises, the feedback threshold voltage increases to limit inrush current during start-up.
Switching frequency program. Connect a resistor from this pin to ground to set the
switching frequency. Follow the fSW vs. RFREQ curve in TYPICAL PERFORMANCE
CHARACTERISTICS (TPC) section to set the frequency.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (2)
Thermal Resistance
VIN, EN .........................................-0.3V to +50V
SW ................................ -0.3V to VIN(MAX) + 0.3V
BST .................................................. VSW + 6V (3)
All other pins ................................-0.3V to +5.5V
Continuous power dissipation (TA = 25°C) (4) (6)
QFN-20 (4mmx4mm) ................................. 5.4W
Junction temperature ................................150°C
Lead temperature .....................................260°C
Storage temperature ................ -65°C to +150°C
QFN-20 (4mmx4mm)
JESD51-7 (5).............................44.........9....°C/W
EVQ4313-R-00A (6)..................23.......2.5...°C/W
Electrostatic Discharge (ESD) Rating
Human body model (HBM)........................ ±2kV
Charged device model (CDM) ................ ±750V
Recommended Operating Conditions
Supply voltage (VIN) ......................... 3.3V to 45V
Output voltage (VOUT).........0.815V to 0.95V x VIN
Operating junction temp (TJ) .... -40°C to +150°C
Notes:
2) Exceeding these ratings may damage the device.
3) Rated under room temperature.
4) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
5) Measured on JESD51-7, a 4-layer PCB. The values given in
this table are only valid for comparison with other packages and
cannot be used for design purposes. These values were
calculated in accordance with JESD51-7, and simulated on a
specified JEDEC board. They do not represent the
performance obtained in an actual application.
6) Measured on standard MPS EVB, a 2oz copper thickness, 4layer PCB (9cmx9cm).
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Units
VIN UVLO rising threshold
INUVLO_RISING
2.8
3.0
3.2
V
VIN UVLO falling threshold
INUVLO_FALLING
2.5
2.7
2.9
V
VIN UVLO hysteresis
VCC voltage
INUVLO_HYS
VCC
VCC regulation
VCC current limit
VIN quiescent current
VIN quiescent current (switching)
(7)
ILIMIT_VCC
IQ
IQ_ACTIVE
ISHDN
FB reference voltage
VFB
Output voltage accuracy of
MPQ4313-33
VOUT
Output voltage accuracy of
MPQ4313-5
VOUT
LS valley current limit
IVCC = 0A
4.6
IVCC = 30mA
VIN shutdown current
FB current
Switching frequency
Minimum on time (7)
Minimum off time (7)
SYNCIN voltage rising threshold
SYNCIN voltage falling threshold
SYNCIN clock range
SYNCO high voltage
SYNCO low voltage
SYNCO phase shift
HS current limit
280
IFB
fSW
VCC = 4V
VFB = 0.85V
RFREQ = 62kΩ
807
799
3234
3201
4900
4850
-50
420
V
1
4
%
mA
26
μA
20
μA
40
mA
9.5
mA
1.7
2.5
μA
815
815
3300
3300
5000
5000
0
470
100
80
823
831
3366
3399
5100
5150
+50
520
350
3.3
4.5
4.4
180
5.5
7.2
mV
mV
mV
mV
mV
mV
nA
kHz
ns
ns
V
V
kHz
V
V
deg
A
3.2
4
4.8
A
tON_MIN
tOFF_MIN
VSYNC_RISING
VSYNC_FALLING
fSYNC
External clock
VSYNCO_HIGH ISYNCO = -1mA
VSYNCO_LOW ISYNCO = 1mA
Tested with SYNCIN
Duty cycle = 30%
ILIMIT_VALLEY
5.2
18
EN = 0V
TJ = 25°C
4.9
100
FB = 0.85V, no load,
sleep mode
MODE = GND (AAM),
switching, no load,
RFB_UP = 1MΩ,
RFB_DOWN = 316kΩ
MODE = high (FCCM),
switching, fSW = 2MHz,
no load
MODE = high (FCCM),
switching, fSW = 470kHz,
no load
VIN = 3.3V to 45V, TJ = 25°C
VIN = 3.3V to 45V
TJ = 25°C
mV
1.8
0.4
1000
0.4
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameter
ZCD current
LS reverse current limit
Symbol
IZCD
ILIMIT_REVERSE
Switch leakage current
ISW_LKG
HS switch on resistance
LS switch on resistance
Soft-start current
RON_HS
RON_LS
ISS
Condition
AAM
FCCM
VBST - VSW = 5V
VCC = 5V
VSS = 0V
Min
-0.15
2.0
Typ
0.10
4.5
Max
+0.35
7.0
Units
A
A
0.01
1
µA
4
48
20
6
80
40
8.5
mΩ
mΩ
µA
EN rising threshold
VEN_RISING
0.8
1.0
1.2
V
EN falling threshold
VEN_FALLING
0.65
0.85
1.05
V
EN hysteresis voltage
VEN_HYS
MODE rising threshold
VMODE_RISING
MODE falling threshold
VMODE_FALLING
PG rising threshold (VFB / VREF)
PGRISING
PG falling threshold (VFB / VREF)
PGFALLING
PG output voltage low
PG rising delay
PG falling delay
(7)
Thermal shutdown
Thermal shutdown hysteresis (7)
VPG_LOW
190
mV
1.8
VFB rising
VFB falling
VFB falling
VFB rising
ISINK = 1mA
92%
102%
90.5%
103.5%
V
0.4
V
95%
105%
93.5%
106.5%
98%
108%
96.5%
109.5%
VREF
0.1
0.3
V
tPG_R_DELAY
35
µs
tPG_F_DELAY
35
µs
TSD
170
20
°C
°C
TSD_HYS
Note:
7) Derived from bench characterization. Not tested in production.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
IQ vs. Temperature
VFB vs. Temperature
0.818
23
22
0.817
0.816
20
VFB (V)
IQ (μA)
21
19
0.815
18
0.814
17
0.813
16
15
0.812
-50
-25
0
25
50
75
100
125
-50
-25
TEMPERATURE (°C)
5.6
125
100
125
4.4
4.2
ILIMIT_VALLEY (A)
5.5
ILIMIT (A)
100
Valley Current Limit vs.
Temperature
ILIMIT vs. Temperature
5.4
5.3
4.0
3.8
3.6
5.2
3.4
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
Reverse Current Limit vs.
Temperature
-25
0
25
50
75
TEMPERATURE (°C)
VIN UVLO Threshold vs.
Temperature
4.8
VIN UVLO THRESHOLD (V)
3.1
4.7
ILIMIT_REVERSE (A)
0
25
50
75
TEMPERATURE (°C)
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.0
2.9
2.8
VIN UVLO Rising
VIN UVLO Falling
2.7
2.6
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
8
MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
EN UVLO Threshold vs.
Temperature
PG Rising/Falling Threshold vs.
Temperature
PG THRESHOLD (%VREF)
1.05
EN UVLO (V)
1.00
0.95
EN UVLO Rising
EN UVLO Falling
0.90
0.85
0.80
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
110
108
106
104
102
100
98
96
94
92
90
88
125
-50
VIN Shutdown Current vs.
Temperature
Falling Threshold
Rising Threshold
Rising Threshold
Falling Threshold
0
25
50
75
TEMPERATURE (°C)
100
125
100
125
100
125
RHS_ON vs. Temperature
65
RHS_ON (mΩ)
2.0
ISHDN (μA)
-25
Upper
Lower
Upper
Lower
70
2.1
1.9
1.8
1.7
60
55
50
45
1.6
40
1.5
35
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
RLS_ON vs. Temperature
-25
0
25
50
75
TEMPERATURE (°C)
VCC vs. Temperature
30
4.96
28
4.94
26
VCC (V)
RLS_ON (mΩ)
PG
PG
PG
PG
24
22
4.92
4.90
20
4.88
18
16
4.86
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Soft-Start Current vs. Temperature
ZCD vs. Temperature
6.6
110
6.4
105
ZCD (mA)
ISS (μA)
6.2
6.0
5.8
5.6
100
95
90
85
5.4
80
5.2
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
fSW vs. Temperature
RFREQ = 62kΩ
473
472
fSW (kHz)
471
470
469
468
467
466
465
-50
-25
0
25
50
75
TEMPERATURE (°C)
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 5.6µH (8), COUT = 94µF, fSW = 470kHz, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
FCCM
100
100
80
80
EFFICIENCY (%)
EFFICIENCY (%)
AAM
60
40
VIN=12V
VIN=24V
VIN=36V
VIN=45V
20
100
1000
LOAD CURRENT (mA)
40
0
3000
10
Efficiency vs. Load Current
80
80
60
40
VIN=12V
VIN=24V
VIN=36V
VIN=45V
EFFICIENCY (%)
EFFICIENCY (%)
100
100
1000
LOAD CURRENT (mA)
60
40
VIN=12V
VIN=24V
VIN=36V
VIN=45V
20
0
0
3000
10
Load Regulation
100
1000
LOAD CURRENT (mA)
3000
Load Regulation
AAM
FCCM
0.100
0.015
0.080
0.012
0.060
0.040
0.020
0.000
-0.020
LOAD REGULATION (%)
LOAD REGULATION (%)
3000
FCCM, VOUT = 5V
100
10
100
1000
LOAD CURRENT (mA)
Efficiency vs. Load Current
AAM, VOUT = 5V
20
VIN=12V
VIN=24V
VIN=36V
VIN=45V
20
0
10
60
Vin=12V
Vin=24V
Vin=36V
Vin=45V
0.009
0.006
0.003
0.000
-0.003
Vin=12V
Vin=24V
Vin=36V
Vin=45V
-0.040
-0.060
-0.080
-0.100
10
100
1000
LOAD CURRENT (mA)
3000
-0.006
-0.009
-0.012
-0.015
10
100
1000
LOAD CURRENT (mA)
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3000
11
MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6µH (8), COUT = 94µF, fSW = 470kHz, TA = 25°C, unless otherwise noted.
Load Regulation
Load Regulation
FCCM, VOUT = 5V
0.100
0.015
0.080
0.012
LOAD REGULATION (%)
LOAD REGULATION (%)
AAM, VOUT = 5V
0.060
0.040
0.020
0.000
-0.020
0.006
0.003
0.000
-0.003
Vin=12V
Vin=24V
Vin=36V
Vin=45V
-0.040
-0.060
-0.080
-0.006
-0.009
-0.012
-0.100
-0.015
10
100
1000
LOAD CURRENT (mA)
3000
10
Line Regulation
0.05
0.04
0.04
LINE REGULATION (%)
LINE REGULATION (%)
3000
FCCM
0.05
0.03
0.02
0.01
0.00
-0.01
-0.02
Io=10mA
Io=1.5A
Io=3A
-0.03
-0.04
15
25
35
INPUT VOLTAGE (V)
0.03
0.02
0.01
0.00
-0.01
-0.02
Io=10mA
Io=1.5A
Io=3A
-0.03
-0.04
-0.05
5
100
1000
LOAD CURRENT (mA)
Line Regulation
AAM
-0.05
45
5
Line Regulation
15
25
35
INPUT VOLTAGE (V)
45
Line Regulation
AAM, VOUT = 5V
FCCM, VOUT = 5V
0.05
0.05
Io=10mA
Io=1.5A
Io=3A
0.03
0.04
LINE REGULATION (%)
0.04
LINE REGULATION (%)
Vin=12V
Vin=24V
Vin=36V
Vin=45V
0.009
0.02
0.01
0.00
-0.01
-0.02
-0.03
-0.04
0.03
0.02
0.01
0.00
-0.01
-0.02
Io=10mA
Io=1.5A
Io=3A
-0.03
-0.04
-0.05
5
15
25
35
INPUT VOLTAGE (V)
45
-0.05
5
15
25
35
INPUT VOLTAGE (V)
MPQ4313 Rev. 1.1
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45
12
MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6µH (8), COUT = 94µF, fSW = 470kHz, TA = 25°C, unless otherwise noted.
Case Temperature Rise
Case Temperature Rise
VOUT = 3.3V
VOUT = 5V
16
CASE TEMPERATURE RISE
(C)
CASE TEMPERATURE RISE
(°C)
16
12
8
4
0
0.0
0.5
1.0
1.5
2.0
2.5
12
8
4
0
3.0
0.0
0.5
LOAD CURRENT (A)
2.0
2.5
3.0
fSW vs. RFREQ
Rfreq=62K
Rfreq=12K
fSW (kHz)
fsw (KHz)
1.5
LOAD CURRENT (A)
fSW vs. VIN
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
1.0
6 9 12 15 18 21 24 27 30 33 36 39 42 45
VIN (V)
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
10
20
30
40
50 60 70
RFREQ (kΩ)
80
90 100
Low-Dropout Mode
VOUT = 5V
5.2
4.9
VOUT (V)
4.6
4.3
4.0
3.7
3.4
3.1
2.8
IOUT=0A
IOUT=1A
IOUT=2A
IOUT=3A
2.5
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0
VIN (V)
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6µH
noted. (9)
(8),
COUT = 94µF, fSW = 470kHz, TA = 25°C, unless otherwise
CISPR25 Class 5 Peak Conducted
Emissions
CISPR25 Class 5 Average Conducted
Emissions
150kHz to 108MHz
AVG CONDUCTED EMI (dBµV)
PK CONDUCTED EMI (dBµV)
150kHz to 108MHz
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
CISPR25 CLASS 5 PK LIMITS
PK NOISE FLOOR
1
0.1
Frequency (MHz)
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
108
10
0.1
CISPR25 Class 5 Peak Radiated
Emissions
PK RADIATED EMI (dBµV)
AVG RADIATED EMI (dBµV)
PK NOISE FLOOR
1
Frequency (MHz)
30
10
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
AVG RADIATED EMI (dBµV)
PK RADIATED EMI (dBµV)
CISPR25 CLASS 5 PK LIMITS
PK NOISE FLOOR
230
330
430
530
630
Frequency (MHz)
AVG NOISE FLOOR
1
Frequency (MHz)
30
10
Horizontal, 30MHz to 1GHz
HORIZONTAL POLARIZATION
130
108
10
CISPR25 Class 5 Average Radiated
Emissions
Horizontal, 30MHz to 1GHz
30
Frequency (MHz)
CISPR25 CLASS 5 AVG LIMITS
0.1
CISPR25 Class 5 Peak Radiated
Emissions
55
50
45
40
35
30
25
20
15
10
5
0
-5
1
150kHz to 30MHz
CISPR25 CLASS 5 PK LIMITS
0.1
AVG NOISE FLOOR
CISPR25 Class 5 Average Radiated
Emissions
150kHz to 30MHz
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
CISPR25 CLASS 5 AVG LIMITS
730
830
930 1000
55
50
45
40
35
30
25
20
15
10
5
0
-5
HORIZONTAL POLARIZATION
CISPR25 CLASS 5 AVG LIMITS
AVG NOISE FLOOR
30
130
230
330
430
530
630
Frequency (MHz)
730
MPQ4313 Rev. 1.1
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830
930 1000
14
MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6µH
noted. (9)
(8),
COUT = 94µF, fSW = 470kHz, TA = 25°C, unless otherwise
CISPR25 Class 5 Peak Radiated
Emissions
CISPR25 Class 5 Average Radiated
Emissions
Vertical, 30MHz to 1GHz
VERTICAL POLARIZATION
AVG RADIATED EMI (dBµV)
PK RADIATED EMI (dBµV)
Vertical, 30MHz to 1GHz
55
50
45
40
35
30
25
20
15
10
5
0
-5
CISPR25 CLASS 5 PK LIMITS
PK NOISE FLOOR
30
130
230
330
430
530
630
Frequency (MHz)
730
830
930 1000
55
50
45
40
35
30
25
20
15
10
5
0
-5
VERTICAL POLARIZATION
CISPR25 CLASS 5 AVG LIMITS
AVG NOISE FLOOR
30
130
230
330
430
530
630
Frequency (MHz)
730
830
930 1000
Notes:
8) Inductor PN: XAL6060-562MEB/C. DCR = 14.5mΩ.
9) The EMC test results are based on the application circuit with EMI filters (see Figure 13).
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Steady State
Steady State
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH2:
VOUT/AC
50mV/div.
CH3:
PG
5V/div.
CH4: IL
1A/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
5mV/div.
CH1: VSW
5V/div.
CH4: IL
500mV/div.
2μs/div.
40ms/div.
Steady State
Start-up through VIN
IOUT = 3A
IOUT = 0A, AAM
CH3:
PG
5V/div.
CH3: VIN
5V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
5mV/div.
CH2: VOUT
1V/div.
CH4: IL
1A/div.
CH1: VSW
10V/div.
CH4: IL
2A/div.
2μs/div.
1ms/div.
Start-Up through VIN
Start-Up through VIN
IOUT = 0A, FCCM
IOUT = 3A
CH3: VIN
5V/div.
CH3: VIN
5V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
2A/div.
1ms/div.
1ms/div.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Shutdown through VIN
Shutdown through VIN
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH3: VIN
5V/div.
CH3: VIN
5V/div.
CH2: VOUT
1V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
1A/div.
CH4: IL
1A/div.
CH1: VSW
5V/div.
10ms/div.
10ms/div.
Shutdown through VIN
Start-Up through EN
IOUT = 3A
IOUT = 0A, AAM
CH3: VIN
5V/div.
CH3: VEN
2V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
5A/div.
CH2: VOUT
1V/div.
CH4: IL
2A/div.
CH1: VSW
10V/div.
10ms/div.
1ms/div.
Start-Up through EN
Start-Up through EN
IOUT = 0A, FCCM
IOUT = 3A
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
2A/div.
1ms/div.
1ms/div.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Shutdown through EN
Shutdown through EN
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
1V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
2A/div.
CH4: IL
1A/div.
CH1: VSW
5V/div.
100ms/div.
100ms/div.
Shutdown through EN
SCP Entry
IOUT = 3A
IOUT = 0A, AAM
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
2V/div.
CHR1: PG
5V/div.
CH4: IL
2A/div.
CH3: VPG
5V/div.
CH4: IL
5A/div.
CH1: VSW
10V/div.
100µs/div.
20ms/div.
SCP Entry
SCP Entry
IOUT = 0A, FCCM
IOUT = 3A
CH3: VPG
5V/div.
CH2: VOUT
2V/div.
CH1: VSW
5V/div.
CH3: VPG
5V/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
CH4: IL
5A/div.
CH1: VSW
10V/div.
20ms/div.
20ms/div.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
SCP Recovery
SCP Recovery
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
5A/div.
CH1: VSW
10V/div.
CH4: IL
5A/div.
CH1: VSW
10V/div.
10ms/div.
10ms/div.
SCP Recovery
SCP Steady State
IOUT = 3A
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
10ms/div.
10ms/div.
Load Transient
SYNCIN Operation
IOUT = 1.5A to 3A, 1.6A/μs
IOUT = 3A, SYNC frequency = 350kHz
CH2: VOUTAC
200mV/div.
CH3:
SYNCIN
2V/div.
CH1: VSW
5V/div.
CH2: VOUT
2V/div.
CH4: IOUT
1A/div.
CH4: IL
2A/div.
100µs/div.
2µs/div.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
SYNCIN Operation
SYNCO Operation
IOUT = 3A, SYNC frequency = 1000kHz
IOUT = 3A, SYNC frequency = 350kHz
CH1: VSW
5V/div.
CH3:
SYNCIN
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
2V/div.
CH4: IL
1A/div.
CH3:
SYNCO
2V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
2µs/div.
2µs/div.
SYNCO Operation
PG in Start-Up through VIN
IOUT = 3A, SYNC frequency = 1000kHz
IOUT = 0A, AAM
CH3: VIN
5V/div.
CH1: VSW
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
1V/div.
CH4: IL
1A/div.
CH3:
SYNCO
2V/div.
CH4: VPG
2V/div.
CH1: VSW
10V/div.
2µs/div.
1ms/div.
PG in Shutdown through VIN
PG in Start-Up through EN
IOUT = 0A, AAM
IOUT = 0A, AAM
CH3: VIN
5V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: VPG
2V/div.
CH4: VPG
2V/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
20ms/div.
1ms/div.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
PG in Shutdown through EN
Low-Dropout Mode
IOUT = 0A, AAM
VIN = 3.3V, VOUT set to 3.3V, IOUT = 0A
CH3: VIN
500mV/div.
CH2: VOUT
500mV/div.
CH3: VEN
2V/div.
CH4: IL
50mA/div.
CH2: VOUT
2V/div.
CH4: VPG
2V/div.
CH1: VSW
1V/div.
CH1: VSW
5V/div.
100ms/div.
4µs/div.
Low-Dropout Mode
Load Dump
VIN = 3.3V, VOUT set to 3.3V, IOUT = 3A
VIN = 12V to 36V, IOUT = 3A
CH3: VIN
10V/div.
CH3: VIN
500mV/div.
CH1: VSW
10V/div.
CH2: VOUT
500mV/div.
CH1: VSW
1V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
4µs/div.
100ms/div.
Cold Crank
VIN Ramp Up and Down
VIN = 12V to 3.3V to 5V, IOUT = 3A
IOUT = 0.1A
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH3: VIN
1V/div.
CH2: VOUT
1V/div.
CH1: VSW
5V/div.
40ms/div.
1s/div.
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 5.6μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
VIN Ramp Down and Up
VIN Ramp Down and Up
IOUT = 1mA
IOUT = 3A
CH3: VIN
10V/div.
CH3: VIN
5V/div.
4.5V
CH1: VSW
5V/div.
CH2: VOUT
2V/div.
4.5V
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
10s/div.
10s/div.
MPQ4313 Rev. 1.1
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22
MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
FUNCTIONAL BLOCK DIAGRAM
VCC
VCC
VCC
Regulator
VIN
VCC
VREF
EN
Reference
BST
Regulator
BST
FREQ
Oscillator
SYNCIN
SYNCO
PG
+
-
ISS
VPG_REF
VFB
Control Logic
SW
VCC
Error Amplifier
VREF
SS
ISW
VFB
+
+
-
VCOMP
1.15MΩ
2pF
ILS
60pF
PGND
FB
AGND
MODE
Figure 1: Functional Block Diagram of Adjustable Output Version
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
FUNCTIONAL BLOCK DIAGRAM (continued)
VCC
VCC
VCC
Regulator
VREF
EN
VIN
VCC
Reference
BST
Regulator
BST
FREQ
ISW
Oscillator
SYNCIN
SYNCO
PG
+
-
VFB
Control Logic
Error Amplifier
VREF
VFB
+
+
-
VCOMP
1.15MΩ
R1
FB
SW
VCC
ISS
SS
VPG_REF
2pF
ILS
60pF
PGND
R2
AGND
MODE
Figure 2: Functional Block Diagram of Fixed Output Version
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
Timing Sequence Diagram
VIN
0
SW
0
EN
EN
Threshold
0
VCC
VCC
Threshold
15µs
0
95% VREF
93.5% VREF
95% VREF
106.5% VREF
105% VREF
93.5% VREF
70% VREF
Vo
SS
0
IL = ILIMIT
IL
0
PG
35µs
35µs
35µs
35µs
35µs
35µs
0
Start-Up
Normal
Normal
OCP
OV
Normal
Shutdown
OC
Release
Figure 3: Timing Sequence Diagram
MPQ4313 Rev. 1.1
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
OPERATION
The MPQ4313 is a synchronous, step-down
switching regulator with integrated, internal highside and low-side power MOSFETs. It provides 3A
of highly efficient output with current mode control.
The MPQ4313 features a wide input voltage
range, programmable switching frequency,
external soft start, and precision current limiting.
The device’s very low operational quiescent
current makes it suitable for battery-powered
applications.
PWM Control
At moderate to high output currents, the MPQ4313
operates in fixed-frequency, peak current control
mode to regulate the output voltage. A PWM cycle
is initiated by the internal clock. At the rising edge
of the clock, the high-side power MOSFET (HSFET) turns on and remains on until its current
reaches the value set by the internal COMP
voltage (VCOMP). Once the HS-FET is on, it
remains on for at least 100ns.
When the HS-FET is off, the low-side MOSFET
(LS-FET) turns on immediately and remains on
until the next cycle starts. Once the LS-FET is on,
it remains on for at least 80ns before the next cycle
starts.
If the current in the HS-FET does not reach the
COMP set current value within one PWM period,
the
HS-FET remains on, saving a turn-off
operation. The HS-FET is forced off if the on time
lasts about 10µs and VCOMP is not reached.
Light-Load Operation
In light-load conditions, the MPQ4313 can work in
one of two different operation modes by setting the
MODE pin to a different status (see Figure 4).
The MPQ4313 works in forced CCM (FCCM)
when the CCM pin is pulled above 1.8V. In this
mode, the device works with a fixed frequency
from no-load to full-load. The advantage of FCCM
is the controllable frequency and lower output
ripple at light-load.
The MPQ4313 works in asynchronous advanced
mode (AAM) when the MODE pin is pulled below
0.4V. AAM optimizes efficiency during light-load
and no-load conditions.
When AAM is enabled, the MPQ4313 first enters
nonsynchronous operation as long as the inductor
current approaches zero at light-load. If the load is
further decreased or there is no load that makes
the internal COMP voltage (VCOMP) decrease to the
set value, the MPQ4313 enters AAM. In AAM, the
internal clock is reset every time VCOMP crosses the
set threshold, and the crossover time is taken as
the benchmark of the next clock. When the load
increases and VCOMP exceeds the set value, the
operation mode is DCM or CCM, which has a
constant switching frequency.
Inductor
Current
Load
Decreased
Inductor
Current
AAM
FCCM
t
t
Load
t Decreased
t
t
t
Figure 4: AAM and FCCM
Error Amplifier
The error amplifier compares the FB pin voltage
with the internal reference (0.815V) and outputs a
current proportional to the difference between the
two. This output current is then used to charge
the compensation network to form VCOMP, which
controls the power MOSFET current.
During operation, the minimum VCOMP is clamped
to 0.9V and its maximum is clamped to 2.0V. In
shutdown mode, COMP is pulled down to GND
internally.
Internal Regulator VCC
Most of the internal circuitry is powered by the
internal 4.9V VCC regulator. This regulator takes
VIN as the input and operates in the full VIN range.
When VIN exceeds 4.9V, VCC is in full regulation.
When VIN falls below 4.9V, the output VCC
degrades.
Bootstrap Charging
The bootstrap capacitor is charged and regulated
to about 5V by the dedicated internal bootstrap
regulator. When the voltage between the BST and
SW nodes is below its regulation, a PMOS pass
transistor connected from VCC to BST turns on to
charge the bootstrap capacitor. External circuitry
should provide enough voltage headroom to
facilitate charging.
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
When the HS-FET is on, BST exceeds is greater
than VCC, so the bootstrap capacitor cannot be
charged.
In higher duty cycle operation conditions, the time
period available for bootstrap charging is shorter,
so the bootstrap capacitor may not charge
sufficiently. If the external circuit does not have
sufficient voltage and time to charge the bootstrap
capacitor, additional external circuitry can be used
to ensure the bootstrap voltage is within the
normal operation range.
Low-Dropout Mode and BST Refresh
To improve dropout, the MPQ4313 is designed to
operate at close to 100% duty cycle as long as the
BST-to-SW pin voltage is above 2.5V. When the
voltage from BST to SW drops below 2.5V, the
HS-FET is turned off using a UVLO circuit, which
allows the LS-FET to conduct and refresh the
charge on the BST capacitor. In DCM mode or
PSM mode, the LS-FET is forced on to refresh the
BST voltage.
Since the supply current sourced from the BST
capacitor is low, the HS-FET can remain on for
more switching cycles than are required to refresh
the capacitor. Thus, the effective duty cycle of the
switching regulator is high.
The effective duty cycle during regulator dropout
is mainly influenced by the voltage drops across
the power MOSFET, the inductor resistance, the
low-side diode, and the PCB resistance.
Enable Control
EN is a digital control pin that turns the regulator
on and off. The MPQ4313 can be enabled in two
ways:
First, it can be enabled by an external logic H/L
signal. When EN is pulled below the falling
threshold voltage (0.85V), the chip is put into the
lowest shutdown current mode. Forcing this pin
above the EN rising threshold voltage (1V) turns
on the part.
The second method is via the programmable VIN
under-voltage lockout (UVLO) threshold. With a
high enough VIN, the chip can be enabled and
disabled by the EN pin. The EN voltage (VEN) can
be set via resistor dividers (REN1 + REN2) (see
Figure 5).
VIN
REN1
EN
REN2
Figure 5: Enable Divider Circuit
Programmable Frequency and Foldback
The MPQ4313 oscillating frequency can be
programmed either by an external resistor (RFREQ)
from the FREQ pin to ground, or by a logic-level
SYNC signal.
To get a specific switching frequency (fSW), select
the RFREQ value following the fSW vs. RFREQ curve
in the Typical Performance Characteristics (TPC)
section on page 13. Note that fSW folds back at
high VIN values to avoid triggering the minimum on
time and VOUT going out of regulation. The
recommended fSW for car battery applications is
350kHz to 1000kHz. Table 1 shows the
recommended RFREQ for common fSW values.
Applications that do not have a critical limit on fSW
or have a relatively low and stable VIN can support
higher frequencies.
Table 1: Recommended RFREQ for Different fSW
Values
RFREQ (kΩ)
86.6
80.6
75
62
59
54.9
49.9
45.3
41.2
37.4
34
30.9
28.7
26.1
fSW (kHz)
350
380
410
470
500
530
590
640
700
760
830
910
960
1000
Frequency Spread Spectrum
The MPQ4313 uses a 12kHz modulation
frequency with a 128-step triangular profile to
spread the internal oscillator frequency over a
20% (±10%) window. The steps are fixed and
independent of the setting oscillator frequency to
optimize frequency spread spectrum (FSS)
performance.
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MPQ4313 - 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
128 steps are
fixed
fSPAN = 20% x fSW
fMOD = 12kHz
Figure 6: Spread Spectrum Scheme
Side bands are created by modulating the
switching frequency with the triangle modulation
waveform. The emission power of the
fundamental switching frequency and its
harmonics is distributed into smaller pieces. This
significantly reduces the peak EMI noise.
Soft Start
Soft start (SS) is implemented to prevent the
converter output voltage from overshooting during
start-up.
When soft start begins, an internal current source
begins charging the external soft-start capacitor.
Once the soft-start voltage (VSS) is below the
internal reference (VREF), VSS overrides VREF and
the error amplifier uses VSS as the reference.
When VSS exceeds VREF, VREF regains control.
The soft-start capacitance (CSS) can be calculated
with Equation (1):
CSS (nF) =
t SS (ms) ISS (A)
= 6.25 t SS (ms) (1)
VREF (V)
The SS pins can be used for tracking and
sequencing.
Pre-Biased Start-Up
For the MPQ4313, if VFB > VSS - 150mV at startup, which means output has a pre-biased voltage,
neither the HS-FET nor LS-FET turns on until VSS
exceeds VFB.
Thermal Shutdown
Thermal shutdown is implemented to prevent
thermal runaway. When the silicon die
temperature exceeds its upper threshold, it shuts
down the power MOSFETs. When the
temperature falls below its lower threshold, the
chip is enabled again.
Current Comparator and Current Limit
The power MOSFET current is accurately sensed
via a current-sense MOSFET. It is then fed to the
high-speed current comparator for current mode
control. The current comparator takes this sensed
current as one of its inputs. When the HS-FET is
on, the comparator is blanked until the end of the
turn-on transition to avoid noise. Then, the
comparator compares the power switch current
with the COMP voltage (VCOMP). When the sensed
current exceeds VCOMP, the comparator outputs
low to turn off the HS-FET. The maximum current
of the internal power MOSFET is internally limited
cycle by cycle.
Hiccup Protection
If the output is shorted to ground and the output
voltage drops below 70% of its nominal output, the
IC shuts down momentarily and begins
discharging the soft-start capacitor. It restarts with
a full soft start when the soft-start capacitor is fully
discharged. This hiccup process repeats until the
fault is removed.
Start-Up and Shutdown
If both VIN and EN exceeds their respective
thresholds, the chip starts. The reference block
starts first, generating a stable reference voltage
and current, and then the internal regulator is
enabled. The regulator provides a stable supply
for the remaining circuitries.
While the internal supply rail is up, an internal
timer holds the MOSFET off for about 50µs to
blank any start-up glitches. When the soft-start
block is enabled, it keeps the SS output low to
ensure the remaining circuitries are ready, then
slowly ramps up.
Three events can shut down the chip: EN low, VIN
low, and thermal shutdown. In the event of a
shutdown, the signaling path is blocked first to
avoid any fault triggering. Then VCOMP and the
internal supply rail are pulled down. The floating
driver is not subject to this shutdown command,
but its charging path is disabled.
Power Good Output
The MPQ4313 includes an open-drain power
good (PG) output that indicates the output. A pullup resistor to the power source is required if PG is
used. The PG output goes high if the output
voltage is within 95% to 105% of the nominal
voltage, and it goes low if the output voltage is
above 106.5% or below 93.5% of the nominal
voltage.
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
SYNCIN and SYNCO
fSW can be synced to the clock signal’s rising
edge applied at SYNCIN. The recommended
SYNCIN frequency range is 350kHz to 1000kHz.
Ensure that the SYNCIN off time is shorter than
the internal oscillator period; otherwise, the
internal clock turns on the HS-FET before
reaching SYNCIN’s rising edge. Besides the
parasitic capacitance that is always present on
the pad, there is no other limit on SYNCIN’s
pulse width. Thus, if the pulse width is too short,
then a clear rising and falling edge may not exist
due to the parasitic capacitance. A pulse longer
than 100ns is recommended in application.
When applying SYNCIN in AAM, drive SYNCIN
below its specified threshold (0.4V) or leave
SYNCIN floating before the MPQ4313 starts up
and enters AAM. An external SYNCIN clock can
also be added. To avoid floating SYNCIN while
applying SYNCIN via an external clock, connect
a resistor to GND. Given SYNCIN’s drive
capability, the resistor is recommended to be
between 10kΩ and 51kΩ.
The SYNCO pin provides a default 180° phaseshifted clock to the internal oscillator. If there is
no external SYNCIN clock, SYNCO provides a
180° phase-shifted clock that is compared with
the internal clock. If there is an external SYNCIN
clock, SYNCO provides a 180° phase-shifted
clock that is compared with the external SYNCIN
clock.
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider connected to FB
sets the output voltage (see Figure 8).
MPQ4313
RFB1
FB
VOUT
Figure 8: Feedback Network
Calculate RFB2 with Equation (2):
RFB1
VOUT
−1
0.815V
ICIN =
(2)
Table 2 lists the recommended feedback resistor
values for common output voltages.
RFB1 (kΩ)
RFB2 (kΩ)
3.3
5
100 (1%)
100 (1%)
32.4 (1%)
19.6 (1%)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
AC current to the converter while maintaining the
DC input voltage. For the best performance, use
low-ESR capacitors. Ceramic capacitors with
X5R or X7R dielectrics are highly recommended
because of their low ESR and small temperature
coefficients.
For most applications, use two 4.7µF to 10µF
capacitors. It is strongly recommended to use
another, lower-value capacitor (e.g. 0.1µF) with
a small package size (0603) to absorb highfrequency switching noise. Place the smaller
capacitor as close to VIN and GND as possible.
Since CIN absorbs the input switching current, it
requires an adequate ripple current rating. The
RMS current in the input capacitor can be
estimated with Equation (3):
ICIN = ILOAD
VOUT
V
(1 − OUT )
VIN
VIN
(4)
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1μF) as close to the IC as
possible. When using ceramic capacitors,
ensure that they have enough capacitance to
provide a sufficient charge to prevent excessive
voltage ripple at the input. The input voltage
ripple caused by the capacitance can be
estimated with Equation (5):
VIN =
Table 2: Resistor Selection for Output Voltages
VOUT (V)
ILOAD
2
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
RFB2
RFB2 =
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (4):
(3)
ILOAD
V
V
OUT (1 − OUT )
fSW CIN
VIN
VIN
(5)
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. Use ceramic, tantalum, or low-ESR
electrolytic capacitors. For best results, use lowESR capacitors to keep the output voltage ripple
low. The output voltage ripple can be estimated
with Equation (6):
VOUT =
VOUT
V
1
(1 − OUT ) (RESR +
) (6)
fSW L
VIN
8fSW COUT
Where L is the inductor value, and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency and causes the majority of the output
voltage ripple.
For simplification, the output voltage ripple can
be estimated with Equation (7):
VOUT =
VOUT
V
(1 − OUT )
8 fSW L COUT
VIN
2
(7)
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency.
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
For simplification, the output ripple can be
estimated with Equation (8):
VOUT
V
V
= OUT (1 − OUT ) RESR
fSW L
VIN
EN
(8)
RDOWN
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
at least 25% greater than the maximum load
current is recommended for most applications.
For higher efficiency, choose an inductor with a
lower DC resistance.
A larger-value inductor results in less ripple
current and a lower output ripple voltage, but
also has a larger physical size, higher series
resistance, and lower saturation current. A good
rule for determining the inductor value is to allow
the inductor ripple current to be approximately
30% of the maximum load current. The
inductance value can then be calculated with
Equation (9):
VOUT
V
(1 − OUT )
fSW IL
VIN
(9)
Figure 9: Adjustable UVLO Using EN Divider
The UVLO threshold can be calculated with
Equation (11) and Equation (12):
INUVRISING = (1+
RUP
) VEN_RISING
RDOWN
(11)
INUVFALLING = (1 +
R UP
) VEN_FALLING
R DOWN
(12)
Where VEN_RISING is 1V, and VEN_FALLING is 0.85V.
External BST Diode and Resistor
An external BST diode can enhance the
efficiency of the regulator when the duty cycle is
high. A power supply between 2.5V and 5V can
be used to power the external bootstrap diode.
VCC or VOUT is recommended to be this power
supply in the circuit (see Figure 10).
VCC
RBST
Where ∆IL is the peak-to-peak inductor ripple
current.
BST
Choose the inductor ripple current to be
approximately 30% of the maximum load current.
The maximum inductor peak current can be
calculated with Equation (10):
SW
ILP = ILOAD +
VOUT
V
(1 − OUT )
2fSW L
VIN
VIN
RUP
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MPQ4313 can be optimized for a wide range of
capacitance and ESR values.
L=
VIN
(10)
VIN UVLO Setting
The MPQ4313 has an internal, fixed undervoltage lockout (UVLO) threshold. The rising
threshold is 3V, while the falling threshold is
about 2.7V. For the applications that need a
higher UVLO point, an external resistor divider
between VIN and EN can be used to achieve a
higher equivalent UVLO threshold (see Figure 9).
External BST Diode
IN4148
VCC / VOUT
CBST
L
VOUT
COUT
Figure 10: Optional External Bootstrap Diode to
Enhance Efficiency
The recommended external BST diode is
IN4148, and the recommended BST capacitance
is 0.1µF to 1μF. A resistor in series with the BST
capacitor (RBST) can reduce the SW rising rate
and voltage spikes. This helps enhance EMI
performance and reduce voltage stress at a high
VIN. A higher resistance is better for SW spike
reduction but compromises efficiency. To make
a tradeoff between EMI and efficiency, a ≤20Ω
RBST is recommended.
Setting the VCC Capacitor
The VCC capacitor should be 10 times greater
than the boost capacitor. A VCC capacitor with a
nominal value above 68µF is not recommended.
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
PCB Layout Guidelines (10)
Efficient PCB layout, especially for input
capacitor placement, is critical for stable
operation. A 4-layer layout is strongly
recommended to achieve better thermal
performance. For best results, refer to Figure 11
and follow the guidelines below:
1.
Place symmetric input capacitors as close to
VIN and GND as possible.
2.
Use a large ground plane to connect directly
to PGND.
3.
Add vias near PGND if the bottom layer is a
ground plane.
4.
Ensure that the high-current paths at GND
and VIN have short, direct, and wide traces.
5.
Place the ceramic input capacitor, especially
the small package size (0603) input bypass
capacitor, as close to VIN and PGND as
possible to minimize high-frequency noise.
6.
Keep the connection between the input
capacitor and VIN as short and wide as
possible.
7.
Place the VCC capacitor as close as
possible to VCC and GND.
8.
Route SW and BST away from sensitive
analog areas, such as FB.
9.
Place the feedback resistors close to the
chip to ensure the trace that connects to FB
is as short as possible.
10. Use multiple vias to connect the power
planes to the internal layers.
Top Layer
Inner Layer 1
Inner Layer 2
Note:
10) The recommended PCB layout is based on Figure 12.
Bottom Layer
Figure 11: Recommended PCB Layout
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
6
TYPICAL APPLICATION CIRCUITS
C1A
10µF
3, 12
C1B
10µF
C1C
0.1µF
C1D
0.1µF
VIN
SW
R1
100k
GND
5V/3A
7, 8
Typ 5.5A ILIMIT
C5
47pF
R4
100k
0.85V 1V
9
20
EN
FB
U1
18
Typ 0.815V
VOUT
C2B
47µF
10V
1210
R5
19.6k
MPQ4313
R2
62k
19
C2A
47µF
10V
1210
GND
FREQ
SS
PG
C3
10nF
14
PG
R6
100k
2
SYNCIN
SYNCIN
VCC
R3
51k
15
C6
4.7µF
1
2
JP1
AAM
FCCM
MODE
17
4, 5, 10, 11
SYNCO
AGND
13
SYNCO
PGND
3
NC
16
1
EN
C4
0.1µF
L1
5.6µH
BST
VIN
3.3V to 45V
Figure 12: Typical Application Circuit (VOUT = 5V, fSW = 470kHz)
L2
4.7µH
L1
BLM41PG600SN1L
VIN
VEMI
CIN1
1nF
CIN2
10nF
CIN4
1µF
CIN3
1µF
CIN5
47µF
6
GND
C1A
10µF
3, 12
C1B
10µF
C1C
0.1µF
C1D
0.1µF
GND
C4
0.1µF
BST
VIN
3.3V to 45V
VIN
R1
100k
L3
5.6µH
SW
Typ 5.5A ILIMIT
C5
47pF
R4
100k
0.85V 1V
9
20
FB Typ 0.815V
FREQ
SS
PG
10nF
VOUT
1nF
COUT4
GND
14
PG
R6
100k
VCC
NC
16
15
C6
4.7µF
3
SYNCO
MODE
1
2
JP1
4, 5, 10, 11
AGND
13
SYNCIN
PGND
2
17
SYNCO
1nF
3.3V/3A
MPQ4313
19
R3
51k
10nF
COUT2
R5
32.4k
U1
C3
10nF
SYNCIN
C2B
47µF
10V
1210
18
EN
R2
62k
C2A
47µF
10V
1210
1
EN
COUT3
COUT1
7, 8
Figure 13: Typical Application Circuit (VOUT = 3.3V, fSW = 470kHz with EMI Filters)
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
6
TYPICAL APPLICATION CIRCUITS (continued)
C1A
10µF
3, 12
C1B
10µF
C1C
0.1µF
C1D
0.1µF
VIN
SW
R1
100k
GND
EN
BST
VIN 3.3V to 45V
0.85V 1V
C4
0.1µF
L1
5.6µH
9
20
EN
FB
7, 8
VOUT
Typ. 5.5A ILIMIT
C2A
47µF
10V
1210
C2B
47µF
10V
1210
C2C
22µF
10V
1210
C2D
22µF
10V
1210
18
3A
GND
FREQ
U1
R2
62k
MPQ4313
19
SS
PG
C3
10nF
14
PG
R4
100k
SYNCIN
SYNCIN
VCC
R3
51k
C5
4.7µF
FCCM
PGND
MODE
1
2
JP1
AAM
4, 5, 10, 11
AGND
SYNCO
17
SYNCO
13
15
3
NC
16
1
2
Figure 14: Typical Application Circuit (fSW = 470kHz, Fixed Output)
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
PACKAGE INFORMATION
QFN-20 (4mmx4mm)
Wettable Flank
PIN 1 ID
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
0.10x45°
TOP VIEW
BOTTOM VIEW
SIDE VIEW
SECTION A-A
NOTE:
1) THE LEAD SIDE IS WETTABLE.
2) ALL DIMENSIONS ARE IN MILLIMETERS.
3) LEAD COPLANARITY SHALL BE 0.08
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
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MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
CARRIER INFORMATION
Pin1
1
1
ABCD
1
1
ABCD
ABCD
ABCD
Feed Direction
Part Number
Package
Description
Quantity
/Reel
Quantity
/Tube (11)
Quantity
/Tray
Reel
Diameter
Carrier
Tape
Width
Carrier
Tape
Pitch
MPQ4313GRE-AEC1-Z
MPQ4313GRE-33-AEC1-Z
MPQ4313GRE-5-AEC1-Z
QFN-20
(4mmx4mm)
5000
N/A
N/A
13in
12mm
8mm
Note:
11) N/A indicates “not available” in tubes. For 500-piece tape & reel prototype quantities, contact the factory. (Order code for 500-piece partial
reel is “-P”, tape & reel dimensions remain the same as the full reel.)
MPQ4313 Rev. 1.1
MonolithicPower.com
11/8/2022
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2022 MPS. All Rights Reserved.
36
MPQ4313 – 45V, 3A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER WITH FSS
REVISION HISTORY
Revision #
1.0
1.1
Revision Date
6/5/2020
11/8/2022
Description
Initial Release
Updated the programmable frequency from “350kHz to
530kHz” to “350kHz to 1000kHz”
Deleted the Top Marking details for the fixed output versions
(MPQ4313GRE-33-AEC1 and MPQ4313GRE-5-AEC1);
updated the Package Reference image; updated “–Z” to “Z”
Updated the SYNCIN description
Updated the BST absolute maximum rating from “VSW +
5.5V” to “VSW to 6V”; added the recommended VOUT range;
added Note 3; updated Note 4 and Note 5
Deleted the original Note 7 for the HS current limit; updated
the SYNCO phase shift condition
Updated the Reverse Current Limit vs. Temperature and VIN
UVLO Threshold vs. Temperature curves to correspond to
the electrical characteristics data
Updated the fSW vs. VIN curve
Added Note 8
Modified the incorrect channel labels of the SYNCIN
Operation and SYNCO Operation (middle left) waveforms
Updated the Enable Control and Programmable Frequency
and Foldback sections; added Table 1
Updated the SYNCIN and SYNCO section
Updated the Figure 12, Figure 13, and Figure 14 to include
the typical ILIMIT
Updated “–Z” to “-Z” and “–P” to “-P”
Pages Updated
1, 4, 6, 20, 27,
29
3
4
5
6
8
13
14–15
20
27
29
33–34
36
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MPQ4313 Rev. 1.1
MonolithicPower.com
11/8/2022
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2022 MPS. All Rights Reserved.
37
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