MPQ4317
45V, 7A, Low IQ, Synchronous Step-Down
Converter with Frequency Spread Spectrum,
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ4317 is a configurable-frequency,
synchronous, step-down switching regulator with
integrated internal high-side and low-side power
MOSFETs. It provides up to 7A of highly efficient
output current (IOUT) with current mode control for
fast loop response.
The wide 3.3V to 45V input voltage (VIN) range
accommodates a variety of step-down
applications in automotive input environment. A
1.7μA shutdown mode quiescent current allows
use in battery-powered applications.
High power conversion efficiency across a wide
load range is achieved by scaling down the
switching frequency (fSW) under light-load
conditions to reduce switching and gate driver
losses.
An open-drain power good signal indicates
whether the output is within 95% to 105% of its
nominal voltage.
Frequency foldback helps prevent inductor
current (IL) runaway during start-up. Thermal
shutdown provides reliable, fault-tolerant
operation. High duty cycle and low-dropout
mode are provided for automotive cold-crank
conditions.
Wide 3.3V to 45V Operating VIN Range
7A Continuous Output Current (IOUT)
1.7μA Low Shutdown Supply Current
18μA Sleep Mode Quiescent Current
Internal 48mΩ High-Side MOSFET (HSFET) and 20mΩ Low-Side MOSFET (LSFET)
350kHz to 1000kHz Configurable Switching
Frequency (fSW) for Car Battery Applications
Can Be Synchronized to an External Clock
Out-of-Phase Synchronized Clock Output
Fixed Output Options: 3.3V, 5V
Frequency Spread Spectrum (FSS) for Low
EMI
Symmetric VIN for Low EMI
Power Good (PG) Output
External Soft Start (SS)
100ns Minimum On Time
Selectable Advanced Asynchronous
Modulation (AAM) Mode or Forced
Continuous Conduction Mode (FCCM)
Low-Dropout Mode
Over-Current Protection (OCP) with Hiccup
Mode
Available in a QFN-20 (4mmx4mm)
Package
Available in a Wettable Flank Package
Available in AEC-Q100 Grade 1
The MPQ4317 is available in a QFN-20
(4mmx4mm) package.
MPQ4317 FAMILY VERSIONS
APPLICATIONS
Part
Number
MPQ4312
MPQ4313
MPQ4314
MPQ4315
MPQ4316
MPQ4317
Output
Current
2A
3A
4A
5A
6A
7A
Note:
1)
Package Options
QFN-20 (4mmx4mm)
WF (1)
Automotive Infotainment
Automotive Clusters
Advanced Driver Assistance Systems
(ADAS)
Industrial Power Systems
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive.
For MPS green status, please visit MPS website under Quality
Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
WF means wettable flank.
MPQ4317 Rev. 1.0
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1
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL APPLICATION
VIN =
3.3 to 45V
VIN =
3.3 to 45V
VIN
BST
VOUT
EN
VIN
MODE
BST
SYNCO
SW
VOUT
SYNCO
SW
MPQ4317
MPQ4317
FREQ
FB
VCC
PG
NC
SS
SYNCIN
EN
MODE
Efficiency vs. Load
Current
VOUT = 5V, fSW = 470kHz,
L = 4.7μH (DCR = 15mΩ),
AAM
FREQ
FB
PG
VCC
GND
Adjustable-Output Version
SS
NC
SYNCIN
GND
Fixed-Output Version
MPQ4317 Rev. 1.0
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2
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
ORDERING INFORMATION
Part Number*
MPQ4317GRE-AEC1***
Package
Top Marking
MSL Rating**
MPQ4317GRE-33-AEC1***
QFN-20 (4mmx4mm)
See Below
1
MPQ4317GRE-5-AEC1***
* For Tape & Reel, add suffix -Z (e.g. MPQ4317GRE-AEC1-Z).
** Moisture Sensitivity Level Rating.
*** Wettable Flank.
TOP MARKING
MPS: MPS
prefix
Y: Year code
WW: Week
code
MP4317: Part
number
LLLLLL: Lot
number
E: Wettable
flank
PACKAGE REFERENCE
TOP VIEW
20
SS
FB
19
18
NC
17
16
15
MODE
SYNCIN
14
2
13
VIN
3
12
VIN
PGND
4
11
PGND
PGND
5
10
6
7
8
9
BST
SW
SW
EN
QFN-20 (4mmx4mm)
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
PIN FUNCTIONS
Pin #
1
2
3, 12
4, 5, 10, 11
6
7, 8
9
13
14
Name
Description
AAM or FCCM selection pin. Pull this pin high to make the part operate in forced
continuous conduction mode (FCCM). Pull it low to make it operate in advanced
MODE
asynchronous modulation (AAM) mode under light-load conditions. Do not leave this pin
floating.
SYNC input. Apply a 350kHz to 1000kHz clock signal to this pin to synchronize the
internal oscillator frequency to the external clock. This pin is internally high impedance.
Do not float this pin under any circumstances. If used, ensure that the external sync clock
SYNCIN
has adequate pull-up and pull-down capability. It is recommended to place a ≤51kΩ
resistor between the pin and GND in case the external sync clock pull-down capability is
not strong enough or the pin enters a high-impedance state.
Input supply. VIN supplies power to all of the internal control circuitry and the power
MOSFET connected to SW. It is recommended to place a decoupling capacitor connected
to ground and close to VIN to minimize switching spikes.
PGND Power ground.
Bootstrap. BST is the positive power supply for the high-side MOSFET (HS-FET) driver
BST
connected to SW. Connect a bypass capacitor between BST and SW. See the Application
Information section on page 33 to determine the size of this capacitor.
SW
Switch node. SW is the output of the internal power MOSFET.
Enable. Pull this pin above 1V to turn the MPQ4317 on; pull it below 0.85V to turn the
EN
chip off.
SYNC output. This pin outputs a clock signal that is 180° out-of-phase with the internal
SYNCO oscillator signal or opposite the clock signal applied at the SYNCIN pin. Float this pin if
not used.
Power good indicator. This pin has an open-drain output, and a pull-up resistor to power
source is required if this pin is used. If the output voltage (VOUT) is within 95% to 105% of
PG
the nominal voltage, this pin goes high. If VOUT is above 106.5% or below 93% of the
nominal voltage, it goes low.
VIN
15
NC
16
VCC
17
AGND
18
FB
19
SS
20
FREQ
Not connected. Float this pin.
Bias supply. This pin supplies 4.9V to the internal control circuitry and gate drivers. Place
a decoupling capacitor to ground close to this pin. See the Application Information section
on page 33 to determine the size of this capacitor.
Analog ground.
Feedback input. For the adjustable-output version of the MPQ4317, connect FB to the
center point of the external resistor divider from the output to AGND to set VOUT. The
feedback (FB) threshold voltage is 0.815V. Place the resistor divider as close to FB as
possible. Avoid placing vias on the FB traces. For the fixed-output version, connect the
FB pin directly to the output.
Soft start input. Place a capacitor from SS to GND to set the soft-start time. The
MPQ4317 sources 13µA from SS to the soft-start capacitor (CSS) at start-up. As the SS
voltage (VSS) rises, the FB threshold voltage increases to limit inrush current during startup.
Switching frequency program. Connect a resistor from this pin to ground to set the
switching frequency (fSW). See the fSW vs. RFREQ curve in the Typical Performance
Characteristics (TPC) section on page 15 to set the frequency.
MPQ4317 Rev. 1.0
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8/2/2021
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (2)
Thermal Resistance
VIN, EN .........................................-0.3V to +50V
SW ................................ -0.3V to VIN(MAX) + 0.3V
BST ................................................... VSW + 5.5V
All other pins ................................-0.3V to +5.5V
Continuous power dissipation (TA = 25°C) (3) (5)
QFN-20 (4mmx4mm) ................................. 5.4W
Operating junction temperature ................150°C
Lead temperature .....................................260°C
Storage temperature ................ -65°C to +150°C
QFN-20 (4mmx4mm)
JESD51-7 (4)............................44.........9....°C/W
EVQ4317-R-00A (5).................23........2.5..°C/W
Electrostatic Discharge (ESD) Rating
Human body model (HBM) ......................... ±2kV
Charged device model (CDM) ................. ±750V
Recommended Operating Conditions
Supply voltage (VIN) ......................... 3.3V to 45V
Output voltage (VOUT) ........ 0.815V to 0.95 x VIN
Operating junction temp (TJ) .... -40°C to +150°C
Notes:
2) Exceeding these ratings may damage the device.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation can cause excessive die temperature, and the
regulator may go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
4) Measured on JESD51-7, 4-layer PCB. The values given in this
table are only valid for comparison with other packages and
cannot be used for design purposes. These values were
calculated in accordance with JESD51-7, and simulated on a
specified JEDEC board. They do not represent the
performance obtained in an actual application.
5) Measured on an MPS standard EVB: 9cmx9cm, 2oz. copper
thickness, 4-layer PCB.
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameter
VIN under-voltage lockout
(UVLO) rising threshold
VIN UVLO falling threshold
VIN UVLO hysteresis
VCC voltage
VCC regulation
VCC current limit
VIN quiescent current
VIN quiescent current
(switching) (6)
Symbol
Min
Typ
Max
Units
INUVLO_RISING
2.8
3.0
3.2
V
INUVLO_FALLING
2. 5
2.7
2.9
V
4.6
280
4.9
1
5.2
4
18
26
INUVLO_HYS
VCC
ILIMIT_VCC
IQ
IQ_ACTIVE
VIN shutdown current
ISHDN
FB reference voltage
VFB
Output voltage accuracy of
MPQ4317-33
VOUT
Output voltage accuracy of
MPQ4317-5
VOUT
FB current
IFB
Switching frequency
fSW
Minimum on time (6)
tON_MIN
(6)
Minimum off time
tOFF_MIN
SYNCIN voltage rising
VSYNC_RISING
threshold
SYNCIN voltage falling
VSYNC_FALLING
threshold
SYNCIN clock range
fSYNC
SYNCO high voltage
VSYNCO_HIGH
SYNCO low voltage
VSYNCO_LOW
SYNCO phase shift
High-side (HS) current limit
ILIMIT
Low-side (LS) valley current
ILIMIT_VALLEY
limit
Condition
IVCC = 0A
IVCC = 30mA
VCC = 4V
FB = 0.85V, no load, (sleep mode)
MODE = GND (AAM), switching,
no load, RFB_UP = 1MΩ,
RFB_DOWN = 324kΩ
MODE = HIGH (FCCM), switching,
fSW = 2MHz, no load
MODE = HIGH(FCCM), switching,
fSW = 470kHz, no load
EN = 0V
VIN = 3.3V to 45V, TJ = 25°C
VIN = 3.3V to 45V
TJ = 25°C
TJ = 25°C
VFB = 0.85V, adjustable-output
version
RFREQ = 62kΩ
RFREQ = 26.1kΩ
100
20
μA
40
mA
9.5
mA
807
799
3234
3201
4900
4850
1.7
815
815
3300
3300
5000
5000
3.5
823
831
3366
3399
5100
5150
μA
mV
mV
mV
mV
mV
mV
-50
0
+50
nA
420
820
470
1000
100
80
520
1180
kHz
ns
ns
1.8
External clock
ISYNCO = -1mA
ISYNCO = 1mA
Tested under SYNCIN
Duty cycle = 30%
mV
V
%
mA
μA
350
3.3
V
0.4
V
1000
10
180
13
16
kHz
V
V
deg
A
8
10
12
A
4.5
0.4
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameter
Zero-current detection
(ZCD) current
LS reverse current limit
Symbol
IZCD
Condition
Min
Typ
Max
Units
AAM
-0.15
0.1
+0.35
A
2.0
4.5
7.0
A
0.01
1
µA
8
48
20
13
80
40
19
mΩ
mΩ
µA
ILIMIT_REVERSE FCCM
Switch leakage current
ISW_LKG
HS-FET on resistance
LS-FET on resistance
Soft-start current
RON_HS
RON_LS
ISS
VBST - VSW = 5V
VCC = 5V
VSS = 0V
EN rising threshold
VEN_RISING
0.8
1.0
1.2
V
EN falling threshold
VEN_FALLING
0.65
0.85
1.05
V
EN hysteresis voltage
VEN_HYS
MODE rising threshold
VMODE_RISING
MODE falling threshold
VMODE_FALLING
PG rising threshold (VFB /
VREF)
PGRISING
PG falling threshold (VFB /
VREF)
PGFALLING
PG output voltage low
PG rising delay
PG falling delay
Thermal shutdown
Thermal shutdown
hysteresis (6)
(6)
VPG_LOW
190
mV
1.8
V
0.4
V
VFB rising
VFB falling
VFB falling
VFB rising
92%
95%
98%
102% 105% 108%
90.5% 93.5% 96.5%
103.5% 106.5% 109.5%
VREF
ISINK = 1mA
0.1
V
0.3
tPG_R_DELAY
35
µs
tPG_F_DELAY
35
µs
TSD
170
C
TSD_HYS
20
°C
Note:
6) Derived from bench characterization. Not tested in production.
.
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
IQ vs. Temperature
VFB vs. Temperature
23
0.818
22
0.817
21
0.816
VFB (V)
IQ (μA)
20
0.815
19
18
0.814
17
0.813
16
0.812
15
-50
-25
0
25
50
75
100
-50
125
-25
TEMPERATURE (°C)
ILIMIT vs. Temperature
14.5
ILIMIT_VALLEY (A)
ILIMIT (A)
14.0
13.5
13.0
12.5
12.0
11.5
11.0
-25
0
25
50
100
125
Valley Current Limit vs. Temperature
15.0
-50
0
25
50
75
TEMPERATURE (°C)
75
100
11.0
10.8
10.6
10.4
10.2
10.0
9.8
9.6
9.4
9.2
9.0
-50
125
-25
TEMPERATURE (°C)
Reverse Current Limit vs. Temperature
0
25
50
75
TEMPERATURE (°C)
100
125
VIN UVLO vs. Temperature
4.8
3.1
3.0
4.6
VIN UVLO (V)
ILIMIT_REVERSE (A)
4.7
4.5
4.4
4.3
2.9
VIN UVLO Rising
2.8
VIN UVLO Falling
4.2
2.7
4.1
4.0
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
2.6
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
8
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
PG Rising/Falling Threshold vs.
Temperature
EN UVLO Threshold vs. Temperature
110
108
106
104
102
100
98
96
94
92
90
88
PG RISING/FALLING
THRESHOLD (% of VREF)
1.05
EN UVLO (V)
1.00
0.95
EN UVLO Rising
EN UVLO Falling
0.90
0.85
0.80
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
Shutdown Current vs. Temperature
70
2.1
65
RDS(ON)_HS (mΩ)
ISHDN (μA)
1.9
1.8
1.7
1.6
0
25
50
75
TEMPERATURE (°C)
100
125
100
125
100
125
60
55
50
45
40
1.5
35
1.4
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
-50
125
RDS(ON)_LS vs. Temperature
-25
0
25
50
75
TEMPERATURE (°C)
VCC vs. Temperature
30
4.96
28
4.95
4.94
26
4.93
24
VCC (V)
RDS(ON)_LS (mΩ)
-25
RDS(ON)_HS vs. Temperature
2.2
2.0
PG Upper Falling Threshold
PG Lower Rising Threshold
PG Upper Rising Threshold
PG Lower Falling Threshold
22
4.92
4.91
4.90
20
4.89
18
4.88
16
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
4.87
-50
-25
0
25
50
75
TEMPERATURE (°C)
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Soft-Start Current vs. Temperature
ZCD vs. Temperature
150
15.0
14.5
130
ZCD (mA)
ISS (μA)
14.0
13.5
13.0
12.5
12.0
110
90
70
11.5
50
11.0
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
fSW vs. Temperature
RFREQ = 62kΩ
473
472
fSW (kHz)
471
470
469
468
467
466
465
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 4.7μH (7), fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Input Current vs. Load Current
Input Current vs. Load Current
AAM, VOUT = 3.3V
AAM, VOUT = 5V
110
Vin=12V
Vin=24V
Vin=36V
Vin=45V
Vin=12V
Vin=24V
Vin=36V
Vin=45V
100
INPUT CURRENT (µA)
INPUT CURRENT (µA)
70
65
60
55
50
45
40
35
30
25
20
15
90
80
70
60
50
40
30
20
10
20
30
40
50
60
70
80
10
90 100
Efficiency vs. Load Current
70
EFFICIENCY (%)
EFFICIENCY (%)
80
60
50
Vin=12V
Vin=24V
Vin=36V
Vin=45V
40
30
20
10
1
0.5
LOAD CURRENT (mA)
5
60
70
80
90 100
Vin=12V
Vin=24V
Vin=36V
10
10
50
100
LOAD CURRENT (mA)
500
1000
Efficiency vs. Load Current
FCCM, VOUT = 3.3V
EFFICIENCY (%)
AAM, VOUT = 3.3V
EFFICIENCY (%)
50
100
95
90
85
80
75
70
65
60
55
50
Efficiency vs. Load Current
Vin=12V
Vin=24V
Vin=36V
Vin=45V
1000
40
AAM, VOUT = 3.3V
90
100
98
96
94
92
90
88
86
84
82
80
30
Efficiency vs. Load Current
AAM, VOUT = 3.3V
0.1
20
LOAD CURRENT (µA)
LOAD CURRENT (µA)
2000 3000 4000 5000
LOAD CURRENT (mA)
6000
7000
20
18
16
14
12
10
8
6
4
2
0
Vin=12V
Vin=24V
Vin=36V
Vin=45V
0.1
1
5
0.5
LOAD CURRENT (mA)
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11
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH (7), fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
FCCM, VOUT = 3.3V
FCCM, VOUT = 3.3V
100
100
90
95
70
EFFICIENCY (%)
EFFICIENCY (%)
80
60
50
40
30
Vin=12V
Vin=24V
Vin=36V
Vin=45V
20
10
0
10
100
50
LOAD CURRENT (mA)
500
90
85
Vin=12V
Vin=24V
Vin=36V
Vin=45V
80
75
1000
1000
5000
6000
80
EFFICIENCY (%)
70
60
50
Vin=12V
Vin=24V
Vin=36V
Vin=45V
40
30
20
10
5
1
0.5
LOAD CURRENT (mA)
100
95
90
85
80
75
70
65
60
55
50
10
Vin=12V
Vin=24V
Vin=36V
Vin=45V
10
50
500
100
LOAD CURRENT (mA)
Efficiency vs. Load Current
Efficiency vs. Load Current
AAM, VOUT = 5V
FCCM, VOUT = 5V
100
EFFICIENCY (%)
95
90
85
Vin=12V
Vin=24V
Vin=36V
Vin=45V
80
75
1000
2000
3000
7000
AAM, VOUT = 5V
90
EFFICIENCY (%)
4000
Efficiency vs. Load Current
AAM, VOUT = 5V
EFFICIENCY (%)
3000
LOAD CURRENT (mA)
Efficiency vs. Load Current
0.1
2000
4000
5000
6000
LOAD CURRENT (mA)
7000
24
22
20
18
16
14
12
10
8
6
4
2
0
1000
Vin=12V
Vin=24V
Vin=36V
Vin=45V
0.1
0.5
1
LOAD CURRENT (mA)
MPQ4317 Rev. 1.0
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10
12
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH (7), fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
FCCM, VOUT = 5V
FCCM, VOUT = 5V
100
100
90
95
70
EFFICIENCY (%)
EFFICIENCY (%)
80
60
50
40
30
Vin=12V
Vin=24V
Vin=36V
Vin=45V
20
10
0
50
10
100
LOAD CURRENT (MA)
500
90
85
Vin=12V
Vin=24V
Vin=36V
Vin=45V
80
75
1000
1000
4000
5000
6000
7000
Load Regulation
AAM, VOUT = 3.3V
FCCM, VOUT = 3.3V
0.10
0.12
Vin=12V
Vin=24V
Vin=36V
Vin=45V
0.08
0.06
0.04
0.10
LOAD REGULATION (%)
LOAD REGULATION (%)
3000
LOAD CURRENT (mA)
Load Regulation
0.02
0.00
-0.02
-0.04
-0.06
10
Vin=12V
Vin=24V
Vin=36V
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
100
1000
LOAD CURRENT (mA)
10
Line Regulation
AAM, VOUT = 3.3V
FCCM, VOUT = 3.3V
0.10
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
Io=10mA
Io=3.5A
Io=7A
5
10
15
20 25
VIN (V)
30
35
40
45
7000
100
1000
LOAD CURRENT(mA)
Line Regulation
LINE REGULATION (%)
LINE REGULATION (%)
2000
0.10
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
Io=10mA
Io=3.5A
Io=7A
5
10
15
20 25 30
VIN (V)
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40
45
13
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH (7), fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Load Regulation
Load Regulation
AAM, VOUT = 5V
FCCM, VOUT = 5V
0.12
0.12
0.10
Vin=12V
Vin=24V
Vin=36V
Vin=45V
0.08
0.06
0.04
LOAD REGULATION (%)
LOAD REGULATION (%)
0.10
0.02
0.00
-0.02
-0.04
10
0.04
0.02
0.00
-0.02
-0.04
10
7000
100
1000
LOAD CURRENT (mA)
Line Regulation
AAM, VOUT = 5V
FCCM, VOUT = 5V
0.10
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
Io=10mA
Io=3.5A
Io=7A
5
10
15
20 25
VIN (V)
30
35
40
0.10
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
Io=10mA
Io=3.5A
Io=7A
5
45
10
15
20 25
VIN (V)
30
Case Temperature Rise
Case Temperature Rise
VOUT = 3.3V
VOUT = 5V
60
55
50
45
40
35
30
25
20
15
10
5
0
7000
100
1000
LOAD CURRENT(mA)
Line Regulation
LINE REGULATION (%)
LINE REGULATION (%)
0.06
-0.06
-0.06
35
40
45
70
CASE TEMPERATURE RISE (°C)
CASE TEMPERATURE RISE (°C)
Vin=12V
Vin=24V
Vin=36V
Vin=45V
0.08
0
1
2
3
4
5
LOAD CURRENT (A)
6
7
60
50
40
30
20
10
0
0
1
2
3
4
5
LOAD CURRENT (A)
MPQ4317 Rev. 1.0
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7
14
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH (7), fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
fSW vs. RFREQ
fSW vs. RFREQ
RFREQ = 10kΩ to 30kΩ
RFREQ = 30kΩ to 100kΩ
900
2400
2250
800
2100
1950
700
1650
fSW (kHz)
fSW (kHz)
1800
1500
1350
1200
600
500
400
1050
300
900
30
10 12 14 16 18 20 22 24 26 28 30
40
70
80
90
100
Low-Dropout Mode
fSW vs. VIN
VOUT = 5V
Rfreq=62k
Rfreq=12k
6 9 12 15 18 21 24 27 30 33 36 39 42 45
TEMPERATURE (°C)
VOUT (V)
fSW (kHz)
60
RFREQ (kΩ)
RFREQ (kΩ)
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
50
5.2
4.9
4.6
4.3
4.0
3.7
3.4
3.1
2.8
2.5
2.2
1.9
Io=0A
Io=1A
Io=2A
Io=3A
Io=4A
Io=5A
Io=6A
Io=7A
3.3 3.8 4.3 4.8 5.3 5.8 6.3 6.8 7.3 7.8
VIN (V)
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 5V, IOUT = 7A, L = 4.7μH (7), fSW = 410kHz, TA = 25°C, unless otherwise noted.(8)
CISPR25 Class 5 Peak Conducted
Emissions
CISPR25 Class 5 Average Conducted
Emissions
150kHz to 108MHz
CISPR25 CLASS 5 PK LIMITS
AVG CONDUCTED EMI (dBµV)
PK CONDUCTED EMI (dBµV)
150kHz to 108MHz
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
PK NOISE FLOOR
0.1
1
Frequency (MHz)
108
10
75
70
65
60
CISPR25 CLASS 5 AVG LIMITS
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20 AVG NOISE FLOOR
0.1
CISPR25 Class 5 Peak Radiated
Emissions
150kHz to 30MHz
150kHz to 30MHz
60
55
55
CISPR25 CLASS 5 PK LIMITS
50
AVG RADIATED EMI (dBµV)
50
PK RADIATED EMI (dBµV)
108
10
CISPR25 Class 5 Average Radiated
Emissions
60
45
40
35
30
25
20
15
10
45
40
35
CISPR25 CLASS 5 AVG LIMITS
30
25
20
15
10
5
5
0
0
PK NOISE FLOOR
-5
-5
AVG NOISE FLOOR
-10
-10
0.1
1 Frequency (MHz)
30
10
0.1
CISPR25 Class 5 Peak Radiated
Emissions
1
30
10
Frequency (MHz)
CISPR25 Class 5 Average Radiated
Emissions
Horizontal, 30MHz to 1GHz
Horizontal, 30MHz to 1GHz
55
55
HORIZONTAL POLARIZATION
50
45
CISPR25 CLASS 5 PK LIMITS
40
35
30
25
20
15
10
PK NOISE FLOOR
5
45
40
35
30
25
15
10
5
0
-5
-5
130
230
CISPR25 CLASS 5 AVG LIMITS
20
0
30
HORIZONTAL POLARIZATION
50
AVG RADIATED EMI (dBµV)
PK RADIATED EMI (dBµV)
Frequency (MHz)
1
330
430
530
Frequency (MHz)
630
730
830
930
AVG NOISE FLOOR
30
130
230
330
430
530
Frequency (MHz)
630
730
MPQ4317 Rev. 1.0
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8/2/2021
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830
930
16
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 5V, IOUT = 7A, L = 4.7μH (7), fSW = 410kHz, TA = 25°C, unless otherwise noted.(8)
CISPR25 Class 5 Peak Radiated
Emissions
CISPR25 Class 5 Average Radiated
Emissions
Vertical, 30MHz to 1GHz
Vertical, 30MHz to 1GHz
55
55
VERTICAL POLARIZATION
50
CISPR25 CLASS 5 PK LIMITS
40
35
30
25
20
15
10
PK NOISE FLOOR
5
45
40
35
30
25
15
10
5
0
-5
-5
130
230
CISPR25 CLASS 5 AVG LIMITS
20
0
30
VERTICAL POLARIZATION
50
AVG RADIATED EMI (dBµV)
PK RADIATED EMI (dBµV)
45
330
430
530
Frequency (MHz)
630
730
830
930
AVG NOISE FLOOR
30
130
230
330
430
530
Frequency (MHz)
630
730
830
930
Note:
7) Inductor part number: XAL6060-472MEC. DCR = 15mΩ.
8) The EMC test results are based on the application circuit with EMI filters (see Figure 12).
MPQ4317 Rev. 1.0
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8/2/2021
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Steady State
Steady State
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH2:
VOUT/AC
10mV/div.
CH2:
VOUT/AC
50mV/div.
CH4: IL
1A/div.
CH4: IL
1A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
1μs/div.
40ms/div.
Steady State
Start-Up through VIN
IOUT = 7A
IOUT = 0A, AAM
CH2:
VOUT/AC
10mV/div.
CH3: VIN
5V/div.
CH2: VOUT
1V/div.
CH4: IL
1A/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH1: VSW
10V/div.
1μs/div.
1ms/div.
Start-Up through VIN
Start-Up through VIN
IOUT = 0A, FCCM
IOUT = 7A
CH3: VIN
5V/div.
CH3: VIN
5V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH4: IL
2A/div.
CH4: IL
5A/div.
CH1: VSW
10V/div.
CH1: VSW
10V/div.
1ms/div.
1ms/div.
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Shutdown through VIN
Shutdown through VIN
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH3: VIN
5V/div.
CH3: VIN
5V/div.
CH4: IL
1A/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH1: VSW
10V/div.
10ms/div.
10ms/div.
Shutdown through VIN
Start-Up through EN
IOUT = 7A
IOUT = 0A, AAM
CH3: VEN
2V/div.
CH3: VIN
5V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH4: IL
5A/div.
CH1: VSW
10V/div.
CH4: IL
2A/div.
CH1: VSW
10V/div.
400µs/div.
1ms/div.
Start-Up through EN
Start-Up through EN
IOUT = 0A, FCCM
IOUT = 7A
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
1V/div.
CH4: IL
2A/div.
CH2: VOUT
1V/div.
CH1: VSW
10V/div.
CH1: VSW
10V/div.
CH4: IL
5A/div.
1ms/div.
1ms/div.
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Shutdown through EN
Shutdown through EN
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH4: IL
1A/div.
CH2: VOUT
1V/div.
CH4: IL
1A/div.
CH2: VOUT
1V/div.
CH1: VSW
5V/div.
CH1: VSW
10V/div.
100ms/div.
100ms/div.
Shutdown through EN
SCP Entry
IOUT = 7A
IOUT = 0A, AAM
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH2: VOUT
1V/div.
CH4: IL
5A/div.
CH1: VSW
10V/div.
CH4: IL
10A/div.
CH1: VSW
10V/div.
100µs/div.
20ms/div.
SCP Entry
SCP Entry
IOUT = 0A, FCCM
IOUT = 7A
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
10A/div.
CH4: IL
10A/div.
CH1: VSW
10V/div.
CH1: VSW
10V/div.
20ms/div.
20ms/div.
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
SCP Recovery
SCP Recovery
IOUT = 0A, AAM
IOUT = 0A, FCCM
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
10A/div.
CH4: IL
10A/div.
CH1: VSW
10V/div.
CH1: VSW
10V/div.
10ms/div.
10ms/div.
SCP Recovery
SCP Steady State
IOUT = 7A
CH2: VOUT
1V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH4: IL
5A/div.
CH4: IL
10A/div.
CH1: VSW
10V/div.
CH1: VSW
10V/div.
10ms/div.
4ms/div.
Load Transient
SYNCIN Operation
IOUT = 3.5A to 7A, 1.6A/μs
IOUT = 7A, SYNC frequency = 350kHz
CH2: VOUT/AC
200mV/div.
CH3:
SYNCIN
2V/div.
CH1: VSW
10V/div.
CH2: VOUT
500mV/div.
CH4: IL
2A/div.
CH4: IOUT
2A/div.
100µs/div.
2µs/div.
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
SYNCIN Operation
SYNCO Operation
IOUT = 7A, SYNC frequency = 1000kHz
IOUT = 7A, SYNC frequency = 350kHz
CH3:
SYNCIN
2V/div.
CH3:
SYNCO
2V/div.
CH2: VOUT
1V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH2: VOUT
500mV/div.
CH1: VSW
10V/div.
CH4: IL
2A/div.
1µs/div.
2µs/div.
SYNCO Operation
PG in Start-Up through VIN
IOUT = 7A, SYNC frequency = 1000kHz
IOUT = 0A
CH3:
SYNCO
2V/div.
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
1V/div.
CH1: VSW
2V/div.
CH4: IL
2A/div.
CH4: VPG
2V/div.
CH1: VSW
10V/div.
1µs/div.
1ms/div.
PG in Start-Up through VIN
PG in Shutdown through VIN
IOUT = 7A
IOUT = 0A
CH3: VIN
5V/div.
CH3: VIN
5V/div.
CH2: VOUT
1V/div.
CH4: VPG
2V/div.
CH2: VOUT
2V/div.
CH4: VPG
2V/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
1ms/div.
20ms/div.
MPQ4317 Rev. 1.0
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
PG in Shutdown through VIN
PG in Start-Up through EN
IOUT = 7A
IOUT = 0A
CH3: VEN
2V/div.
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: VPG
2V/div.
CH4: VPG
2V/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
20ms/div.
1ms/div.
PG in Start-Up through EN
PG in Shutdown through EN
IOUT = 7A
IOUT = 0A
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: VPG
2V/div.
CH4: VPG
2V/div.
CH1: VSW
10V/div.
CH1: VSW
5V/div.
1ms/div.
100ms/div.
PG in Shutdown through EN
Low-Dropout Mode
IOUT = 7A
VIN = 3.3V, VOUT set to 3.3V, IOUT = 0A
CH3: VEN
2V/div.
CH4: IL
50mA/div.
CH2: VOUT
2V/div.
CH3: VIN
500mV/div.
CH1: VSW
1V/div.
CH2: VOUT
500mV/div.
CH4: VPG
2V/div.
CH1: VSW
10V/div.
1ms/div.
4µs/div.
MPQ4317 Rev. 1.0
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23
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.7μH, fSW = 470kHz, AAM, TA = 25°C, unless otherwise noted.
Low-Dropout Mode
Load Dump
VIN = 3.3V, VOUT set to 3.3V, IOUT = 7A
VIN = 12V to 36V, IOUT = 7A
CH3: VIN
10V/div.
CH2: VOUT
500mV/div.
CH4: IL
2A/div.
CH1: VSW
1V/div.
CH3: VIN
500mV/div.
CH2: VOUT
2V/div.
CH1: VSW
50V/div.
CH4: IL
5A/div.
4µs/div.
100ms/div.
Cold Crank
VIN Ramp Up and Down
VIN = 12V to 3.3V to 5V, IOUT = 7A
IOUT = 0.1A
CH3: VIN
5V/div.
CH2: VOUT
1V/div.
CH3: VIN
1V/div.
CH2: VOUT
1V/div.
CH1: VSW
5V/div.
CH4: IL
2A/div.
4ms/div.
1s/div.
VIN Ramp Down and Up
VIN Ramp Down and Up
IOUT = 1mA
IOUT = 7A
4.5V
CH3: VIN
10V/div.
4.5V
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
5A/div.
CH1: VSW
20V/div.
CH1: VSW
20V/div.
10s/div.
10s/div.
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
FUNCTIONAL BLOCK DIAGRAM
VCC
VCC
VCC
Regulator
VREF
EN
VIN
VCC
Reference
BST
Regulator
BST
FREQ
Oscillator
SYNCIN
SYNCO
PG
+
-
VPG_REF
VFB
Control Logic
SW
VCC
ISS
Error Amplifier
VREF
SS
ISW
VFB
+
+
-
VCOMP
1.15M
2pF
ILS
60pF
PGND
FB
AGND
MODE
Figure 1: Functional Block Diagram (Adjustable-Output Version)
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
FUNCTION BLOCK DIAGRAM (continued)
VCC
VCC
VCC
Regulator
VREF
EN
VIN
VCC
Reference
BST
Regulator
BST
FREQ
ISW
Oscillator
SYNCIN
SYNCO
PG
+
-
VFB
Control Logic
Error Amplifier
VREF
VFB
+
+
-
VCOMP
1.15M
R1
FB
SW
VCC
ISS
SS
VPG_REF
2pF
ILS
60pF
PGND
R2
AGND
MODE
Figure 2: Functional Block Diagram (Fixed-Output Version)
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
TIMING SEQUENCE DIAGRAM
VIN
0
SW
0
EN
Threshold
EN
0
15µs
VCC
Threshold
VCC
0
VOUT
95% of
VREF
93.5% of VREF
95% of
VREF
106.5% of
VREF
105% of VREF
93.5% of VREF
70% of VREF
SS
0
IL = ILIMIT
IL
0
PG
35µs
35µs
35µs
35µs
35µs
35µs
0
Start-Up
Normal
Normal
OCP
OV
Normal
Shutdown
OC
Release
Figure 3: Timing Sequence Diagram
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
OPERATION
The MPQ4317 is a synchronous, step-down
switching regulator with integrated internal highside and low-side power MOSFETs (HS-FETs and
LS-FETs, respectively). It provides 7A of highly
efficient output current (IOUT) with current mode
control.
It also features wide input voltage (VIN) range,
programmable switching frequency (fSW), external
soft start (SS), and precision current limit. Its very
low operational quiescent current (IQ) makes it well
suited for battery-powered applications.
Pulse-Width Modulation (PWM) Control
At moderate to high output currents, the MPQ4317
operates in a fixed-frequency, peak current control
mode to regulate the output voltage (VOUT). A
pulse-width modulation (PWM) cycle is initiated by
the internal clock. At the rising edge of the clock,
the HS-FET turns on and remains on until its
current reaches the value set by the internal
COMP voltage (VCOMP). Once the HS-FET is on, it
remains on for at least 100ns.
When the HS-FET is off, the LS-FET turns on
immediately and remains on until the next cycle
starts. Once the LS-FET is on, it remains on for at
least 80ns before next cycle starts.
If the current in the HS-FET does not reach the
COMP set current value within one PWM period,
then the HS-FET remains on, saving a shutdown
operation. If the on time lasts about 10µs, the HSFET is forced off even though VCOMP is not reached.
Light-Load Operation
Under light-load conditions, the MPQ4317 can
operate in two different modes by setting the
MODE pin to a different status (see Figure 4).
When the MODE pin is pulled above 1.8V, the
MPQ4317 works in forced continuous conduction
mode (FCCM). The part works with a fixed
frequency across the no-load to full-load range in
this mode. The advantage of FCCM is the
controllable frequency and lower output ripple at
light loads.
When the MODE pin is pulled below 0.4V, the
MPQ4317 works in advanced asynchronous
modulation (AAM) mode. AAM is intended to
optimize efficiency during light-load and no-load
conditions.
When AAM is enabled, the MPQ4317 first enters
non-synchronous operation for as long as the
inductor current (IL) approaches 0A at light loads.
If the load decreases further or there is no load
that makes VCOMP decrease to the set value, then
the MPQ4317 enters AAM. In AAM, the internal
clock resets every time VCOMP crosses over the set
value; the crossover time is taken as benchmark
of the next clock. When the load increases and
VCOMP exceeds the set value, the MPQ4317
operates in discontinuous conduction mode (DCM)
or CCM, which has a constant switching frequency.
Inductor
Current
Load
Decreases
Inductor
Current
AAM
FCCM
t
t
Load
t Decreases
t
t
t
Figure 4: AAM Mode and FCCM
Error Amplifier (EA)
The error amplifier (EA) compares the FB voltage
(VFB) with the internal reference voltage (VREF,
typically 0.815V) and outputs a current
proportional to the difference between the two.
IOUT is then used to charge the compensation
network to form VCOMP, which is used to control the
MOSFET current.
During operation, the minimum VCOMP is clamped
to 0.9V, and the maximum VCOMP is clamped to
2.0V. COMP is internally pulled down to GND in
shutdown mode.
Internal VCC Regulator
Most of the internal circuitry is powered by the
internal, 4.9V VCC regulator. This regulator takes
VIN as the input and operates across the full VIN
range. When VIN is above 4.9V, the VCC voltage
(VCC) is in full regulation. When VIN is below 4.9V,
VCC degrades.
Bootstrap Charging
The bootstrap capacitor (CBST) is charged and
regulated to about 5V by the dedicated internal
bootstrap regulator. When the voltage between
the BST and SW nodes falls below its regulation,
a PMOS pass transistor connected from VCC to
BST turns on to charge CBST. External circuitry
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
should provide enough voltage headroom to
facilitate the charging. When the HS-FET is on,
the BST voltage (VBST) exceeds VCC, so CBST
cannot be charged.
At higher duty cycles, the time period available for
bootstrap charging is shorter, so CBST may not be
sufficiently charged. If the external circuit does not
have sufficient voltage and time to charge CBST,
additional external circuitry can be used to ensure
VBST is within its normal operation range.
Low-Dropout Mode and BST Refresh
To improve dropout, the MPQ4317 is designed to
operate at close to 100% duty cycle as long as the
BST-to-SW-pin voltage is above 2.5V. If the
voltage from the BST pin to the SW pin drops
below 2.5V, the HS-FET turns off using the undervoltage lockout (UVLO) circuit, which allows the
LS-FET to conduct and refresh the charge on CBST.
In DCM or pulse-skip mode (PSM), the LS-FET is
forced on to refresh VBST.
Since the supply current sourced from CBST is low,
the HS-FET can remain on for more switching
cycles than are required to refresh the capacitor,
thus making the switching regulator’s duty cycle
high.
The effective duty cycle during the regulator’s
dropout period is mainly influenced by the voltage
drops across the power MOSFET, the inductor
resistance, the low-side diode, and the PCB
resistance.
Enable (EN) Control
EN is a digital control pin that turns the regulator
on and off. The MPQ4317 can be enabled by two
methods, described below:
The first is to enable the part via the external logic
H/L signal. When EN is pulled below its falling
threshold voltage (0.85V), the chip is put into the
lowest shutdown current mode. Force this pin
above the EN rising threshold voltage (1V) to turn
on the part.
The second is the configurable VIN under-voltage
lockout (UVLO) threshold. With a high enough VIN,
the chip can be enabled and disabled via the EN
pin. With the internal current source, this circuit
can generate a programmable VIN UVLO and
hysteresis (see Figure 5).
VIN
REN1
EN
REN2
Figure 5: Enable Divider Circuit
Frequency Programmable and Fold back
The MPQ4317’s oscillating frequency can be
configured either by an external resistor (RFREQ)
from the FREQ pin to ground, or by a logic level
SYNC signal.
To get the expected fSW, select the corresponding
RFREQ value using the fSW vs. RFREQ curve (see the
Typical Performance Characteristics section on
page 15). Note that fSW will fold back at high input
voltages to avoid the minimum on time being
triggered and VOUT going out of regulation. The
recommended fSW for car battery applications is
350kHz to 1000kHz. Table 1 lists recommended
RFREQ values for common frequencies. Higher
frequencies may be supported for the applications
that do not have a critical limit on fSW or have a
relatively low, stable VIN.
Table 1: Recommended RFREQ for Given fSW
RFREQ (kΩ)
86.6
80.6
75
62
59
54.9
49.9
45.3
41.2
37.4
34
30.9
28.7
26.1
fSW (kHz)
350
380
410
470
500
530
590
640
700
760
830
910
960
1000
Frequency Spread Spectrum (FSS)
The MPQ4317 uses a 12kHz modulation
frequency with a 128-steps triangular profile to
spread the internal oscillator frequency across a
20% (±10%) window. The steps are fixed, and
independent of the setting oscillator frequency to
optimize the frequency spread spectrum (FSS)
performance (see Figure 6 on page 30).
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
128 steps are
fixed
fSPAN = 20% x fSW
fMOD = 12kHz
Figure 6: Spread Spectrum Scheme
Side bands are created by modulating fSW with the
triangle modulation waveform. The emission
power of the fundamental fSW and its harmonics is
distributed into smaller pieces. Thus, the peak EMI
noise is reduced significantly.
Soft Start (SS)
The MPQ4317 implements soft start (SS) to
prevent the converter’s VOUT from overshooting
during start-up.
When the SS period starts, an internal current
source begins charging the external soft-start
capacitor (CSS). When the soft-start voltage (VSS)
is below the internal VREF, VSS overrides VREF and
the EA uses VSS as the reference. When VSS is
above VREF, VREF regains control. CSS can be
calculated with Equation (1):
CSS (nF) =
t SS (ms) ISS (μA)
= 13.5 t SS (ms) (1)
VREF (V)
The SS pin can be used for tracking and
sequencing.
Pre-Biased Start-Up
if VFB > VSS - 150mV at start-up, the output has
pre-biased voltage. Neither the HS-FET or LSFET turn on until VSS exceeds VFB.
Thermal Shutdown
Thermal shutdown is implemented to prevent the
chip from thermally running away. When the
silicon die temperature exceeds its upper
threshold, the power MOSFETs shut down. When
the temperature returns to below its lower
threshold, the chip is enabled and resumes normal
operation.
Current Comparator and Current Limit
The power MOSFET current is accurately sensed
via a current-sense MOSFET. It is then fed to the
high-speed current comparator for current mode
control. The current comparator takes this sensed
current as one of its inputs. When the HS-FET is
on, the comparator is blanked until the end of the
turn-on transition to dodge the sample inductor
current noise. Then the comparator compares the
MOSFET current with VCOMP. When the sensed
current is above VCOMP, the comparator outputs
low to turn off the HS-FET. The internal power
MOSFET’s maximum current is internally limited
cycle by cycle.
Hiccup Protection
When the output is shorted to ground, VOUT drops
below 70% of its nominal output, which causes the
IC to shut down momentarily and begin
discharging CSS. Once CSS is fully discharged, the
IC restarts with a full SS. This hiccup process
repeats until the fault is removed.
Start-Up and Shutdown
If both VIN and EN exceeds their appropriate
thresholds, the chip starts up. The reference block
starts first, generating a stable reference voltage
and currents, and then the internal regulator is
enabled. The regulator provides a stable supply
for the remaining circuitries.
While the internal supply rail is up, an internal
timer keeps the power MOSFET off for about 50µs
to blank any start-up glitches. When the SS block
is enabled, it first holds its output low to ensure the
remaining circuitries are ready, and then slowly
ramps up.
Three events can shut down the chip: EN low, VIN
low, thermal shutdown. During the shutdown
procedure, the signaling path is blocked first to
avoid any fault triggering. VCOMP and the internal
supply rail are then pulled down. The floating
driver is not subject to this shutdown command,
but its charging path is disabled.
Power Good (PG) Output
The MPQ4317 includes an open-drain power
good (PG) output that indicates whether the VOUT
is within its normal range. If using this function, a
pull-up resistor connected to the power source is
required. If VOUT is within 95% to 105% of the
nominal voltage, PG goes high. If VOUT is above
106.5% or below 93.5% of the nominal voltage,
PG goes low.
SYNCIN and SYNCO
fSW can be synced to the rising edge of the clock
signal applied at SYNCIN. The recommended
SYNCIN frequency range is 350kHz to 1000kHz.
Ensure that the SYNCIN off time is shorter than
the internal oscillator period; otherwise, the
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
internal clock will turn on the HS-FET before the
rising edge of SYNCIN. There is no other limit on
the pulse width of SYNCIN, but there is always
parasitic capacitance of the pad. So if the pulse
width is too short, a clear rising and falling edge
may not be seen due to the parasitic capacitance.
A pulse longer than 100ns is recommended in
applications.
When applying SYNCIN in AAM, drive SYNCIN
below its specified threshold (0.4V) or leave
SYNCIN floating before the MPQ4317 starts up to
enter AAM. An external SYNCIN clock can also be
added. To avoid SYNCIN floating when using this
function through an external clock, connect a
resistor to GND. Given SYNCIN’s drive capability,
the resistor is recommended to be between 10kΩ
and 51kΩ.
The SYNCO pin provides a default 180° phaseshifted clock to the internal oscillator. If there is no
external SYNCIN clock, SYNCO can provide a
180° phase-shifted clock compared with the
internal clock. If there is an external SYNCIN
clock, SYNCO provides a 180° phase-shifted
clock compared with the external SYNCIN clock.
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider connected to FB
sets VOUT (see Figure 7).
VOUT
V
(1 OUT )
VIN
VIN
ICIN ILOAD
(3)
The worst-case condition occurs at VIN = 2 x
VOUT, calculated with Equation (4):
MPQ4317
ICIN
RFB1
FB
VOUT
(4)
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
RFB2
Figure 7: Feedback Network
Calculate RFB2 with Equation (2):
RFB2
ILOAD
2
RFB1
VOUT
1
0.815V
(2)
Table 2 lists the recommended feedback resistor
values for common output voltages.
Table 2: Resistor Selection for Common Output
Voltages
VOUT (V)
RFB1 (kΩ)
RFB2 (kΩ)
3.3
100 (1%)
32.4 (1%)
5
100 (1%)
19.6 (1%)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
AC current to the converter while maintaining the
DC input voltage. For the best performance, use
low-ESR capacitors. Ceramic capacitors with
X5R or X7R dielectrics are highly recommended
because of their low ESR and small temperature
coefficients.
For most applications, use a 4.7µF to 10µF
capacitor. It is strongly recommended to use
another, lower-value capacitor (e.g. 0.1µF) with
a small package size (0603) to absorb highfrequency switching noise. Place the smaller
capacitor as close to VIN and GND as possible.
Since CIN absorbs the input switching current, it
requires an adequate ripple current rating. The
RMS current (ICIN) in the input capacitor can be
estimated with Equation (3):
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1μF) as close to the IC as
possible. When using ceramic capacitors,
ensure that they have enough capacitance to
provide a sufficient charge to prevent excessive
voltage ripple at the input. The input voltage
ripple (∆VIN) caused by the capacitance can be
estimated with Equation (5):
VIN
ILOAD
V
V
OUT (1 OUT )
fSW CIN VIN
VIN
(5)
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. Use ceramic, tantalum, or low-ESR
electrolytic capacitors. For best results, use lowESR capacitors to keep the output voltage ripple
low. The output voltage ripple (∆VOUT) can be
estimated with Equation (6):
ΔVOUT =
VOUT
V
1
(1- OUT ) (RESR +
) (6)
fSW L
VIN
8fSW COUT
Where L is the inductance, and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency and causes the majority of the output
voltage ripple. For simplification, the output
voltage ripple (∆VOUT) can be estimated with
Equation (7):
ΔVOUT =
VOUT
V
(1- OUT ) (7)
8 fSW L COUT
VIN
2
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output voltage
ripple (∆VOUT) can be estimated with Equation
(8):
VOUT
VOUT
V
(1 OUT ) RESR
fSW L
VIN
(9)
EN
RDOWN
The UVLO rising and falling thresholds can be
calculated with Equation (11) and Equation (12),
respectively:
INUVLO_RISING (1
RUP
) VEN_RISING (11)
RDOWN
INUVLO_FALLING (1
RUP
) VEN_FALLING (12)
RDOWN
Where VEN_RISING is 1V, and VEN_FALLING is 0.85V.
External BST Diode and Resistor
An external BST diode can enhance the
efficiency of the regulator when the duty cycle is
high. A 2.5V to 5V power supply can be used to
power the external bootstrap diode. VCC or VOUT
is recommended to be this power supply in the
circuit (see Figure 9).
VCC
RBST
Where ∆IL is the peak-to-peak inductor ripple
current.
Choose the inductor ripple current to be
approximately 30% of the maximum load current.
The maximum inductor peak current (ILP) can be
calculated with Equation (10):
VOUT
V
ILP ILOAD
(1 OUT )
2fSW L
VIN
RUP
Figure 8: Adjustable UVLO Using EN Divider
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
at least 25% greater than the maximum load
current is recommended for most applications.
For higher efficiency, choose an inductor with a
lower DC resistance. A larger-value inductor
results in less ripple current and a lower output
ripple voltage; however, it also has a larger
physical size, higher series resistance, and lower
saturation current. A good rule for determining
the inductor value is to allow the inductor ripple
current to be approximately 30% of the
maximum load current. The inductance (L) can
then be calculated with Equation (9):
VOUT
V
(1 OUT )
fSW IL
VIN
VIN
(8)
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MPQ4317 can be optimized for a wide range of
capacitances and ESR values.
L
VIN
(10)
VIN UVLO Setting
The MPQ4317 has an internal, fixed undervoltage lockout (UVLO) threshold. The rising
threshold is 3V, while the falling threshold is
about 2.7V. For the applications that require a
higher UVLO point, an external resistor divider
between VIN and EN can be used to achieve a
higher equivalent UVLO threshold (see Figure 8).
External BST diode
IN4148
BST
VCC / VOUT
CBST
L
VOUT
SW
COUT
Figure 9: Optional External Bootstrap Diode to
Enhance Efficiency
The recommended external BST diode is
IN4148, and the recommended CBST value is
0.1µF to 1μF. A resistor in series with the BST
capacitor (RBST) can reduce the SW rising rate
and voltage spikes. This helps enhance EMI
performance and reduce voltage stress at a high
VIN. A higher resistance is better for SW spike
reduction, but compromises efficiency. As a
tradeoff between EMI and efficiency, a ≤20Ω
RBST is recommended.
Selecting the VCC Capacitor
The VCC capacitor should be 10 times greater
than the boost capacitor. A VCC capacitor above
68µF (nominal) is not recommended.
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
PCB Layout Guidelines (9)
Efficient PCB layout is critical for stable
operation. A 4-layer layout is strongly
recommended to achieve better thermal
performance. For best results, refer to Figure 10
and follow the guidelines below:
1.
Place symmetric input capacitors as close to
VIN and GND as possible.
2.
Use a large ground plane to connect directly
to PGND.
3.
If the bottom layer is a ground plane, add
vias near PGND.
4.
Ensure that the high-current paths at GND
and VIN have short, direct, and wide traces.
5.
Place the ceramic input capacitor, especially
the small package size (0603) input bypass
capacitor, as close to VIN and PGND as
possible to minimize high-frequency noise.
6.
Keep the connection between the input
capacitor and VIN as short and wide as
possible.
7.
Place the VCC capacitor as close to VCC
and GND as possible.
8.
Route SW and BST away from sensitive
analog areas, such as FB.
9.
Place the feedback resistors close to the
chip to ensure that the trace that connects to
FB is as short as possible.
Top Layer
Mid-Layer 1
10. Use multiple vias to connect the power
planes to the internal layers.
Note:
Mid-Layer 2
9) The recommended PCB layout is based on Figure 11 .
Bottom Layer
Figure 10: Recommended PCB Layout
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MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
6
TYPICAL APPLICATION CIRCUITS
VIN 3.3V to 45V
3, 12
C1C
C1A C1B
GND
10µF 10µF 0.1µF
EN
VIN
C1D
SW
R1
100k
0.1µF
C4
0.1µF
BST
U1
L1
7, 8
R4
100k
MPQ4317
0.85V 1V
9 EN
20
FREQ
FB
19
18
Typ. 0.815V
R2
62k
SS
C3
22nF
PG
SYNCIN
VOUT
GND
R5
32.4k
14
PG
R6
100k
2
SYNCIN
VCC
R3
51k
16
C6
4.7µF FCCM
3
NC 15
MODE
1
2
JP1
AAM
4, 5,
10, 11
PGND
17 AGND
13 SYNCO
1
SYNCO
3.3V/7A
C2A C2B
C5
47µF 47µF
10V
47pF 10V
1210 1210
Typ. 13A 4.7µH
ILIMIT
Figure 11: Typical Application Circuit (VOUT = 3.3V, fSW = 470kHz)
4.7µH VIN
BLM41PG600SN1L
VEMI
CIN1
CIN2
1nF
10nF
L1
CIN3
1µF
CIN4
1µF
L2
CIN5
47µF
GND
C1A
GND
C1B
C1C
C4
0.1µF
BST
3, 12
6
U1
VIN 3.3V to 45V
VIN
C1D
10µF 10µF 0.1µF 0.1µF
SW
R1
7, 8
L3
Typ.13A 4.7µH
ILIMIT
100k
MPQ4317
COUT1
100k
9
EN
20
FREQ
FB Typ. 0.815V
SS
PG
10V
1210
GND
R5
19.6k
COUT2
COUT4
PG
NC
PGND
15
C6
4.7µF
1
2
JP1
4, 5,
10, 11
MODE
16
3
VCC
SYNCO
AGND
13
SYNCIN
17
SYNCO
10V
1210
VOUT
10nF 1nF
R6
100k
2
R3
51k
47pF
10nF 1nF
14
C3
22nF
SYNCIN
C2B
47µF
18
R2
75k
19
C2A
47µF
1
EN 0.85V 1V
C5
R4
5V/7A
COUT3
Figure 12: Typical Application Circuit (VOUT = 5V, fSW = 410kHz with EMI Filters)
MPQ4317 Rev. 1.0
MonolithicPower.com
8/2/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
35
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
6
TYPICAL APPLICATION CIRCUITS (continued)
VIN 3.3V to 45V
C1A C1B
3, 12 VIN
C1C
GND 10uF 10uF 0.1uF
C4
0.1uF
BST
U1
C1D
0.1uF
SW
R1
100k
EN
0.85V 1V
9 EN
20
FREQ
7,8
L1
7A
C2A C2B C2C C2D
47uF 47uF 22uF 22uF
Typ. 13A 4.7uH
ILIMIT
10V
1210
MPQ4317
FB
18
PG
14
10V 10V
1210 1210
10V
1210
VOUT
GND
R2
62k
SS
C3
22nF
2
R4
100k
SYNCIN
VCC
R3
51k
MODE
15
C5
4.7uF FCCM
1
2
1
SYNCO
PGND
13
17 AGND
SYNCO
NC
16
JP1
AAM
4,5,10,11
SYNCIN
PG
3
19
Figure 13: Typical Application Circuit (fSW = 470kHz, Fixed Output)
MPQ4317 Rev. 1.0
MonolithicPower.com
8/2/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
36
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
PACKAGE INFORMATION
QFN-20 (4mmx4mm)
Wettable Flank
PIN 1 ID
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
0.10x45°
TOP VIEW
BOTTOM VIEW
SIDE VIEW
SECTION A-A
NOTE:
1) THE LEAD SIDE IS WETTABLE.
2) ALL DIMENSIONS ARE IN MILLIMETERS.
3) LEAD COPLANARITY SHALL BE 0.08
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
MPQ4317 Rev. 1.0
MonolithicPower.com
8/2/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
37
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
CARRIER INFORMATION
1
Pin1
1
ABCD
1
1
ABCD
ABCD
ABCD
Feed Direction
Part Number
Package
Description
Quantity/
Reel
Quantity/
Tube (10)
Reel
Diameter
Carrier
Tape Width
Carrier
Tape Pitch
MPQ4317GRE-AEC1-Z
MPQ4317GRE-33-AEC1-Z
MPQ4317GRE-5-AEC1-Z
QFN-20
(4mmx4mm)
5000
N/A
13in
12mm
8mm
Note:
10) N/A indicates “not available” in tubes. For 500-piece tape & reel prototype quantities, please contact the factory. (The order code for a 500piece partial reel order is “-P”. Tape & reel dimensions are the same as the full reel.)
MPQ4317 Rev. 1.0
MonolithicPower.com
8/2/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
38
MPQ4317 – 45V, 7A, LOW IQ, SYNC STEP-DOWN CONVERTER WITH FSS
REVISION HISTORY
Revision # Revision Date Description
1.0
08/02/2021 Initial Release
Pages Updated
-
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MPQ4317 Rev. 1.0
MonolithicPower.com
8/2/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
39
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