MPQ4425A
High Efficiency 1.5A, 36V, 2.2MHz,
Synchronous Step-Down LED Driver,
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The
MPQ4425A
is
a
high-frequency,
synchronous, rectified, step-down, switch-mode
white LED driver with built-in power MOSFETs.
It offers a very compact solution to achieve 1.5A
of continuous output current with excellent load
and line regulation over a wide input supply
range. The MPQ4425A has synchronous mode
operation to get high efficiency.
Current mode operation provides fast transient
response and eases loop stabilization. Full
protection
features
include
over-current
protection (OCP) and thermal shutdown (TSD).
The MPQ4425A requires a minimal number of
readily available, standard external components,
and is available in a space-saving QFN-13
(2.5mmx3mm) package.
Wide 4V to 36V Operating Input Range
85mΩ/50mΩ Low RDS(ON) Internal Power
MOSFETs
High-Efficiency Synchronous Mode
Operation
Default 2.2MHz Switching Frequency
PWM Dimming (Min 100Hz Dimming
Frequency)
Forced CCM Mode
0.2V Reference Voltage
Internal Soft Start
Fault Indication for LED Short, Open, and
Thermal Shutdown
Over-Current Protection (OCP) with Valley
Current Detection
Thermal Shutdown
CISPR25 Class 5 Compliant
Available in a QFN-13 (2.5mmx3mm)
Package
Available in a Wettable Flank Package
Available in AEC-Q100 Grade-1
APPLICATIONS
Automotive LED Lighting
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive.
For MPS green status, visit the MPS website under Quality
Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
TYPICAL APPLICATION
BST
MPQ4425A
EN/DIM
SW
LED+
FB
LED-
EN/DIM
VCC
/FAULT
/FAULT
PGND AGND
MPQ4425A Rev. 1.0
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7/24/2019
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© 2019 MPS. All Rights Reserved.
1
MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
ORDERING INFORMATION
Part Number *
MPQ4425AGQB
MPQ4425AGQB-AEC1
MPQ4425AGQBE-AEC1**
Package
Top Marking
QFN-13 (2.5mmx3mm)
See Below
QFN-13 (2.5mmx3mm)
See Below
* For Tape & Reel, add suffix –Z (e.g. MPQ4425AGQB–Z).
** Wettable flank.
TOP MARKING (MPQ4425AGQB&MPQ4425AGQB-AEC1)
BDU: Product code of MPQ4425AGQB&MPQ4425AGQB-AEC1
Y: Year code
WW : Week code
LLL: Lot number
TOP MARKING (MPQ4425AGQBE-AEC1)
BDX: Product code of MPQ4425AGQBE-AEC1
Y: Year code
WW : Week code
LLL: Lot number
MPQ4425A Rev. 1.0
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7/24/2019
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© 2019 MPS. All Rights Reserved.
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
PACKAGE REFERENCE
TOP VIEW
IN
IN
PGND
PGND
PGND
BST
13
12
11
10
9
SW
8
AGND
7
VCC
1
2
3
4
5
6
NC
/FAULT
EN
/DIM
FB
QFN-13 (2.5mmx3mm)
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
PIN FUNCTIONS
Pin #
Name
Description
Supply voltage. The MPQ4425A operates from a 4V to 36V input rail. Requires CIN to
decouple the input rail. Connect using a wide PCB trace.
Do not connect.
1, 2
IN
3
NC
4
/FAULT
Fault indicator. Open-drain output. This pin is pulled low when an LED short, open, or
thermal shutdown occurs.
5
EN/DIM
Enable/dimming control. Pull EN high to enable the MPQ4425A. Apply a 100Hz to 2kHz
external clock to the EN/DIM pin for the PWM dimming.
6
FB
7
VCC
8
AGND
9
SW
10
BST
11, 12,
13
PGND
LED current feedback input.
Internal bias supply. Decouple VCC with a 0.1μF to 0.22μF capacitor. The capacitance
should not exceed 0.22μF.
Analog ground. Reference ground of the logic circuit. AGND is connected to PGND
internally. There is no need to add external connections to PGND.
Switch output. Connect using a wide PCB trace.
Bootstrap. Requires a capacitor connected between the SW and BST pins to form a floating
supply across the high-side switch driver. A 20Ω resistor placed between SW and the BST
capacitor is strongly recommended to reduce SW spike voltage.
Power ground. PGND is the reference ground of the power device, and requires careful
consideration during PCB layout. For best results, connect PGND with copper pours and
vias.
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
Supply voltage (VIN) ..................... -0.3V to +40V
Switch voltage (VSW) ............. -0.3V to VIN + 0.3V
BST voltage (VBST) ...............................VSW + 6V
All other pins ...............................-0.3V to +6V (2)
Continuous power dissipation (TA = 25°C) (3)
QFN-13 (2.5mmx3mm) ............................ 2.08W
Junction temperature ............................... 150°C
Lead temperature .................................... 260°C
Storage temperature ................ -65°C to +150°C
QFN-13 (2.5mmx3mm) .......... 60 ...... 13 ... °C/W
Recommended Operating Conditions
Supply voltage (VIN) ........................... 4V to 36V
LED current (ILED) .............................. Up to 1.5A
Operating junction temp (TJ) .... -40°C to +125°C
Notes:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may damage
the device.
2) About the details of EN/DIM pin’s ABS MAX rating, refer to the
Enable Control section on page 12.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ (MAX)
- TA) / θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
4) Measured on JESD51-7, 4-layer PCB.
MPQ4425A Rev. 1.0
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7/24/2019
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameter
Symbol
Supply current (shutdown)
Supply current (quiescent)
HS switch on resistance
LS switch on resistance
Switch leakage
Current limit (5)
Reverse current limit
Oscillator frequency
Maximum duty cycle
IIN
IQ
Condition
Min
HSRDS-ON
VEN = 0V
VEN = 2V, VFB = 1V, no switching
VBST-SW = 5V
12
0.6
85
LSRDS-ON
SW LKG
ILIMIT
VCC = 5V
VEN = 0V, VSW = 12V
Under 40% duty cycle
50
fSW
DMAX
VFB = 100mV
VFB = 100mV
2.5
1800
80
τON_MIN
Minimum on time (5)
Typ
Feedback voltage
VFB
Feedback current
IFB
TJ = 25°C
TJ = -40°C to +125°C
VFB = 250mV
192
184
4
1.2
2200
87
Max
Units
0.8
150
μA
mA
mΩ
105
1
5.5
2600
46
200
200
30
208
216
100
mΩ
μA
A
A
kHz
%
ns
mV
nA
EN rising threshold
VEN_RISING
1.1
1.45
1.8
V
EN falling threshold
EN threshold hysteresis
VEN_FALLING
VEN_HYS
0.7
1
450
1.3
V
mV
10
0.2
50
μA
μA
ms
EN input current
IEN
VEN = 2V
VEN = 0
EN turn-off delay
ENtd-off
10
5
0
25
VIN under-voltage lockout
rising threshold
INUVVth
3.2
3.5
3.8
V
2.8
3.1
3.5
V
VIN under-voltage lockout
falling threshold
VIN under-voltage lockout
hysteresis threshold
Over-voltage detection
(/FAULT pulled low)
INUVHYS
400
mV
FTVth-Hi
140%
VFB
20%
VFB
10
μs
Over-voltage detection
hysteresis
/FAULT delay
FTTd
/FAULT sink current
capability
VFT
/FAULT leakage current
VCC regulator
VCC load regulation
tSS
ICC = 0mA
4.6
ICC = 5mA
ILED = 1.5A, L = 2.2µH,
load = 2 series LED,
ILED from 10% to 90%
Thermal shutdown (5)
Thermal hysteresis
0.4
V
100
nA
4.9
5.2
V
1.5
4
%
IFT-LEAK
VCC
Soft-start time (5)
Sink 4mA
(5)
150
0.9
ms
170
°C
30
°C
Note:
5) Not tested in production. Guaranteed by design and characterization.
MPQ4425A Rev. 1.0
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7/24/2019
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© 2019 MPS. All Rights Reserved.
5
MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
TYPICAL CHARACTERISTICS
MPQ4425A Rev. 1.0
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7/24/2019
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, LOAD = 2 series LED, L = 2.2µH, fSW = 2.2MHz, TA = 25°C, unless otherwise noted.
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, LOAD = 2 series LED, L = 2.2µH, fSW = 2.2MHz, TA = 25°C, unless otherwise noted.
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, LOAD = 2 series LED, L = 2.2µH, fSW = 2.2MHz, TA = 25°C, unless otherwise noted.
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, LOAD = 2 series LED, L = 2.2µH, fSW = 2.2MHz, TA = 25°C, unless otherwise noted.
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
FUNCTIONAL BLOCK DIAGRAM
IN
VCC
VCC
RSEN
Current-Se ns e
Amplif er
Regula tor
Boot strap
Regula tor
Os cillator
HS
Drive r
Com parato r
On Time Con tr ol
Logic Contro l
1 pF
EN/DIM
Refe re nc e
6.5V
56pF
300k
BST
SW
VCC
Current Lim it
Comparator
LS
Drive r
400k
FB
Error Amplifier
AGND
/FAULT
PGND
Figure 1: Functional Block Diagram
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
OPERATION
The
MPQ4425A
is
a
high-frequency,
synchronous, rectified, step-down, switch-mode
white LED driver with built-in power MOSFETs.
It offers a very compact solution to achieve 1.5A
of continuous output current with excellent load
and line regulation over a 4V to 36V input supply
range.
between the two. This output current then
charges or discharges the internal compensation
network to form VCOMP, which controls the power
MOSFET current. The optimized internal
compensation network minimizes the external
component counts and simplifies the control loop
design.
The MPQ4425A operates in fixed-frequency,
peak current control mode to regulate the output
current. An internal clock initiates a PWM cycle.
The integrated high-side power MOSFET turns
on and remains on until its current reaches the
value set by the COMP voltage (VCOMP). When
the power switch is off, it remains off until the
next clock cycle starts. If the current in the power
MOSFET does not reach the current value set by
VCOMP within 87% of one PWM period, the power
MOSFET is forced off.
Enable Control (EN)
EN/DIM is a control pin that turns the regulator
on and off. Drive EN/DIM high to turn on the
regulator. Drive it low to turn the regulator off. An
internal 400kΩ resistor from EN/DIM to GND
allows EN/DIM to be floated to shut down the
chip.
Internal Regulator
The 4.9V internal regulator powers most of the
internal circuitries. This regulator takes VIN and
operates in the full VIN range. When VIN exceeds
4.9V, the output of the regulator is in full
regulation. When VIN falls below 4.9V, the output
decreases following VIN. A 0.1µF ceramic
decoupling capacitor is needed at VCC.
CCM Operation
The MPQ4425A uses continuous conduction
mode (CCM) to ensure that the part works with
fixed frequency across a no-load to full-load
range. The advantage of CCM is the controllable
frequency and lower output ripple at light load.
Frequency Foldback
The MPQ4425A enters frequency foldback when
the input voltage is greater than about 21V. Then,
the frequency decreases to half the nominal
value and changes to 1.1MHz.
Frequency foldback also occurs during soft start
and short-circuit protection.
Error Amplifier (EA)
The error amplifier compares the FB pin voltage
to the internal 0.2V reference (VREF) and outputs
a current proportional to the difference
EN/DIM is clamped internally using a 6.5V series
Zener diode (see Figure 2). Connect the EN/DIM
input to the voltage on VIN through a pull-up
resistor to limit the EN input current to less than
100µA. For example, with 12V connected to VIN,
RPULLUP ≥ (12V - 6.5V) ÷ 100µA = 55kΩ.
Connecting EN/DIM to a voltage source directly
without a pull-up resistor requires limiting the
amplitude of the voltage source to ≤6V to prevent
damage to the Zener diode.
Figure 2: 6.5V Zener Diode Connection
Driving EN/DIM low for longer than 25ms will
shut down the IC.
PWM Dimming
Apply an external 100Hz to 2kHz PWM
waveform to EN/DIM for PWM dimming. The
average LED current is proportional to the PWM
duty. The minimum amplitude of the PWM signal
is 1.8V. If the dimming signal is applied before
the chip starts up, the dimming signal’s on time
must be longer than 2ms to ensure soft start
finishes, so the output current can be built. If the
dimming signal is applied after soft start finishes,
this 2ms limit is not required.
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The UVLO comparator monitors the output
voltage of the internal regulator (VCC).
Internal Soft Start (SS)
Soft start (SS) prevents the converter output
voltage from overshooting during start-up. When
the chip starts up, the internal circuitry generates
a soft-start voltage (VSS). When VSS is below the
internal reference (VREF), VSS overrides VREF, so
the error amplifier uses VSS as the reference.
When VSS exceeds VREF, the error amplifier uses
VREF as the reference.
Fault Indicator
The MPQ4425A has fault indication. The
/FAULT pin is the open drain of a MOSFET. It
should be connected to VCC or some other
voltage source through a resistor (e.g. 100kΩ).
/FAULT is pulled high at normal operation. An
LED short, open, or thermal shutdown will pull
down this pin to indicate a fault status.
Over-Current Protection (OCP)
The MPQ4425A has cycle-by-cycle peak current
limit protection with valley-current detection. The
inductor current is monitored during the highside MOSFET (HS-FET) on-state. If the inductor
current exceeds the current-limit value set by the
COMP high-clamp voltage, the HS-FET turns off
immediately. Then the low-side MOSFET (LSFET) turns on to discharge the energy, and the
inductor current decreases. The HS-FET
remains off unless the inductor valley current is
below a certain current threshold (the valley
current limit), even though the internal clock
pulses high. If the inductor current does not drop
below the valley current limit when the internal
clock pulses high, the HS-FET misses the clock,
and the switching frequency decreases to half
the nominal value. Both the peak and valley
current limits assist in keeping the inductor
current from running away during an overload or
short-circuit condition.
Thermal Shutdown (TSD)
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the die temperature exceeds 170°C, the
entire chip shuts down. When the temperature
drops below its lower threshold (typically 140°C),
the chip is enabled again.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection, with a rising
threshold of 2.2V and hysteresis of 150mV. The
bootstrap capacitor voltage is regulated
internally by VIN through D1, M1, C3, L1, and C4
(see Figure 3). If (VIN - VSW) exceeds 5V, U1
regulates M1 to maintain a 5V BST voltage
across C4.
As long as VIN is sufficiently higher than SW, the
bootstrap capacitor can be charged. When the
HS-FET is on, VIN ≈ VSW, so the bootstrap
capacitor cannot be charged. When the LS-FET
is on, VIN - VSW reaches its maximum for fast
charging. When there is no inductor current, VSW
= VOUT, so the difference between VIN and VOUT
can charge the bootstrap capacitor. A 20Ω
resistor placed between SW and the BST
capacitor is strongly recommended to reduce
SW spike voltage.
Figure 3: Internal Bootstrap Charging Circuit
Start-Up and Shutdown
If both VIN and EN exceed their appropriate
thresholds, the chip starts up. The reference
block starts first, generating a stable reference
voltage and current, and then the internal
regulator is enabled. The regulator provides a
stable supply for the remaining circuitries.
Three events can shut down the chip: VIN low,
EN low, and thermal shutdown. During the
shutdown procedure, the signaling path is first
blocked to avoid any fault triggering. VCOMP and
the internal supply rail are then pulled down. The
floating driver is not subject to this shutdown
command.
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
APPLICATION INFORMATION
Setting the Output Current
The output current is set by the external resistor
RFB (see Figure 4). The feedback reference
voltage is 0.2V, and ILED is calculated with
Equation (1):
I LED
0.2V
R FB
Since CIN absorbs the input switching current, it
requires an adequate ripple current rating. The
RMS current in the input capacitor can be
estimated with Equation (2):
ICIN ILED
(1)
LED+
SW
VOUT
V
(1 OUT )
VIN
VIN
The worst-case scenario occurs at VIN = 2VOUT,
calculated with Equation (3):
ICIN
RT
FB
RFB
LED-
Figure 4: Feedback Network
RT is used to set the loop bandwidth. The lower
the value of RT, the higher the bandwidth. High
bandwidth may cause insufficient phase margin,
resulting in loop instability. Therefore, a proper
RT value is needed to make a tradeoff between
the bandwidth and phase margin. Table 1 lists
recommended feedback resistor and RT values
for common outputs with 1 or 2 series LED.
Table 1: Resistor Values for Common Outputs
ILED (A)
RFB (mΩ)
RT (kΩ)
0.5
400 (1%)
200 (1%)
1
200 (1%)
150 (1%)
1.5
133 (1%)
100 (1%)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
the AC current to the converter while maintaining
the DC input voltage. For the best performance,
use low-ESR capacitors. Ceramic capacitors
with X5R or X7R dielectrics are highly
recommended because of their low ESR and
small temperature coefficients.
For most applications, use a 4.7µF to 10µF
capacitor. It is strongly recommended to use
another, lower-value capacitor (e.g. 0.1µF) with
a small package size (0603) to absorb highfrequency switching noise. Be sure to place the
small capacitor as close to the IN and GND pins
as possible.
(2)
ILED
2
(3)
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1μF) as close to the IC as
possible. When using ceramic capacitors,
ensure that they have enough capacitance to
provide a sufficient charge to prevent excessive
voltage ripple at input. The input voltage ripple
caused by the capacitance can be estimated
with Equation (4):
VIN
V
V
ILED
OUT (1 OUT )
fSW CIN VIN
VIN
(4)
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. Use ceramic, tantalum, or low-ESR
electrolytic capacitors. For best results, use lowESR capacitors to keep the output voltage ripple
low. The output voltage ripple can be estimated
with Equation (5):
VOUT
VOUT
V
1
(1 OUT ) (RESR
) (5)
fSW L
VIN
8fSW COUT
Where L is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency, and causes the majority of the output
voltage ripple. For simplification, the output
voltage ripple can be estimated with Equation
(6):
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
VOUT
VOUT
V
(1 OUT ) (6)
2
8 fSW L COUT
VIN
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be estimated with Equation (7):
VOUT
VOUT
V
(1 OUT ) RESR
fSW L
VIN
(7)
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MPQ4425A can be optimized for a wide range of
capacitance and ESR values.
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
at least 25% higher than the maximum load
current is recommended for most applications.
For higher efficiency, choose an inductor with a
lower DC resistance. A larger-value inductor
results in less ripple current and a lower output
ripple voltage. However, the larger-value
inductor also has a larger physical size, higher
series resistance, and lower saturation current.
A good rule for determining the inductor value is
to allow the inductor ripple current to be
approximately 30% of the maximum load
current. The inductance value can be then be
calculated with Equation (8):
L
VOUT
V
(1 OUT )
fSW IL
VIN
(8)
Where ΔIL is the peak-to-peak inductor ripple
current.
Choose the inductor ripple current to be
approximately 30% of the maximum load current.
The maximum peak inductor current can be
calculated with Equation (9):
ILP ILED
VOUT
V
(1 OUT )
2fSW L
VIN
UVLO point, an external resistor divider between
the IN and EN/DIM pins can be used to get a
higher equivalent UVLO threshold (see Figure 5).
VIN
IN
RUP
EN/DIM
RDOWN
400kΩ
Figure 5: Adjustable UVLO Using EN Divider
The UVLO threshold can be calculated with
Equation (10) and Equation (11):
INUVRISING (1
RUP
) VEN_RISING
400k//RDOWN
(10)
INUVFALLING (1
RUP
) VEN_FALLING
400k//RDOWN
(11)
Where VEN_RISING = 1.45V, VEN_FALLING = 1V.
When choosing RUP, ensure it is big enough to
limit the current flows into the EN/DIM pin below
100µA.
BST Resistor and External BST Diode
A 20Ω resistor in series with the BST capacitor
is recommended to reduce the SW spike voltage.
A higher resistance leads to better SW spike
reduction, but decreases efficiency.
An external BST diode can enhance the
efficiency of the regulator when the duty cycle is
high (>65%). A power supply between 2.5V and
5V can be used to power the external bootstrap
diode. VCC or VOUT are the best choices for
power supply in the circuit (see Figure 6).
(9)
VIN UVLO Setting
The MPQ4425A has an internal, fixed undervoltage lockout (UVLO) threshold. The rising
threshold is 3.5V, and the falling threshold is
about 3.1V. If the application requires a higher
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
Top Layer
Figure 6: Optional External Bootstrap Diode to
Enhance Efficiency
The recommended external BST diode is the
IN4148, and the recommended BST capacitor
value is 0.1µF to 1μF.
PCB Layout Guidelines (6)
Efficient PCB layout, especially input capacitor
placement, is critical for stable operation. A 4layer layout is strongly recommended to achieve
better thermal performance. For best results,
refer to Figure 7 and follow the guidelines below:
1.
Inner 1 Layer
Use a large ground plane to connect directly
to PGND. If the bottom layer is a ground
plane, add vias near PGND.
2.
Ensure that the high-current paths at PGND
and IN have short, direct, and wide traces.
3.
Place the ceramic input capacitor, especially
the small package (0603) input bypass
capacitor, as close to IN and PGND as
possible to minimize high-frequency noise.
4.
Keep the connection between the input
capacitor and IN as short and wide as
possible.
5.
Place the VCC capacitor to the VCC and
GND pins as close as possible.
6.
Route SW and BST away from sensitive
analog areas, such as FB.
7.
Place the feedback resistors close to the
chip to ensure the trace that connects to FB
is as short as possible.
8.
Use multiple vias to connect the power
planes to internal layers.
Inner 2 Layer
Bottom Layer
Figure 7: Recommended PCB Layout
Note:
6) The recommended layout is based on Figure 8.
MPQ4425A Rev. 1.0
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
TYPICAL APPLICATION CIRCUIT
VIN
U1
4V to 36V
R1
1M
GND
C1A
10μF
1210
50V
C1B
10μF
1210
50V
1, 2
C1C
0.1μF
0603
50V
5
EN/DIM
7
R2
10
BST
IN
20
C3
0.1μF
L1
MPQ4425A
EN/DIM
VCC
9
SW
PGND
1.5A
C4
10μF
16V
2.2μH
LED+
11,12,13
C2
0.1μF
R7
100k
R3
4 /FAULT FB 6
100k
AGND
LED-
8
/FAULT
R4
R5
R6
400m
400m
400m
1206
1206
1206
Figure 8: IO = 1.5A Application Circuit
VIN
4V to 36V
FB1
1206
VEMI
GND
CIN1
1nF
50V
0603
CIN2
10nF
50V
0603
CIN3
1µF
50V
1206
U1
L1
2.2µH
CIN4
10µF
50V
1210
1, 2
CIN5
10µF
50V
1210
R1
1M
0603
C1A
10µF
1206
50V
C1B
10µF
1206
50V
C1C
0.1µF
0603
50V
5
EN/DIM
7
R7
100k
0603
10
C3
0.1µF/16V
0603
MPQ4425A
EN/DIM
VCC
SW
PGND
9
L2
2.2µH
L3
150nH
1.5A
LED+
C4
10µF/16V
1210
C5
1nF/16V
0603
11,12,13
4 /FAULT FB 6
AGND
8
/FAULT
C2
0.1µF/16V
0603
BST
IN
R2
20
0603
R3
200k
0603
R4
400m
1206
R5
400m
1206
LEDR6
400m
1206
Figure 9: IO = 1.5A Application Circuit with EMI Filters
MPQ4425A Rev. 1.0
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7/24/2019
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
PACKAGE INFORMATION
QFN-13 (2.5mmx3mm)
Non-Wettable Flank
PIN 1 ID
MARKING
PIN 1 ID
0.15X45º TYP
PIN 1 ID
INDEX AREA
BOTTOM VIEW
TOP VIEW
SIDE VIEW
0.15X45º
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
3) JEDEC REFERENCE IS MO-220.
4) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
MPQ4425A Rev. 1.0
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7/24/2019
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MPQ4425A – 36V, 1.5A, SYNCHRONOUS STEP-DOWN LED DRIVER
PACKAGE INFORMATION
QFN-13 (2.5mmx3mm)
Wettable Flank
PIN 1 ID
MARKING
PIN 1 ID
0.15X45º TYP
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
SECTION A-A
NOTE:
0.15X45º
1) THE LEAD SIDE IS WETTABLE.
2) ALL DIMENSIONS ARE IN MILLIMETERS.
3) LEAD COPLANARITY SHALL BE 0.08
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MPQ4425A Rev. 1.0
www.MonolithicPower.com
7/24/2019
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
19