MPQ4467
36V, 2.5A, Low Quiescent Current,
Asynchronous, Step-Down Converter,
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ4467 is a frequency-programmable
(350kHz to 2.5MHz), asynchronous, step-down
switching regulator with an integrated internal
high-side power MOSFET. It provides up to
2.5A of highly efficient output current with
current mode control for fast loop response.
The wide 3.3V to 36V input range accommodates
a variety of step-down applications in automotive
input environments, and is ideal for batterypowered applications due to its extremely low
quiescent current.
The MPQ4467 employs AAM (advanced
asynchronous modulation) mode, which helps
achieve high efficiency in light-load conditions
by scaling down the switching frequency to
reduce the switching and gate driver losses.
Standard features include soft start (SS),
external clock sync, enable (EN) control, and a
power good (PG) indicator. High duty cycle and
low dropout mode are provided for automotive
cold crank conditions.
Over-current protection (OCP) is employed to
prevent inductor current runaway. Hiccup mode
greatly reduces the average current in a shortcircuit condition. Thermal shutdown provides
reliable, fault-tolerant operation.
Wide 3.3V to 36V Operating Input Range
2.5A Continuous Output Current
1μA Low Shutdown Mode Current
10μA Sleep Mode Quiescent Current
Internal 90mΩ High-Side MOSFET
350kHz to 2.5MHz Programmable
Switching Frequency
Synchronize to External Clock
Selectable In-Phase or 180° Out-of-Phase
Power Good Indicator
Programmable Soft-Start Time
80ns Minimum On Time
Low Dropout Mode
Over-Current Protection and Hiccup Mode
Available in a QFN-16 (3mmx4mm)
Package
AEC-Q100 Grade 1
APPLICATIONS
Automotive Systems
Industrial Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
The MPQ4467 is available in a QFN-16
(3mmx4mm) package.
TYPICAL APPLICATION
VIN
Efficiency vs. Load Current
3.3 to 36V
VOUT = 5V, fSW = 500kHz
VIN
SW
MPQ4467
GND
FREQ
FB
PG
VCC
SS
BIAS
VOUT
EFFICIENCY (%)
SYNC
PHASE
90
BST
EN
80
70
VIN=12V
VIN=24V
VIN=36V
60
10
MPQ4467 Rev. 1.0
8/30/2019
100
1000
LOAD CURRENT (mA)
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© 2019 MPS. All Rights Reserved.
1
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MSL Rating**
MPQ4467GL-AEC1
QFN-16 (3mmx4mm)
See Below
1
* For Tape & Reel, add suffix –Z (e.g. MPQ4467GL–AEC1–Z).
** Moisture Sensitivity Level Rating
TOP MARKING
MP: MPS prefix
Y: Year code
W: Week code
4467: First four digits of the part number
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
FREQ
16
FB
SS
AGND
15
14
13
PHASE
1
12
VCC
VIN
2
11
BST
SW
3
10
SW
PGND
4
9
5
EN
6
SYNC
7
PG
PGND
8
BIAS
QFN-16 (3mmx4mm)
MPQ4467 Rev. 1.0
8/30/2019
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2
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
Name
1
PHASE
2
VIN
3, 10
SW
4, 9
PGND
5
EN
6
SYNC
7
PG
8
BIAS
11
BST
12
VCC
13
AGND
Description
Selectable in-phase or 180° out-of-phase SYNC input. Drive this pin high to be in
phase, and drive it low to be 180° out of phase. If the SYNC function is not used, connect
to GND. Do not float the pin to avoid the risk of an uncertain status.
Input supply. VIN supplies power to all of the internal control circuitries and the power
switch connected to SW. Place a decoupling capacitor to ground close to VIN to minimize
switching spikes.
Switch node. SW is the output of the internal power switch.
Power ground. PGND is the reference ground of the power device, and requires careful
consideration during PCB layout. For best results, connect PGND with copper pours and
vias.
Enable. Pull this pin below the specified threshold to shut down the chip. Pull it above the
specified threshold to enable the chip.
Synchronize. Apply a 350kHz to 2.5MHz clock signal to this pin to synchronize the
internal oscillator frequency to the external clock. The external clock should be at least
250kHz greater than the RFREQ set frequency. Connect to GND if not used.
Power good indicator. The output of this pin is an open drain, and goes high if the
output voltage is within ±10% of the nominal voltage.
External power supply for internal regulator. Connect BIAS to an external power
supply (5V ≤ VBIAS ≤ 18V) to reduce power dissipation and increase efficiency. Float this
pin or connect to GND if not used.
Bootstrap. BST is the positive power supply of the high-side MOSFET driver connected
to SW. Connect a bypass capacitor between BST and SW.
Internal bias supply. VCC supplies power to the internal control circuit and gate drivers.
A ≥1µF decoupling capacitor to ground is required close to this pin.
Analog ground. Reference ground of the logic circuit.
14
SS
Soft start input. Place an external capacitor from SS to AGND to set the soft-start time.
The MPQ4467 sources 10µA from SS to the soft-start capacitor at start-up. As the SS
voltage rises, the feedback threshold voltage increases to limit inrush current during startup.
15
FB
Feedback input. Connect FB to the tap of an external resistor divider from the output to
AGND to set the output voltage. The feedback threshold voltage is 0.8V. Place the
resistor divider as close to FB as possible. Avoid placing vias on the FB traces.
16
FREQ
Switching frequency program. Connect a resistor from this pin to ground to set the
switching frequency.
MPQ4467 Rev. 1.0
8/30/2019
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© 2019 MPS. All Rights Reserved.
3
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Supply voltage (VIN) ..................... -0.3V to +40V
Switch voltage (VSW) ............. -0.3V to VIN + 0.3V
BST voltage (VBST) ............................ VSW + 6.5V
EN voltage (VEN) .......................... -0.3V to +40V
BIAS voltage (VBIAS) ..................... -0.3V to +20V
All other pins .................................. -0.3V to +6V
Continuous power dissipation (TA = 25°C) (2)
QFN-16 (3mmx4mm) .................................2.6W
Operating junction temperature................ 150°C
Lead temperature .................................... 260°C
Storage temperature ................ -65°C to +150°C
QFN-16 (3mmx4mm)
JESD51-7(4) ............................ 48 ...... 11 ... C/W
EVQ4467-L-00A(5) .................. 41 ....... 4 .... C/W
Electrostatic Discharge (ESD) Level
HBM (Human Body Model) .................... ±2000V
CDM (Charged Device Model) ................ ±750V
Recommended Operating Conditions
Supply voltage (VIN) ........................ 3.3V to 36V
Operating junction temp (TJ) .............................
...................................... -40°C to +125°C (3)
MPQ4467 Rev. 1.0
8/30/2019
Notes:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) Operation devices at junction temperature greater than 125°C
is possible; contact MPS for details.
4) The value of θJA given in this table is only valid for comparison
with other packages and cannot be used for design purposes.
These values were calculated in accordance with JESD51-7,
and simulated on a specified JEDEC board. They do not
represent the performance obtained in an actual application.
5) Measured on EVQ4467-L-00A, 4-layer PCB, 6.35cmx6.35cm.
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4
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameter
Symbol
VIN quiescent current
IQ
VIN shutdown current
ISHDN
VIN under-voltage lockout
threshold rising
INUVRISING
VIN under-voltage lockout
threshold hysteresis
INUVHYS
Feedback reference voltage
VREF
Switching frequency
fSW
Condition
VFB = 0.85V, no load,
no switching, TJ = 25°C
VFB = 0.85V, no load,
no switching
Minimum on time
2.3
VSYNC_LOW
Sync input high voltage
VSYNC_HIGH
Current limit
ILIMIT_HS
Switch leakage current
ISW_LKG
HS switch on resistance
RON_HS
Soft-start current
ISS
EN rising threshold
TJ = 25°C
RFREQ = 180kΩ or from sync
clock
RFREQ = 82kΩ or from sync clock
VEN_HYS
PG rising threshold (VFB / VREF)
PGRISING
PG falling threshold (VFB / VREF)
PGFALLING
PG deglitch timer
tPG_DEGLITCH
PG output voltage low
VPG_LOW
VCC regulator
18
25
1
5
µA
2.8
3.2
V
mV
784
800
816
mV
792
800
808
mV
400
475
550
kHz
850
1000
1150
kHz
2250
2500
2750
kHz
ns
1.8
Duty cycle = 40%
4.7
V
5.8
7.3
A
1
µA
90
155
mΩ
5
10
15
µA
0.9
1.05
1.2
V
120
mV
VFB rising
85
90
95
VFB falling
105
110
115
VFB falling
79
84
89
%
VFB rising
113.5
118.5
123.5
%
Thermal shutdown hysteresis
(6)
%
PG from low to high
30
µs
PG from high to low
50
µs
ISINK = 2mA
0.2
0.4
5
ICC = 5mA
Thermal shutdown (6)
V
0.01
VBST - VSW = 5V
VSS = 0.8V
Units
10
0.4
VCC
VCC load regulation
10
80
VEN_RISING
EN threshold hysteresis
Max
150
tON_MIN
Sync input low voltage
Typ
µA
VEN = 0V
RFREQ = 27kΩ or from sync clock
(6)
Min
V
V
3
%
TSD
170
C
TSD_HYS
20
°C
Note:
6)
Not tested in production. Guaranteed by design and characterization.
MPQ4467 Rev. 1.0
8/30/2019
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5
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Quiescent Current vs. Temperature
Shutdown Current vs. Temperature
1.5
20.0
1.4
1.3
1.2
ISHDN (μA)
IQ (μA)
15.0
10.0
1.1
1.0
0.9
0.8
5.0
0.7
0.6
0.5
0.0
-50
-25
0
25
50
75
100
-50
125
-25
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
VIN UVLO Threshold vs. Temperature
Feedback Reference vs. Temperature
801.0
3.0
Rising
Falling
2.9
800.5
800.0
2.8
VREF (mV)
UVLO (V)
0
799.5
2.7
799.0
798.5
2.6
798.0
2.5
797.5
2.4
797.0
-50
-25
0
25
50
75
100
125
-50
-25
0
TEMPERATURE (°C)
50
75
100
125
TEMPERATURE (°C)
Switching Frequency vs.
Temperature
Current Limit vs. Temperature
1050
6.0
1030
5.9
ILIMIT_HS (A)
fSW (kHz)
25
1010
990
970
5.8
5.7
5.6
950
5.5
-50
-25
0
25
50
75
TEMPERATURE (°C)
MPQ4467 Rev. 1.0
8/30/2019
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
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6
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
HS-FET On Resistance vs.
Temperature
10.2
150
140
10.1
130
10.0
120
RON_HS (mΩ)
Soft-Start Current vs. Temperature
ISS (μA)
110
100
90
80
9.9
9.8
9.7
70
9.6
60
50
9.5
-50
-25
0
25
50
75
100
125
-50
-25
0
TEMPERATURE (°C)
75
100
125
PG Rising Threshold (VFB Rising) vs.
Temperature
1.10
PGRISING (VFB/VREF)
91.0%
1.05
VEN_TH (V)
50
TEMPERATURE (°C)
EN Threshold vs. Temperature
90.5%
Rising
Falling
1.00
90.0%
89.5%
0.95
89.0%
0.90
-50
-25
0
25
50
75
100
-50
125
-25
TEMPERATURE (°C)
0
25
50
75
100
125
TEMPERATURE (°C)
PG Rising Threshold (VFB Falling) vs.
Temperature
PG Falling Threshold (VFB Falling) vs.
Temperature
85.0%
PGFALLING (VFB/VREF)
112%
PGRISING (VFB/VREF)
25
111%
84.5%
110%
84.0%
109%
83.5%
108%
83.0%
-50
-25
0
25
50
75
TEMPERATURE (°C)
MPQ4467 Rev. 1.0
8/30/2019
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
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7
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
PG Falling Threshold (VFB Rising) vs.
Temperature
PGFALLING (VFB/VREF)
120%
119%
118%
117%
116%
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
MPQ4467 Rev. 1.0
8/30/2019
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8
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
fSW vs. RFREQ
6.5
3,000
6.0
2,500
2,000
fSW (kHz)
ILIMIT_HS (A)
Current Limit vs. Duty Cycle
5.5
1,500
5.0
1,000
4.5
500
4.0
0
0
10 20 30 40 50 60 70 80 90 100
0 100 200 300 400 500 600 700 800 9001,000
RFREQ (kΩ)
DUTY CYCLE (%)
Output Voltage vs. Load Current
Dropout Performance
Line Regulation
0.06
4.5
0.04
LINE REGULATION (%)
VOUT (V)
(Set nominal VOUT > VIN)
5.0
4.0
VIN=3.3V
VIN=5V
3.5
3.0
2.5
2.0
0
0.5
1
1.5
IOUT (A)
2
2.5
2
2.5
0.02
0
-0.02
IOUT=1A
-0.04
IOUT=2A
-0.06
0
5
10 15 20 25 30
INPUT VOLTAGE (V)
35
40
Load Regulation
0.08
LOAD REGULATION (%)
0.06
0.04
0.02
0
-0.02
VIN=12V
VIN=24V
VIN=36V
-0.04
-0.06
-0.08
0
0.5
1
1.5
LOAD CURRENT (A)
MPQ4467 Rev. 1.0
8/30/2019
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9
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
VOUT = 3.3V, fSW = 500kHz
VOUT = 3.3V, fSW = 1MHz
90
80
70
VIN=12V
VIN=24V
VIN=36V
EFFICIENCY (%)
EFFICIENCY (%)
90
VIN=12V
VIN=24V
60
10
80
70
100
1000
LOAD CURRENT (mA)
10
Efficiency vs. Load Current
Efficiency vs. Load Current
VOUT = 3.3V, fSW = 2.2MHz
VOUT = 5V, fSW = 500kHz
95
EFFICIENCY (%)
90
EFFICIENCY (%)
100
1000
LOAD CURRENT (mA)
80
85
VIN=12V
VIN=24V
VIN=36V
VIN=12V
75
70
10
10
100
1000
LOAD CURRENT (mA)
Efficiency vs. Load Current
Efficiency vs. Load Current
VOUT = 5V, fSW = 1MHz
VOUT = 5V, fSW = 2.2MHz
95
95
85
VIN=12V
VIN=24V
EFFICIENCY (%)
EFFICIENCY (%)
100
1000
LOAD CURRENT (mA)
85
VIN=12V
VIN=24V
75
75
10
MPQ4467 Rev. 1.0
8/30/2019
100
1000
LOAD CURRENT (mA)
10
100
1000
LOAD CURRENT (mA)
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MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
VIN = 14V, fSW = 2.2MHz, L = 2.2μH
Extreme light load, VOUT = 3.3V, fSW = 500kHz
95
85
EFFICENCY (%)
EFFICIENCY (%)
75
85
75
65
55
45
VOUT=3.3V
VOUT=5V
65
25
10
100
1000
LOAD CURRENT (mA)
0.1
1
10
LOAD CURRENT (mA)
Efficiency vs. Load Current
Efficiency vs. Load Current
Extreme light load, VOUT = 5V, fSW = 500kHz
Extreme light load, VIN = 14V, fSW = 400kHz
90
90
80
EFFICENCY (%)
80
EFFICENCY (%)
VIN=12V
VIN=24V
35
70
60
50
VIN=12V
VIN=24V
70
60
50
VOUT=3.3V
VOUT=5V
40
30
40
0.1
1
0.1
10
LOAD CURRENT (mA)
1
LOAD CURRENT (mA)
Efficiency vs. Load Current
Efficiency vs. Load Current
Extreme light load, VIN = 14V, fSW = 2.2MHz
VIN = 12V, fSW = 2.2MHz, L = 2.2μH
10
95.00
90
EFFICIENCY (%)
EFFICENCY (%)
80
70
60
50
VOUT=3.3V
VOUT=5V
40
85.00
75.00
VOUT=3.3V
VOUT=5V
65.00
0.1
1
LOAD CURRENT (mA)
MPQ4467 Rev. 1.0
8/30/2019
10
10
100
1000
LOAD CURRENT (mA)
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MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Case Temperature Rise vs. Load
Current
Case Temperature Rise vs. Load
Current
VOUT = 3.3V, fSW = 500kHz
VOUT = 3.3V, fSW = 1MHz
60
CASE TEMPERATURE RISE
(ºC)
CASE TEMPERATURE RISE
(ºC)
40
VIN=12V
VIN=24V
VIN=36V
30
20
10
VIN=12V
VIN=24V
VIN=36V
50
40
30
20
10
0
0
0
0.5
1
1.5
2
0
2.5
0.5
LOAD CURRENT(A)
2
2.5
Case Temperature Rise vs. Load
Current
VOUT = 3.3V, fSW = 2.2MHz
VOUT = 5V, fSW = 500kHz
CASE TEMPERATURE RISE
(ºC)
CASE TEMPERATURE RISE (ºC)
1.5
Case Temperature Rise vs. Load
Current
40
30
20
10
0
0
0.5
1
1.5
2
40
Vin=12V
Vin=24V
Vin=36V
30
20
10
0
2.5
0
0.5
LOAD CURRENT (A)
1
1.5
2
2.5
LOAD CURRENT (A)
Case Temperature Rise vs. Load
Current
Case Temperature Rise vs. Load
Current
VOUT = 5V, fSW = 1MHz
VOUT = 5V, fSW = 2.2MHz
60
CASE TEMPERATURE RISE (ºC)
CASE TEMPERATURE RISE (ºC)
1
LOAD CURRENT(A)
Vin = 12V
Vin = 24V
Vin = 36V
50
40
30
20
10
0
0
MPQ4467 Rev. 1.0
8/30/2019
0.5
1
1.5
LOAD CURRENT (A)
2
2.5
40
30
20
10
0
0
0.5
1
1.5
LOAD CURRENT (A)
2
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2.5
12
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Steady State
Steady State
IOUT = 0A
IOUT = 1mA
CH2:
VOUT/AC
20mV/div.
CH2:
VOUT/AC
100mV/div.
CH4: IL
200mA/div.
CH4: IL
200mA/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
200ms/div.
400μs/div.
Steady State
Start-Up through VIN
IOUT = 2.5A
IOUT = 0A
CH2:
VOUT/AC
10mV/div.
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
500mA/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2μs/div.
400μs/div.
Start-Up through VIN
Shutdown through VIN
IOUT = 2.5A
IOUT = 0A
CH3: VIN
10V/div.
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
500mA/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
1ms/div.
MPQ4467 Rev. 1.0
8/30/2019
20ms/div.
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13
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Shutdown through VIN
Start-Up through EN
IOUT = 2.5A
IOUT = 0A
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
4ms/div.
400μs/div.
Start-Up through EN
Shutdown through EN
IOUT = 2.5A
IOUT = 0A
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
200mA/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
400μs/div.
100ms/div.
Shutdown through EN
SCP Entry
IOUT = 2.5A
IOUT = 0A to short circuit
CH3: VPG
5V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
20μs/div.
MPQ4467 Rev. 1.0
8/30/2019
2ms/div.
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14
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
SCP Entry
SCP Steady State
IOUT = 2.5A to short circuit
CH3: VPG
5V/div.
CH2: VOUT
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
CH4: IL
5A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
1ms/div.
SCP Recovery
SCP Recovery
Short circuit to IOUT = 0A
Short circuit to IOUT = 2.5A
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
CH4: IL
5A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
2ms/div.
SYNC Operation (In-Phase)
SYNC Operation (180° Out-of-Phase)
Drive PHASE high, IOUT = 2.5A
Drive PHASE low, IOUT = 2.5A
CH3: VSYNC
2V/div.
CH3: VSYNC
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
2μs/div.
MPQ4467 Rev. 1.0
8/30/2019
2μs/div.
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15
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Dropout Operation
Dropout Operation
VIN = 3.3V, VOUT set to 3.3V, IOUT = 0A
VIN = 3.3V, VOUT set to 3.3V, IOUT = 2.5A
CH3: VIN
1V/div.
CH2: VOUT
1V/div.
CH3: VIN
1V/div.
CH2: VOUT
500mV/div.
CH4: IL
1A/div.
CH4: IL
20mA/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
4μs/div.
4μs/div.
Load Transient
VIN Ramp Up and Down
IOUT = 1.25A to 2.5A, 1.6A/μs
IOUT = 0.1A
CH2:
VOUT/AC
200mV/div.
CH3: VIN
1V/div.
CH2: VOUT
1V/div.
CH4: IOUT
1A/div.
200μs/div.
1s/div.
VIN Ramp Down and Up
VIN Ramp Down and Up
IOUT = 1mA
IOUT = 2.5A
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH1: VSW
10V/div.
CH4: IL
500mA/div.
CH1: VSW
10V/div.
2s/div.
MPQ4467 Rev. 1.0
8/30/2019
2s/div.
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16
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Cold Crank
Load Dump
VIN = 12V to 3.3V to 5V, IOUT = 2.5A
VIN = 12V to 36V, IOUT = 2.5A
CH3: VIN
20V/div.
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH1: VSW
5V/div.
40ms/div.
200ms/div.
PG in Start-Up through VIN
PG in Shutdown through VIN
IOUT = 0A, PG is pulled to 3.3V through a
100kΩ resistor
IOUT = 0A, PG is pulled to 3.3V through a 100kΩ
resistor
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH3: VIN
5V/div.
CH2: VOUT
2V/div.
CH4: VPG
2V/div.
CH1: VSW
10V/div.
CH4: VPG
2V/div.
CH1: VSW
5V/div.
400μs/div.
20ms/div.
PG in Start-Up through EN
PG in Shutdown through EN
IOUT = 0A, PG is pulled to 3.3V through a
100kΩ resistor
IOUT = 0A, PG is pulled to 3.3V through a 100kΩ
resistor
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: VPG
2V/div.
CH4: VPG
2V/div.
CH1: VSW
10V/div.
CH1: VSW
5V/div.
400μs/div.
MPQ4467 Rev. 1.0
8/30/2019
40ms/div.
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17
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
SYNC In Transient
SYNC Out Transient
IOUT = 2.5A, SYNC = 1MHz
IOUT = 2.5A, SYNC = 1MHz
CH3: VSYNC
2V/div.
CH2:
VOUT/AC
50mV/div.
CH3: VSYNC
2V/div.
CH2:
VOUT/AC
50mV/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
20μs/div.
20μs/div.
MPQ4467 Rev. 0.8
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8/30/2019
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Preliminary Specifications Subject to Change
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18
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
FUNCTION BLOCK DIAGRAM
BIAS
VCC
VCC
VCC
Regulator
VIN
VCC
EN
VREF
Reference
FREQ
BST
ISW
Oscillator
PLL
SYNC
PHASE
PG
+
-
VFB
110% x VREF
+
-
90% x VREF
Logic
SS
FB
VFB
Error Amplifier
VREF
+
VC
+
R1
VFB 460kΩ
C1
52pF
Control Logic,
OCP,
OTP,
BST Refresh
VCC
SW
C2
0.2pF
Low-Current Switch
for BST Refresh
PGND
AGND
Figure 1: Functional Block Diagram
MPQ4467 Rev. 1.0
8/30/2019
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19
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TIMING SEQUENCE
VIN
0
SW
0
EN
EN
Threshold
0
VCC
VCC
Threshold
0
118.5% VR EF
90% VR EF
50% REF 84% VR EF
VO
110% VR EF
SS
0
IL = ILIMIT
IL
0
PG
30µs
50µs
30µs
50µs
30µs
0
Start-Up
N o r m al
N o r m al
OCP
OV
N o r m al
EN Shutdown
OC
Release
Figure 2: Timing Sequence
MPQ4467 Rev. 1.0
8/30/2019
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20
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The
MPQ4467
is
a
high-frequency,
asynchronous, rectified, step-down, switch-mode
converter with an integrated internal high-side
power MOSFET. Figure 1 shows a block diagram
of the device. It offers a very compact solution
that achieves 2.5A of continuous output current
with excellent load and line regulation over a
wide 3.3V to 36V input supply range.
The device features a programmable 350kHz to
2.5MHz switching frequency, external soft start, a
power good indicator, and precision current limit.
Its very low operational quiescent current makes
it well-suited for battery-powered applications.
PWM (Pulse-Width Modulation) Control
At moderate to high output current, the MPQ4467
operates in fixed-frequency, peak current control
mode to regulate the output voltage. An internal
clock initiates a PWM cycle. At the rising edge of
the clock, the high-side power MOSFET (HS-FET)
turns on, and the inductor current rises linearly to
provide energy to the load. The HS-FET remains
on until its current reaches the value set by the
COMP voltage (VCOMP), which is the output of the
internal error amplifier. If the current in the HSFET does not reach VCOMP in one PWM period,
the HS-FET remains on, saving a turn-off
operation.
When the HS-FET is off, it remains off until the
next clock cycle starts. When the HS-FET is off,
the inductor current flows through the freewheel
diode.
AAM Mode
The MPQ4467 first enters discontinuous
conduction mode (DCM) operation as long as the
inductor current approaches zero at light load. If
the load is further decreased or there is no load
that makes VCOMP below the internally set AAM
value (VAAM), the part enters sleep mode,
consuming very low quiescent current to further
improve light-load efficiency.
In sleep mode, the internal clock is blocked, so
the MPQ4467 skips some pulses. When the FB
pin voltage (VFB) is lower than the internal 0.8V
reference (VREF) at this time, VCOMP ramps up until
it crosses over VAAM. Then the internal clock is
reset and the crossover time is taken as
benchmark of the next clock. This control
scheme helps achieve high efficiency by scaling
MPQ4467 Rev. 1.0
8/30/2019
down the frequency to reduce the switching and
gate driver losses during light-load or no-load
conditions.
When the output current increases from a lightload condition, VCOMP and the switching
frequency increase. If the DC value of VCOMP
exceeds VAAM, the operation mode resumes DCM
or CCM, which has a constant switching
frequency.
Inductor
Current
AAM Mode
t
Load
Decreased
t
t
Figure 3: AAM Mode
Error Amplifier (EA)
The error amplifier compares VFB with VREF, and
outputs a current proportional to the difference
between the two. This output current then
charges or discharges the internal compensation
network to form VCOMP, which controls the power
MOSFET current. The optimized internal
compensation network minimizes the external
component counts and simplifies the control loop
design.
Internal Regulator and BIAS
Most of the internal circuitry is powered on by the
5V internal regulator. This regulator takes VIN as
the input and operates in the full VIN range. When
VIN exceeds 5V, the output of the regulator is in
full regulation. When VIN falls below 5V, the
output decreases following VIN. A decoupling
ceramic capacitor is required close to the VCC
pin.
For better thermal performance, connect the
BIAS pin to an external power supply between
5V and 18V. The BIAS supply overrides VIN to
power the internal regulator. Using the BIAS
supply allows VCC to be derived from a highefficiency external source, such as VOUT. Float
BIAS or connect it to ground if not used.
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21
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The UVLO comparator monitors the output
voltage of the internal regulator (VCC). The
UVLO rising threshold is about 2.8V, with a
150mV hysteresis.
the low amplitude is below 0.4V. There is no
pulse-width requirement, but note that there is
always parasitic capacitance of the pad, so if the
pulse width is too short, a clear rising and falling
edge may not be seen due to the parasitic
capacitance. A pulse longer than 100ns is
recommended in application.
Enable Control (EN)
EN is a digital control pin that turns the regulator
on and off. When EN is pulled below its threshold
voltage, the chip is put into the lowest shutdown
current mode. Pulling EN above its threshold
voltage turns on the part. Do not float EN.
The PHASE pin is used when two or more
MPQ4467 devices are in parallel with the same
sync clock. Pulling PHASE high forces the device
to operate in phase with the SYNC clock. Pulling it
low forces the device to be 180° out of phase of
the SYNC clock. By setting a different PHASE
voltage, two devices can operate 180° out of
phase to reduce the total input current ripple so a
smaller input bypass capacitor can be used (see
Figure 4). The PHASE rising threshold is about
2.5V, with a 400mV hysteresis.
Power Good Indicator (PG)
The MPQ4467 has a power good (PG) indicator.
The PG pin is the open drain of a MOSFET. It
should be connected to VCC or some other
voltage source through a resistor (e.g. 100kΩ). In
the presence of an input voltage, the MOSFET
turns on so that the PG pin is pulled low before
SS is ready. When the regulator output is within
±10% of its nominal output, the PG output is
pulled high after a delay (typically 30μs). When
the output voltage moves outside this range with
a hysteresis, the PG output is pulled low with a
50μs delay to indicate a failure output status.
Programmable Frequency
The oscillating frequency of the MPQ4467 can be
programmed either by an external frequency
resistor (RFREQ) or by a logic level synchronous
clock. The frequency resistor should be located
between the FREQ pin and ground, as close to the
device as possible.
Estimate the value of RFREQ with Equation (1):
RFREQ (kΩ)
170000
fSW 1.11(kHz)
(1)
The calculated resistance may need fine-tuning
by bench test.
FREQ must not be floated even if an external
SYNC clock is added.
SYNC and PHASE
The internal oscillator frequency can also be
synchronized to an external clock ranging from
350kHz up to 2.5MHz through the SYNC pin. The
external clock should be at least 250kHz larger
than the RFREQ set frequency. Ensure the high
amplitude of the SYNC clock is above 1.8V, and
MPQ4467 Rev. 1.0
8/30/2019
SW1: Phase high
SW2: Phase low
SW1, 2 have a 180o phase shift
SYNC
CLK
SW1
SW2
t
Figure 4: In-Phase and 180° Out-of-Phase
Soft Start (SS)
Soft start (SS) is implemented to prevent the
converter output voltage from overshooting
during start-up. When the chip starts up, an
internal current source begins charging the
external soft-start capacitor. The internal SS
voltage (VSSI) rises with the soft-start voltage
(VSS), but VSSI is slightly different from VSS due to
a 0.5V offset and some delay. When VSS is below
0.5V, VSSI is 0V. VSSI rises from 0V to 0.8V as VSS
rises from 0.5V to 1.6V. During this time, the
error amplifier uses VSSI as the reference, and the
output voltage ramps up from 0V to the regulated
value, following VSSI rising. When VSS reaches
1.6V, VSSI is 0.8V and overrides the internal VREF,
so the error amplifier uses the internal VREF as
the reference.
To minimize the delay for SS to reach 0.5V, an
internal pull-up circuit with about 100µA average
current pulls SS up to 0.4V. Then a 10µA
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MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
constant current charges SS up to about 4V. The
soft-start time (tSS) set by the external SS capacitor
can be calculated with Equation (2):
t SS (ms)
CSS (nF) 1.1V
ISS (A)
(2)
Where CSS is the external SS capacitor, and ISS is
the internal 10μA SS charge current.
The delay time for SS reaching 0.5V can be
estimated with Equation (3):
t SS _delay(ms)
CSS (nF) 0.4V CSS (nF) 0.1V
100 μA
10 μA
(3)
SS can be used for tracking and sequencing.
Pre-Bias Start-Up
If VFB is greater than VSSI - 150mV at start-up,
which means the output has a pre-bias voltage,
the HS-FET does not turn on until VSSI - 150mV
exceeds VFB.
Over-Current Protection (OCP) and Hiccup
Mode
The MPQ4467 has cycle-by-cycle peak current
limit protection and hiccup mode.
The power MOSFET current is accurately sensed
via a current-sense MOSFET. It is then fed to the
high-speed current comparator for current-mode
control. During the HS-FET on state, if the
sensed current exceeds the peak current limit
value set by the COMP high-clamp voltage, the
HS-FET turns off immediately. Then the inductor
current flows through external freewheel diode
and decreases. The HS-FET remains off until
next clock cycle starts. During OCP, the clock
frequency is related to VFB, and decreases as VFB
decreases. Both the peak current limit and
frequency foldback assist in keeping the inductor
current from running away during an overload or
short-circuit condition.
If the output is shorted to ground, causing the
output voltage to drop below 55% of its nominal
output, and the peak current limit is kicked, the
device considers this an output dead short. The
MPQ4467 immediately triggers hiccup mode to
restart the part periodically.
In hiccup mode, the MPQ4467 disables its output
power stage and slowly discharges the soft-start
capacitor. The MPQ4467 restarts with a full soft
start when the soft-start capacitor is fully
discharged. If the short-circuit condition still
MPQ4467 Rev. 1.0
8/30/2019
remains after soft start ends, the device repeats
this operation until the fault is removed and the
output returns to the regulation level. This
protection mode reduces the average shortcircuit current greatly to alleviate thermal issues
and protect the regulator.
Floating Driver and Bootstrap Charging
A 0.1μF to 1μF external bootstrap capacitor
powers the floating power MOSFET driver. The
floating driver has its own UVLO protection with a
rising threshold of 2.5V and hysteresis of 200mV.
The bootstrap capacitor voltage is charged to
about 5V from VCC through a PMOS pass
transistor when the SW node is low.
During high duty cycle operation or sleep mode,
the bootstrap charging time period is shorter, so
the bootstrap capacitor may not be charged
sufficiently. If the external circuit does not have
sufficient voltage or time to charge the bootstrap
capacitor, extra external circuitry can be used to
ensure the bootstrap voltage is in normal
operation range.
BST Refresh
To improve dropout, the MPQ4467 is designed to
operate at close to 100% duty cycle as long as
the BST-to-SW voltage is greater than 2.5V.
When the voltage from BST to SW drops below
2.5V, the HS-FET is turned off using a UVLO
circuit. This forces an internal low-current switch
to pull the SW node low to refresh the charge on
the BST capacitor.
Since the supply current sourced from the BST
capacitor is low, the HS-FET can remain on for
more switching cycles than are required to
refresh the capacitor, making the effective duty
cycle of the switching regulator high.
The effective duty cycle during the dropout of the
regulator is mainly influenced by the voltage
drops across the HS-FET, the inductor resistance,
and the PCB resistance.
Thermal Shutdown (TSD)
Thermal shutdown is implemented to prevent the
chip from thermally running away. When the
silicon die temperature exceeds its upper
threshold, it shuts down the power MOSFET.
When the temperature drops below its lower
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MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
threshold, the chip is enabled again.
Start-Up and Shutdown
If both VIN and EN exceed their appropriate
thresholds, the chip starts up. The reference
block starts first, generating a stable reference
voltage and current, and then the internal
regulator is enabled. The regulator provides a
stable supply for the rest of the circuitries.
While the internal supply rail is up, an internal
timer holds the power MOSFET off for about
50µs to blank start-up glitches. When the softstart block is enabled, it first holds its SS output
low to ensure the remaining circuitries are ready,
then slowly ramps up.
Three events can shut down the chip: VIN low, EN
low, and thermal shutdown. During the shutdown
procedure, the signaling path is blocked first to
avoid any fault triggering. VCOMP and the internal
supply rail are then pulled down. The floating
driver is not subject to this shutdown command,
but its charging path is disabled.
MPQ4467 Rev. 1.0
8/30/2019
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24
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider connected to the FB
pin sets the output voltage (see Figure 5).
RMS current in the input capacitor can be
estimated with Equation (4):
ICIN ILOAD
MPQ4467
RFB1
FB
VOUT
ICIN
Set RFB1 first. RFB2 then can be calculated with
Equation (3):
(3)
Table 1 lists the recommended feedback resistor
values for common output voltages.
Table 1: Resistor Selection for Common Output
Voltages
VOUT (V)
RFB1 (kΩ)
RFB2 (kΩ)
3.3
41.2 (1%)
13 (1%)
5
68.1 (1%)
13 (1%)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
AC current to the converter while maintaining the
DC input voltage. For the best performance, use
low-ESR capacitors. Ceramic capacitors with
X5R or X7R dielectrics are highly recommended
because of their low ESR and small temperature
coefficients.
For most applications, use a 4.7µF to 10µF
capacitor. It is strongly recommended to use
another, lower-value capacitor (e.g. 0.1µF) with a
small package size (0603) to absorb highfrequency switching noise. Place the small-sized
capacitor as close to the VIN and GND pins as
possible.
Since CIN absorbs the input switching current, it
requires an adequate ripple current rating. The
MPQ4467 Rev. 1.0
8/30/2019
ILOAD
2
(5)
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
Figure 5: Feedback Network
R FB1
VOUT
1
0.8V
(4)
The worst-case scenario occurs at VIN = 2VOUT,
calculated with Equation (5):
RFB2
R FB2
VOUT
V
(1 OUT )
VIN
VIN
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1μF) as close to the IC as
possible. When using ceramic capacitors, ensure
that they have enough capacitance to provide a
sufficient charge to prevent excessive voltage
ripple at the input. The input voltage ripple
caused by capacitance can be estimated with
Equation (6):
VIN
ILOAD
V
V
OUT (1 OUT )
fSW CIN VIN
VIN
(6)
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. Use ceramic, tantalum, or low-ESR
electrolytic capacitors. For best results, use lowESR capacitors to keep the output voltage ripple
low. The output voltage ripple can be estimated
with Equation (7):
V
V
1
VOUT OUT (1 OUT ) (RESR
) (7)
fSW L
VIN
8fSW COUT
Where L is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency, and causes the majority of the output
voltage ripple. For simplification, the output
voltage ripple can be estimated with Equation (8):
VOUT
VOUT
V
(1 OUT )
8 fSW L COUT
VIN
2
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(8)
25
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be estimated with Equation (9):
VOUT
VOUT
V
(1 OUT ) RESR
fSW L
VIN
(9)
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MPQ4467 can be optimized for a wide range of
capacitance and ESR values.
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
at least 25% greater than the maximum load
current is recommended for most applications.
For higher efficiency, choose an inductor with
lower DC resistance. A larger-value inductor
results in less ripple current and a lower output
ripple voltage. However, the larger-value inductor
also has a larger physical size, higher series
resistance, and lower saturation current. A good
rule for determining the inductor value is to allow
the inductor ripple current to be approximately
30% of the maximum load current. The
inductance value can then be calculated with
Equation (10):
L
VOUT
V
(1 OUT )
fSW IL
VIN
(10)
Where ΔIL is the peak-to-peak inductor ripple
current.
Choose the inductor ripple current to be
approximately 30% of the maximum load current.
The maximum inductor peak current can be
calculated with Equation (11):
ILP ILOAD
VOUT
V
(1 OUT )
2fSW L
VIN
VIN
VIN
RUP
EN
RDOWN
Figure 6: Adjustable UVLO Using EN Divider
The UVLO threshold can be calculated with
Equation (12) and Equation (13):
INUV RISING (1
INUV FALLING (1
RUP
) VEN_RISING
RDOWN
(12)
RUP
) VEN_FALLING (13)
RDOWN
Where VEN_RISING = 1.05V, and VEN_FALLING = 0.93V.
External BST Diode and Resistor
An external BST diode can enhance the
efficiency of the regulator when the duty cycle is
high. A power supply between 2.5V and 5V can
be used to power the external bootstrap diode.
VCC or VOUT is recommended to be this power
supply in the circuit (see Figure 7).
(11)
Selecting the Output Rectifier Diode
The output rectifier diode supplies the current to
the inductor when the high-side switch is off. To
reduce losses due to the diode forward voltage
and recovery times, use a Schottky diode.
Choose a diode with a maximum reverse voltage
rating greater than the maximum input voltage,
and a current rating that is greater than the
maximum load current.
MPQ4467 Rev. 1.0
8/30/2019
VIN UVLO Setting
The MPQ4467 has an internal fixed undervoltage lockout (UVLO) threshold. The rising
threshold is 2.8V, and the falling threshold is
about 2.65V. For applications that require a
higher UVLO point, an external resistor divider
between the VIN and EN pins can be used
achieve a higher equivalent UVLO threshold (see
Figure 6).
VCC
RBST
External BST Diode
IN4148
BST
VCC / VOUT
CBST
SW
L
VOUT
COUT
Figure 7: Optional External Bootstrap Diode to
Enhance Efficiency
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26
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
The recommended external BST diode is
IN4148, and the BST capacitor value is 0.1µF to
1μF. A resistor in series with the BST capacitor
(RBST) can reduce the SW rising rate and voltage
spikes. This helps enhance EMI performance
and reduce the voltage stress at high VIN. A
higher resistance reduces SW spikes, but
compromises efficiency. To make a tradeoff
between EMI and efficiency, it is recommended
for RBST to be no greater than 20Ω.
PCB Layout Guidelines (7)
Efficient PCB layout, especially for input
capacitor placement, is critical for stable
operation. A 4-layer layout is strongly
recommended to achieve better thermal
performance. For best results, refer to Figure 8
and follow the guidelines below:
1.
Place symmetric input capacitors as close as
possible to the VIN and GND pins.
2.
Use a large ground plane to connect directly
to PGND. If the bottom layer is a ground
plane, add vias near PGND.
3.
Ensure that the high-current paths at GND
and VIN have short, direct, and wide traces.
4.
Place the ceramic input capacitor, especially
the small package size (0603) input bypass
capacitor, as close as possible to the VIN
and PGND pins to minimize high-frequency
noise.
5.
Keep the connection between the input
capacitor and IN as short and wide as
possible.
6.
Place the VCC capacitor as close to the VCC
and GND pins as possible.
7.
Route SW and BST away from sensitive
analog areas, such as FB.
8.
Place the feedback resistors close to the
chip to ensure the trace that connects to the
FB pin is as the short as possible.
9.
Use multiple vias to connect the power
planes to internal layers.
Top Layer
Inner Layer 1
Inner Layer 2
Bottom Layer
Figure 8: Recommended PCB Layout
Note:
7) The recommended PCB layout is based on Figure 9.
MPQ4467 Rev. 1.0
8/30/2019
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© 2019 MPS. All Rights Reserved.
27
MPQ4467 – 36V, 2.5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
U1
3.3V to 36V
VIN
GND
R1
100k
2
C1A C1B
10μF 10μF
VIN
C5
0.1μF
L1
MPQ4467
5
EN
11
BST
C1C C1D
0.1μF 0.1μF
EN
3, 10
SW
D1
12
R5
100k
VCC
FB
R3
1M
GND
R4
316k
7
PG
14
SS
C3
4.7nF
6
SYNC
C6
5pF
VOUT
C2A C2B
22μF 22μF
15
C4
1μF
PG
3.3V/2.5A
10μH
SYNC
FREQ
R6
10
16
R2
169k
1
PHASE
PHASE
8
BIAS
C7
0.1µF
AGND
13
4, 9
PGND
Figure 9: VOUT = 3.3V, fSW = 500kHz
U1
VIN
3.3V to 36V
GND
R1
100k
2
C1A C1B
10μF 10μF
VIN
BST
C1C C1D
0.1μF 0.1μF
5
EN
11
C5
0.1μF
L1
MPQ4467
EN
SW
3, 10
D1
12
R5
100k
PG
VCC
FB
R3
41.2k
C6
10pF
VOUT
C2A C2B
22μF 22μF
GND
15
C4
1μF
R4
13k
7
PG
SS
14
C3
4.7nF
SYNC
3.3V/2.5A
10μH
6
SYNC
FREQ
R6
10
16
R2
169k
1
PHASE
4, 9
PGND
BIAS
AGND
8
C7
0.1µF
13
PHASE
Figure 10: VOUT = 3.3V, fSW = 500kHz for
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