MPQ4469
36V, 5A, Low Quiescent Current,
Asynchronous, Step-Down Converter,
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ4469 is a step-down switching
regulator with an integrated internal high-side
power MOSFET and a configurable frequency
from 350kHz to 2.5MHz. It provides up to 5A of
highly efficient output current with current mode
control for fast loop response.
The wide 3.3V to 36V input range accommodates
a variety of step-down applications in automotive
input environments. The device is ideal for
battery-powered applications due to its
extremely low quiescent current.
The MPQ4469 employs AAM (advanced
asynchronous modulation) mode, which
achieves high efficiency in light-load conditions
by scaling down the switching frequency to
reduce switching and gate-driving losses.
Standard features include soft start (SS),
external clock sync, enable (EN) control, and a
power good (PG) indicator. High duty cycle and
low-dropout mode are provided for automotive
cold crank conditions.
APPLICATIONS
Over-current protection (OCP) is employed to
prevent the inductor current from running away.
Hiccup mode greatly reduces the average
current in short circuit conditions. Thermal
shutdown provides reliable, fault-tolerant
operation.
The MPQ4469 is available
(4mmx5mm) package.
in
a
Wide 3.3V to 36V Operating Input Range
5A Continuous Output Current
1μA Low Shutdown Mode Current
10μA Sleep Mode Quiescent Current
Internal 110mΩ High-Side MOSFET
350kHz to 2.5MHz Configurable Switching
Frequency
Synchronize to External Clock
Selectable In-Phase or 180° Out-of-Phase
Power Good Indicator
Configurable Soft-Start Time
100ns Minimum On Time
Low Dropout Mode
Over-Current Protection and Hiccup Mode
AAM at Light Load
Available in a QFN-20 (4mmx5mm)
Package
AEC-Q100 Grade-1
Automotive Systems
Industrial Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the
directive. For MPS green status, please visit the MPS website
Quality Assurance. “MPS”, the MPS logo, and “Simple,
Solutions” are trademarks of Monolithic Power Systems, Inc.
subsidiaries.
RoHS
under
Easy
or its
QFN-20
TYPICAL APPLICATION
VIN
Efficiency vs. Load Current
3.3V to 36V
VOUT = 5V, fSW = 500kHz, L = 10µH
95
VIN
SYNC
MPQ4469
SW
PHASE
GND
FREQ
FB
MPQ4469 Rev. 1.0
11/22/2019
PG
VCC
SS
BIAS
VOUT
EFFICIENCY (%)
BST
EN
85
75
VIN=12V
VIN=24V
VIN=36V
65
10
100
1000
LOAD CURRENT (mA)
5000
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© 2019 MPS. All Rights Reserved.
1
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MSL Rating**
MPQ4469GV-AEC1
QFN-20 (4mmx5mm)
See Below
2
* For Tape & Reel, add suffix –Z (e.g. MPQ4469GV–AEC1–Z).
** Moisture Sensitivity Level Rating
TOP MARKING
MPS: MPS prefix
Y: Year code
WW: Week code
MP4469: Part number
LLLLLL: Lot number
PACKAGE REFERENCE
TOP VIEW
1
15
2
3
4
5
8
9
EXPOSED PAD
ON BACKSIDE
QFN-20 (4mmx5mm)
MPQ4469 Rev. 1.0
11/22/2019
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2
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
Name
1
VCC
2
BST
3, 4
SW
5, 12
PGND
6, 11, 16
NC
7
BIAS
8
PG
9
SYNC
10
EN
13, 14
VIN
15
PHASE
17
FREQ
18
FB
19
SS
20
AGND
Description
Internal bias supply. This pin supplies power to the internal control circuit and gate
drivers. Place a decoupling capacitor greater than 1µF to ground and close to VCC.
Bootstrap. BST is the positive power supply for the high-side MOSFET driver
connected to SW. Connect a bypass capacitor between BST and SW.
Switch node. SW is the output of the internal power switch.
Power ground. PGND is the reference ground of the power device and requires careful
consideration during PCB layout. For the best results, connect PGND with copper pours
and vias.
No connection.
External power supply for the internal regulator. Connect BIAS to an external power
supply between 5V and 18V to reduce power dissipation and increase efficiency. When
this pin is not being used, float it or connect it to ground.
Power good Indicator. The output of this pin is an open drain and goes high if the
output voltage is within ±10% of the nominal voltage.
Synchronize. Apply a 350kHz to 2.5MHz clock signal to this pin to synchronize the
internal oscillator frequency to the external clock. The external clock should be at least
250kHz greater than RFREQ’s set frequency. Connect to GND if not used.
Enable. Pull this pin below the specified threshold to shut down the chip. Pull EN above
the specified threshold to enable the chip.
Input supply. VIN supplies power to all the internal control circuitry and the power
switch connected to SW. A decoupling capacitor connected to ground must be placed
close to VIN to minimize switching spikes.
Selectable in-phase or 180° out-of-phase with SYNC input. Drive PHASE high to be
in phase; drive it low to be 180° out of phase. If SYNC is not being used, do not float the
pin to avoid any uncertain status. It is recommended to connect PHASE to GND.
Switching frequency programming pin. To set the switching frequency, connect a
resistor from FREQ to ground.
Feedback input. Connect FB to the tap of an external resistor divider from the output to
AGND to set the output voltage. The feedback voltage threshold is 0.8V. Place the
resistor divider as close to FB as possible. Avoid placing vias on the FB traces.
Soft-start input. Place an external capacitor from SS to AGND to set the soft-start
time. The MPQ4469 sources 10µA from SS to the soft-start capacitor at start-up. As the
SS voltage rises, the feedback threshold voltage increases to limit inrush current during
start-up.
Analog ground. Reference ground of the logic circuit.
Exposed pad. Connect to GND plane for improved thermal performance.
MPQ4469 Rev. 1.0
11/22/2019
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© 2019 MPS. All Rights Reserved.
3
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
Supply voltage (VIN) ..................... -0.3V to +40V
Switch voltage (VSW) ............. -0.3V to VIN + 0.3V
BST voltage (VBST) ............................VSW + 6.5V
EN voltage (VEN) .......................... -0.3V to +40V
BIAS voltage (VBIAS) ..................... -0.3V to +20V
All other pins .................................. -0.3V to +6V
Continuous power dissipation……(TA = 25°C) (2)
QFN-20 (4mmx5mm) ............................... 3.12W
Operating junction temperature................ 150°C
Lead temperature .................................... 260°C
Storage temperature ................ -65°C to +150°C
Electrostatic Discharge (ESD) Level
HBM (human body model) ..................... ±2000V
CDM (charged device model) ................. ±750V
Recommended Operating Conditions
Supply voltage (VIN) ....................... 3.3V to 36V
Operating junction temp (TJ) ..............................
........................................... -40°C to +125°C (3)
MPQ4469 Rev. 1.0
11/22/2019
Thermal Resistance
θJA
θJC
QFN-20 (4mmx5mm)
JESD51-7 (4)............................40.......9...... °C/W
EVQ4469-V-00A (5).................35.......3.4....°C/W
Notes:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation may cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) Operation devices at junction temperature greater than 125C
is possible; contact MPS for details.
4) The value of θJA given in this table is only valid for comparison
with other packages and cannot be used for design purposes.
These values were calculated in accordance with JESD51-7,
and simulated on a specified JEDEC board. They do not
represent the performance obtained in an actual application.
5) Measured on EVQ4469-V-00A, 4-layer PCB, 6.35cmx6.35cm.
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4
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TJ = 25°C.
Parameter
Symbol
VIN quiescent current
IQ
VIN shutdown current
ISHDN
VIN under-voltage lockout rising
threshold
VIN under-voltage lockout
hysteresis threshold
Feedback reference voltage
VSYNC_LOW
Sync input high voltage
VSYNC_HIGH
Current limit
ILIMIT_HS
Switch leakage current
ISW_LKG
HS switch on resistance
RON_HS
Soft-start current
ISS
EN rising threshold
2.3
VEN_HYS
PG rising threshold (VFB / VREF)
PGRISING
PG falling threshold (VFB / VREF)
PGFALLING
PG deglitch timer
tPG_DEGLITCH
PG output voltage low
VPG_LOW
VCC regulator
TJ = 25°C
RFREQ = 180kΩ, or from sync
clock
RFREQ = 82kΩ, or from sync clock
RFREQ = 27kΩ, or from sync clock
10
18
10
25
1
5
µA
2.8
3.2
V
784
800
816
mV
792
800
808
mV
400
475
550
kHz
850
2250
1000
2500
1150
2750
kHz
kHz
ns
0.4
1.8
Duty cycle = 40%
6.2
V
9.2
A
0.01
1
µA
110
175
mΩ
5
10
15
µA
0.9
1.05
1.2
V
160
mV
VFB rising
85
90
95
VFB falling
105
110
115
VFB falling
79
84
89
VFB rising
Thermal shutdown hysteresis
(6)
%
%
113.5 118.5 123.5
%
PG from low to high
30
µs
PG from high to low
50
µs
ISINK = 2mA
0.2
0.4
5
ICC = 5mA
(6)
V
7.7
VBST - VSW = 5V
VSS = 0.8V
Units
mV
100
VCC
VCC load regulation
Max
150
VEN_RISING
EN threshold hysteresis
Thermal shutdown
VEN = 0V
tON_MIN
Sync input low voltage
Typ
µA
INUVHYS
fSW
Minimum on time (6)
Min
VFB = 0.85V, no load,
no switching, TJ = 25°C
VFB = 0.85V, no load,
no switching
INUVRISING
VREF
Switching frequency
Condition
V
V
3
%
TSD
170
°C
TSD_HYS
20
°C
Note:
6)
Not tested in production. Guaranteed by design and characterization.
MPQ4469 Rev. 1.0
11/22/2019
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© 2019 MPS. All Rights Reserved.
5
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Quiescent Current vs. Temperature
Shutdown Current vs. Temperature
16.0
ISHDN (μA)
IQ (μA)
14.0
12.0
10.0
8.0
6.0
-50
-25
0
25
50
75
100
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-50
125
-25
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
VIN UVLO Threshold vs. Temperature
Feedback Reference vs. Temperature
3.0
801
Rising
Falling
2.9
800
2.8
VREF (mV)
UVLO (V)
0
2.7
2.6
799
798
797
2.5
2.4
796
-50
-25
0
25
50
75
100
125
-50
-25
TEMPERATURE (°C)
Switching Frequency vs.
Temperature
0
25
50
75
TEMPERATURE (°C)
100
125
Current Limit vs. Temperature
1020
8.0
1015
7.8
ILIMIT_HS (A)
fSW (kHz)
1010
1005
1000
995
990
7.6
7.4
7.2
985
980
7.0
-50
-25
0
25
50
75
TEMPERATURE (°C)
MPQ4469 Rev. 1.0
11/22/2019
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
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6
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Soft-Start Current vs. Temperature
170
10.2
150
10.0
9.8
130
ISS (μA)
RON_HS (mΩ)
HS-FET On Resistance vs.
Temperature
110
9.6
9.4
90
9.2
70
9.0
-50
-25
0
25
50
75
100
125
-50
-25
TEMPERATURE (°C)
25
50
75
100
125
TEMPERATURE (°C)
PG Rising Threshold (VFB Rising) vs.
Temperature
EN Threshold vs. Temperature
91.0%
1.15
PG RISING (VFB / VREF)
1.10
90.5%
1.05
VEN_TH (V)
0
1.00
90.0%
Rising
Falling
0.95
0.90
89.5%
0.85
89.0%
0.80
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
PG Rising Threshold (VFB Falling) vs.
Temperature
111.0%
PG Falling Threshold (VFB Falling) vs.
Temperature
PG RISING (VFB / VREF)
PG FALLING (VFB / VREF)
85.0%
110.5%
84.5%
110.0%
84.0%
109.5%
83.5%
109.0%
83.0%
-50
MPQ4469 Rev. 1.0
11/22/2019
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75 100
TEMPERATURE (°C)
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125
7
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
PG Falling Threshold (VFB Rising)
vs. Temperature
PG FALLING (VFB / VREF)
119.5%
118.5%
117.5%
116.5%
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
MPQ4469 Rev. 1.0
11/22/2019
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8
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Current Limit vs. Duty Cycle
fSW vs. RFREQ
2500
9.0
2000
8.0
fSW (kHz)
ILIMIT_HS (A)
8.5
7.5
7.0
1500
1000
6.5
500
6.0
5.5
0
0
10 20 30 40 50 60 70 80 90 100
10
100
RFREQ (kΩ)
DUTY CYCLE (%)
Output Voltage vs. Load Current
Dropout Performance
Line Regulation
(Set nominal VOUT > VIN)
5.5
LINE REGULATION (%)
5.0
VOUT (V)
4.5
4.0
VIN=3.3V
VIN=5V
3.5
3.0
2.5
2.0
0
0.5
1
1.5
2 2.5 3
IOUT (A)
1,000
3.5
4
4.5
5
1.5 2 2.5 3 3.5
LOAD CURRENT (A)
4
4.5
5
0.05
0.03
0.01
-0.01
-0.03
-0.05
-0.07
-0.09
-0.11
-0.13
-0.15
IOUT=1A
IOUT=2.5A
IOUT=5A
0
5
10 15 20 25 30
INPUT VOLTAGE (V)
35
40
Load Regulation
LOAD REGULATION (%)
0.15
0.10
0.05
0.00
-0.05
VIN=12V
VIN=24V
VIN=36V
-0.10
-0.15
0
0.5
MPQ4469 Rev. 1.0
11/22/2019
1
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9
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
VOUT = 3.3V, fSW = 500kHz
VOUT = 3.3V, fSW = 1MHz
90
EFFICIENCY (%)
EFFICIENCY (%)
90
80
70
70
VIN=12V
VIN=24V
VIN=36V
VIN=12V
VIN=24V
60
10
100
1000
LOAD CURRENT (mA)
60
5000
10
Efficiency vs. Load Current
VOUT = 3.3V, fSW = 2.2MHz
VOUT = 5V, fSW = 500kHz
5000
EFFICIENCY (%)
95
85
80
75
10
100
1000
LOAD CURRENT (mA)
85
75
VIN=12V
VIN=24V
VIN=36V
65
5000
10
Efficiency vs. Load Current
100
1000
LOAD CURRENT (mA)
5000
Efficiency vs. Load Current
VOUT = 5V, fSW = 1MHz
VOUT = 5V, fSW = 2.2MHz
95
EFFICIENCY (%)
95
EFFICIENCY (%)
100
1000
LOAD CURRENT (mA)
Efficiency vs. Load Current
90
EFFICIENCY (%)
80
85
75
VIN=12V
VIN=24V
MPQ4469 Rev. 1.0
11/22/2019
100
1000
LOAD CURRENT (mA)
75
VIN=12V
VIN=24V
65
10
85
5000
65
10
100
1000
5000
LOAD CURRENT (mA)
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10
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
VIN = 14V, fSW = 2.2MHz, L = 2.2μH
VIN = 12V, fSW = 2.2MHz, L = 2.2μH
90
95
EFFICIENCY (%)
EFFICIENCY (%)
VOUT=3.3V
VOUT=5V
80
70
75
VOUT=3.3V
VOUT=5V
65
5000
100
1000
LOAD CURRENT (mA)
10
100
1000
5000
LOAD CURRENT (mA)
Case Temperature Rise vs. Load
Current
Case Temperature Rise vs. Load
Current
VOUT = 3.3V, fSW = 500kHz
VOUT = 5V, fSW = 500kHz
40
CASE TEMPERATURE RISE
(ºC)
CASE TEMPERATURE RISE
(ºC)
10
85
VIN=12V
VIN=24V
VIN=36V
30
20
10
0
0
0.5
1
1.5
2
2.5
3
3.5
LOAD CURRENT (A)
MPQ4469 Rev. 1.0
11/22/2019
4
4.5
5
50
VIN=12V
VIN=36V
40
30
20
10
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
LOAD CURRENT (A)
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11
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Steady State
Steady State
IOUT = 0A
IOUT = 1mA
CH2:
VOUT/AC
20mV/div.
CH2:
VOUT/AC
20mV/div.
CH4: IL
200mA/div.
CH4: IL
200mA/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
200μs/div.
Steady State
Start-Up through VIN
IOUT = 5A
IOUT = 0A
CH3: VIN
10V/div.
CH2:
VOUT/AC
10mV/div.
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2μs/div.
2ms/div.
Start-Up through VIN
Shutdown through VIN
IOUT = 5A
IOUT = 0A
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH4: IL
2.5A/div.
CH4: IL
500mA/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
MPQ4469 Rev. 1.0
11/22/2019
20ms/div.
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12
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Shutdown through VIN
Start-Up through EN
IOUT = 5A
IOUT = 0A
CH3: VIN
10V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2.5A/div.
CH1: VSW
5V/div.
CH4: IL
500mA/div.
CH1: VSW
5V/div.
20ms/div.
2ms/div.
Start-Up through EN
Shutdown through EN
IOUT = 5A
IOUT = 0A
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
200mA/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
100ms/div.
Shutdown through EN
SCP Entry
IOUT = 5A
IOUT = 0A to short circuit
CH3: VPG
5V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH4: IL
5A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
20μs/div.
MPQ4469 Rev. 1.0
11/22/2019
2ms/div.
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13
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
SCP Entry
SCP Steady State
IOUT = 5A to short circuit
CH3: VPG
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
CH4: IL
5A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
1ms/div.
SCP Recovery
SCP Recovery
Short circuit to IOUT = 0A
Short circuit to IOUT = 5A
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
5A/div.
CH4: IL
5A/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
2ms/div.
SYNC Operation (180° Out-OfPhase)
SYNC Operation (In-Phase)
Drive PHASE high, IOUT = 5A
Drive PHASE low, IOUT = 5A
CH3: VSYNC
2V/div.
CH3: VSYNC
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
1μs/div.
MPQ4469 Rev. 1.0
11/22/2019
1μs/div.
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MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Dropout Operation
Dropout Operation
VIN = 3.3V, VOUT set to 3.3V, IOUT = 0A
VIN = 3.3V, VOUT set to 3.3V, IOUT = 5A
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
50mA/div.
CH4: IL
2A/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
4μs/div.
4μs/div.
Load Transient
VIN Ramp Up and Down
IOUT = 2.5A to 5A, 1.6A/μs
IOUT = 0.1A
CH2:
VOUT/AC
200mV/div.
CH3: VIN
1V/div.
CH2: VOUT
1V/div.
CH4: IOUT
2A/div.
200μs/div.
1s/div.
VIN Ramp Down and Up
VIN Ramp Down and Up
IOUT = 1mA
IOUT = 5A
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
200mA/div.
CH4: IL
2A/div.
CH1: VSW
10V/div.
CH1: VSW
10V/div.
10s/div.
MPQ4469 Rev. 1.0
11/22/2019
10s/div.
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15
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
Cold Crank
Load Dump
VIN = 12V to 3.3V to 5V, IOUT = 5A
VIN = 12V to 36V, IOUT = 5A
CH3: VIN
5V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
20ms/div.
100ms/div.
PG in Start-Up through VIN
PG in Shutdown through VIN
IOUT = 0A, PG is pulled to 3.3V through a
100kΩ resistor
IOUT = 0A, PG is pulled to 3.3V through a 100kΩ
resistor
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: VPG
5V/div.
CH4: VPG
5V/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
20ms/div.
PG in Start-Up through EN
PG in Shutdown through EN
IOUT = 0A, PG is pulled to 3.3V through a
100kΩ resistor
IOUT = 0A, PG is pulled to 3.3V through a 100kΩ
resistor
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH4: VPG
5V/div.
CH4: VPG
5V/div.
CH1: VSW
5V/div.
CH1: VSW
5V/div.
2ms/div.
MPQ4469 Rev. 1.0
11/22/2019
100ms/div.
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16
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, fSW = 500kHz, TA = 25°C, unless otherwise noted.
SYNC In Transient
SYNC Out Transient
IOUT = 5A, SYNC = 1MHz
IOUT = 5A, SYNC = 1MHz
CH3: VSYNC
2V/div.
CH2:
VOUT/AC
50mV/div.
CH3: VSYNC
2V/div.
CH2:
VOUT/AC
50mV/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
CH4: IL
2A/div.
CH1: VSW
5V/div.
40μs/div.
MPQ4469 Rev. 1.0
11/22/2019
20μs/div.
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17
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
BIAS
VCC
VCC
VCC
Regulator
VIN
VCC
EN
VREF
Reference
FREQ
BST
Oscillator
PLL
SYNC
ISW
PHASE
+
-
PG
VFB
110% x VREF
Logic
+
-
SS
FB
90% x VREF
VFB
Error Amplifier
VREF
+
VC
+
R1
VFB 460kΩ
C1
52pF
Control Logic,
OCP,
OTP,
BST Refresh
C2
0.2pF
VCC
SW
Low-Current
Switch for BST
Refresh
PGND
AGND
Figure 1: Functional Block Diagram
MPQ4469 Rev. 1.0
11/22/2019
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18
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
Timing Sequence
VIN
0
SW
0
EN
EN
Threshold
0
VCC
VCC
Threshold
0
118.5% of VREF
90% of VREF
VO
50% of VREF
84% of VREF
110% of VREF
SS
0
IL = ILIMIT
IL
0
PG
30µs
50µs
30µs
50µs
30µs
0
Start-Up
Normal
Normal
OCP
OV
Normal
EN Shutdown
OC
Release
Figure 2: Timing Sequence
MPQ4469 Rev. 1.0
11/22/2019
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19
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The
MPQ4469
is
a
high
frequency,
asynchronous, rectified, step-down, switch-mode
converter with an integrated, internal, high-side
power MOSFET (see Figure 1). It offers a very
compact solution that achieves 5A of continuous
output current with excellent load and line
regulation over a wide 3.3V to 36V input supply
range.
The device features a configurable 350kHz to
2.5MHz switching frequency, external soft start, a
power good indicator, and precision current limit.
Its low operational quiescent current makes it
ideal for battery-powered applications.
Pulse-Width Modulation (PWM) Control
At moderate to high output current, the MPQ4469
operates in a fixed frequency, peak current
control mode to regulate the output voltage. An
internal clock initiates a PWM cycle. At the rising
edge of the clock, the high-side MOSFET (HSFET) turns on and the inductor current rises
linearly to provide energy to the load. The HSFET remains on until its current reaches the
value set by the COMP voltage (VCOMP), which is
the output of the internal error amplifier. If the
current in the HS-FET does not reach VCOMP
within one PWM period, the HS-FET remains on,
and saves a turn-off operation.
When the HS-FET is off, the inductor current
flows through the freewheel diode, and the HSFET remains off until the next clock cycle starts.
AAM Mode
The MPQ4469 enters discontinuous conduction
mode (DCM) operation first, as long as the
inductor current approaches zero at light-load. If
the load further decreases, or there is no load to
bring VCOMP below the internally set AAM value
(VAAM), the MPQ4469 enters sleep mode. In this
mode, the device consumes a low quiescent
current to further improve light-load efficiency.
In sleep mode, the internal clock is blocked first,
and the MPQ4469 skips some pulses. As the
feedback voltage (VFB) drops below the internal
0.8V reference voltage (VREF), VCOMP ramps up
until it exceeds VAAM. Then the internal clock is
MPQ4469 Rev. 1.0
11/22/2019
reset, and the crossover time is used as a
benchmark for the next clock. This control
scheme achieves high efficiency by scaling down
the frequency to reduce the switching and gatedriver losses during light-load or no-load
conditions (see Figure 3).
When the output current increases from a lightload condition, both VCOMP and the switching
frequency increase. If the DC value of VCOMP
exceeds VAAM, the operation mode resumes DCM
or CCM, which has a constant switching
frequency.
Inductor
Current
AAM Mode
t
Load
Decreased
t
t
Figure 3: AAM Mode
Error Amplifier (EA)
The error amplifier compares VFB with VREF and
outputs a current proportional to the difference
between the two values. This output current then
charges or discharges the internal compensation
network to form VCOMP, which controls the power
MOSFET current. The optimized internal
compensation network minimizes the external
component count and simplifies the control loop
design.
Internal Regulator and BIAS
Most of the internal circuitry is powered by the 5V
internal regulator. This regulator takes the VIN
input and operates in the full VIN range. When VIN
exceeds 5V, the output of the regulator is in full
regulation. When VIN falls below 5V, the output
decreases following VIN. Place a decoupling
ceramic capacitor as close as possible to the
VCC pin.
For improved thermal performance, connect
BIAS to an external power supply between 5V
and 18V. The BIAS supply overrides VIN to power
the internal regulator. Using the BIAS supply
allows VCC to be derived from a high-efficiency
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20
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
external source, such as VOUT. Float BIAS or
connect it to ground if it is not being used.
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The UVLO comparator monitors the output
voltage of the internal regulator (VCC). The
UVLO rising threshold is about 2.8V, with a
150mV hysteresis.
Enable Control (EN)
EN is a digital control pin that turns the regulator
on and off. When EN is pulled below its threshold
voltage, the chip enters the lowest shutdown
current mode. If EN is pulled above its threshold
voltage, the part turns on. Do not float EN.
Power Good Indicator (PG)
The MPQ4469 has a power good (PG) indicator.
The PG pin is the open drain of a MOSFET. To
use PG indicator, It must be connected to VCC or
another voltage source through a resistor (e.g.
100kΩ). In the presence of an input voltage, the
MOSFET turns on so that the PG pin is pulled
low before SS is ready. When the regulator
output is within ±10% of its nominal output, the
PG output is pulled high after a delay of 30μs.
When the output voltage moves outside this
range with a hysteresis, the PG output is pulled
to low with a 50μs delay to indicate a failure
output status.
Programmable Frequency
The oscillating frequency of the MPQ4469 can be
programmed either by an external frequency
resistor (RFREQ) or by a logic-level synchronous
clock. The frequency resistor should be located
between FREQ and ground, as close to the device
as possible.
RFREQ can be estimated with Equation (1):
RFREQ (kΩ)
170000
fSW1.11(kHz)
(1)
The calculated resistance may need fine-tuning
by bench test.
FREQ must not be floated, even if an external
SYNC clock is added.
SYNC and PHASE
The internal oscillator frequency can be
synchronized to an external clock, ranging from
MPQ4469 Rev. 1.0
11/22/2019
350kHz up to 2.5MHz, through the SYNC pin.
The external clock should be at least 250kHz
greater than the RFREQ set frequency. Ensure the
high amplitude of the SYNC clock is above 1.8V,
and the low amplitude is below 0.4V. There is no
pulse width requirement, but there is always
parasitic capacitance of the pad. If the pulse
width is too short, a clear rising and falling edge
may not be seen due to the parasitic capacitance.
A pulse longer than 100ns is recommended in
application.
The PHASE pin is used when two or more
MPQ4469s are in parallel with the same sync clock.
Pulling PHASE high forces the device to operate in
phase with the SYNC clock. Pulling it low forces the
device to be 180° out of phase with the SYNC
clock. By setting a different PHASE voltage, two
devices can operate in 180° out-of-phase mode to
reduce the total input current ripple, so a smaller
input bypass capacitor can be used (see Figure 4).
The PHASE rising threshold is about 2.5V, with a
400mV hysteresis.
SW1: Phase High
SW2: Phase Low
SW1, SW2 has a 180o phase shift
SYNC
CLK
SW1
SW2
t
Figure 4: In-Phase and 180° Out-of-Phase
Soft Start (SS)
Soft start (SS) is implemented to prevent the
device’s output voltage from overshooting during
start-up. When the chip starts up, an internal
current source begins charging the external softstart capacitor. The internal SS voltage (VSSI)
rises with the soft-start voltage (VSS), but VSSI is a
different value from VSS due to a 0.5V offset and
some delay.
When VSS is below 0.5V, VSSI is 0V. VSSI rises
from 0V to 0.8V as VSS rises from 0.5V to 1.6V.
During this time, the error amplifier uses VSSI as
the reference, and the output voltage ramps up
from 0V to the regulated value, following VSSI
rising. When VSS reaches 1.6V, VSSI is 0.8V and
overrides the internal VREF, so the error amplifier
uses the internal VREF as the reference.
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21
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
To minimize the delay for SS to reach 0.5V, an
internal pull-up circuit with an average 100µA
current pulls SS up to 0.4V. Then a 10µA
constant current charges SS up to about 4V.
The soft-start time (tSS) set by the external SS
capacitor can be calculated with Equation (2):
t SS (ms)
CSS (nF) 1.1V
(2)
ISS (A)
Where CSS is the external SS capacitor, and ISS is
the internal 10μA SS charge current.
The delay time for SS to reach 0.5V can be
estimated with Equation (3):
t SS _ delay (ms)
CSS (nF) 0.4V
100 A
CSS (nF) 0.1V
10 A
SS can be used for tracking and sequencing.
Pre-Bias Start-Up
At start-up, if VFB exceeds VSSI - 150mV, which
means the output has a pre-bias voltage, the HSFET does not turn on until VSSI - 150mV exceeds
VFB.
Over-Current Protection (OCP) and Hiccup
Mode
The MPQ4469 has cycle-by-cycle peak current
limit protection and hiccup mode.
In hiccup mode, the MPQ4469 disables its output
power stage and discharges the soft-start
capacitor slowly. The device restarts with a full
soft start when the soft-start capacitor is fully
discharged. If the short-circuit condition still
remains after soft start ends, the device repeats
this operation until the fault is removed and the
output returns to the regulation level. This
protection mode greatly reduces the average
short-circuit current to alleviate thermal issues
and protect the regulator.
Floating Driver and Bootstrap Charging
A 0.1μF to 1μF external bootstrap capacitor
powers the floating power MOSFET driver. The
floating driver has its own UVLO protection with a
rising threshold of 2.5V and a hysteresis of
200mV.
VCC charges the bootstrap capacitor voltage to
about 5V through a PMOS pass transistor when
the SW node is low.
During high-duty cycle operation or sleep mode,
the bootstrap charging time period is shorter, so
the bootstrap capacitor may not charge
sufficiently. If the external circuit does not have
sufficient voltage or time to charge the bootstrap
capacitor, extra external circuitry can be used to
ensure the bootstrap voltage is within its normal
operation range.
The power MOSFET current is accurately sensed
via a current-sense MOSFET. It is then fed to the
high-speed current comparator for current-mode
control. If the HS-FET is on and the sensed
current exceeds the peak-current limit value set
by the COMP high clamp voltage, the HS-FET
turns off immediately. Then the inductor current
flows through the external freewheel diode and
decreases. The HS-FET remains off until the
next clock cycle starts. During OCP, the clock
frequency is related to the FB voltage, and
decreases as the FB voltage decreases. Both the
peak current limit and frequency foldback prevent
the inductor current from running away during an
overload or short-circuit condition.
BST Refresh
To improve dropout, the MPQ4469 is designed to
operate at close to 100% of the duty cycle while
the BST to SW voltage exceeds 2.5V. When the
voltage from BST to SW drops below 2.5V, the
HS-FET turns off using a UVLO circuit, which
forces an internal low-current switch to pull the
SW node low and refresh the charge on the BST
capacitor.
When the output is shorted to ground, and the
output voltage drops below 55% of its nominal
output, the peak current limit is kicked. The
MPQ4469 considers this an output dead short,
and triggers hiccup mode to periodically restart
the part.
The effective duty cycle during the dropout of the
regulator is mainly influenced by the voltage
drops across the HS-FET, inductor resistance,
and PCB resistance.
MPQ4469 Rev. 1.0
11/22/2019
Since the supply current sourced from the BST
capacitor is low, the HS-FET remains on for more
switching cycles than are required to refresh the
capacitor, making the effective duty cycle of the
switching regulator high.
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22
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
Thermal Shutdown (TSD)
Thermal shutdown is implemented to prevent
thermal runaway. When the silicon die
temperature exceeds its upper threshold, the
power MOSFET shuts down. When the
temperature drops below its lower threshold, the
chip is enabled again.
Start-Up and Shutdown
If both VIN and EN exceed their respective
thresholds, the chip starts up. The reference
block starts first by generating a stable reference
voltage and current. Then the internal regulator is
enabled. The regulator provides a stable supply
for the rest of the circuitries.
When the internal supply rail is up, an internal
timer holds the power MOSFET off for about
50µs to blank start-up glitches. When the softstart block is enabled, it holds the SS output low
to ensure the rest of the circuitries are ready,
then slowly ramps up.
Three events can shut down the chip: VIN low, EN
low, and thermal shutdown. During the shutdown
procedure, the signaling path is blocked to avoid
any fault triggering. Then VCOMP and the internal
supply rail are pulled down. The floating driver is
not subject to this shutdown command, but its
charging path is disabled.
MPQ4469 Rev. 1.0
11/22/2019
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MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The output voltage is set by connecting the
external resistor divider to the FB pin (see Figure
5).
RMS current in the input capacitor can be
estimated with Equation (4):
ICIN ILOAD
VOUT
V
(1 OUT )
VIN
VIN
(4)
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (5):
MPQ4469
RFB1
FB
VOUT
ICIN
RFB2
ILOAD
2
(5)
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
Figure 5: Feedback Network
Set RFB1 first. RFB2 can then be calculated with
Equation (3):
RFB2
RFB1
VOUT
1
0.8V
(3)
Table 1 lists the recommended feedback resistor
values for common output voltages.
Table 1: Resistor Selection for Common Output
Voltages
VOUT (V)
RFB1 (kΩ)
RFB2 (kΩ)
3.3
41.2 (1%)
13 (1%)
5
68.1 (1%)
13 (1%)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
AC current to the converter while maintaining the
DC input voltage. For the best performance, use
low-ESR capacitors. Ceramic capacitors with
X5R or X7R dielectrics are highly recommended
because of their low ESR and small temperature
coefficients.
For most applications, use a 4.7µF to 10µF
capacitor. It is strongly recommended to use
another lower value capacitor (e.g. 0.1µF) with a
small package size (0603) to absorb highfrequency switching noise. Place the small
capacitor as close to VIN and GND as possible.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1μF) as close to the IC as
possible. When using ceramic capacitors, ensure
that they have enough capacitance to provide a
sufficient charge to prevent excessive voltage
ripple at the input. Estimate the input voltage
ripple caused by the capacitance with Equation
(6):
VIN
ILOAD
V
V
OUT (1 OUT )
fSW CIN VIN
VIN
(6)
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. Use ceramic, tantalum, or low-ESR
electrolytic capacitors. For the best results, use
low-ESR capacitors to keep the output voltage
ripple low. The output voltage ripple can be
estimated with Equation (7):
VOUT
VOUT
V
1
(1 OUT ) (RESR
) (7)
fSW L
VIN
8fSW COUT
Where L is the inductor value, and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency and causes the majority of the output
voltage ripple. For simplification, the output
voltage ripple can be estimated with Equation (8):
Since CIN absorbs the input switching current, it
requires an adequate ripple current rating. The
MPQ4469 Rev. 1.0
11/22/2019
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MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
VOUT
VOUT
V
(1 OUT )
8 fSW L COUT
VIN
2
(8)
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be calculated with Equation (9):
VOUT
VOUT
V
(1 OUT ) RESR
fSW L
VIN
(9)
and a current rating greater than the maximum
load current.
VIN UVLO Setting
The MPQ4469 has an internal, fixed, undervoltage lockout (UVLO) threshold. The rising
threshold is 2.8V, and the falling threshold is
about 2.65V. For applications that require a
higher UVLO point, place an external resistor
divider between VIN and EN to achieve a higher
equivalent UVLO threshold (see Figure 6).
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MPQ4469 can be optimized for a wide range of
capacitance and ESR values.
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
at least 25% above the maximum load current is
recommended for most applications. For higher
efficiency, choose an inductor with lower DC
resistance. An inductor with a higher inductance
results in a lower ripple current and a lower
output ripple voltage. However, these inductors
also have a larger physical size, higher series
resistance, and lower saturation current. A good
rule for determining the inductor value is to allow
the inductor ripple current to be approximately
30% of the maximum load current. The
inductance value can then be calculated with
Equation (10):
L
VOUT
V
(1 OUT )
fSW IL
VIN
(10)
Where ∆IL is the peak-to-peak inductor ripple
current.
Set the inductor ripple current at approximately
30% of the maximum load current. The maximum
inductor peak current can be calculated with
Equation (11):
ILP ILOAD
VOUT
V
(1 OUT )
2fSW L
VIN
(11)
Selecting the Output Rectifier Diode
The output rectifier diode supplies the current to
the inductor when the high-side switch is off. Use
a Schottky diode to reduce losses due to the
diode forward voltage and recovery times.
Choose a diode with a maximum reverse voltage
rating greater than the maximum input voltage,
MPQ4469 Rev. 1.0
11/22/2019
VIN
VIN
RUP
EN
RDOWN
Figure 6: Adjustable UVLO Using EN Divider
The UVLO threshold can be calculated with
Equation (12) and Equation (13), for UVLO rising
and UVLO falling, respectively:
INUVRISING (1
R UP
) VEN_RISING
R DOWN
(12)
INUVFALLING (1
R UP
) VEN_FALLING
R DOWN
(13)
Where VEN_RISING = 1.05V, and VEN_FALLING = 0.93V.
External BST Diode and Resistor
An external BST diode enhances the efficiency of
the regulator when the duty cycle is high. A
power supply between 2.5V and 5V can power
the external bootstrap diode. VCC or VOUT is
recommended to be the power supply in this
circuit (see Figure 7).
VCC
RBST
External BST Diode
IN4148
BST
VCC / VOUT
CBST
L
VOUT
SW
COUT
Figure 7: Optional External Bootstrap Diode to
Enhance Efficiency
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MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
The recommended external BST diode is
IN4148, and the recommended BST capacitor
value range is 0.1µF to 1μF. A resistor in series
with the BST capacitor (RBST) can reduce the SW
rising rate and voltage spikes. This enhances
EMI performance and reduces the voltage stress
at high VIN. A higher resistance benefits SW
spike reduction but compromises efficiency. For
an ideal trade off, it is recommended to make
RBST no greater than 20Ω.
PCB Layout Guidelines (7)
Efficient PCB layout, especially input capacitor
placement, is critical for stable operation. A 4layer layout is strongly recommended to improve
thermal performance. For the best results, refer
to Figure 8 and follow the guidelines below:
1.
Place symmetric input capacitors as close to
VIN and GND as possible.
2.
Use a large ground plane to connect directly
to PGND. If the bottom layer is a ground
plane, add vias near PGND.
3.
Ensure that the high-current paths at GND
and VIN have short, direct, and wide traces.
4.
Place the ceramic input capacitor, especially
the small package size (0603) input bypass
capacitor, as close to VIN and PGND as
possible to minimize high-frequency noise.
5.
Keep the connection between the input
capacitor and IN as short and wide as
possible.
6.
Place the VCC capacitor as close to VCC
and GND as possible.
7.
Route SW and BST away from sensitive
analog areas, such as FB.
8.
Place the FB resistors as close to the chip as
possible, and keep the trace connecting to
FB as short as possible.
9.
Use multiple vias to connect the power
planes to internal layers.
Top Layer
Inner Layer 1
Inner Layer 2
Bottom Layer
Figure 8: Recommended PCB Layout
Note:
7) The recommended PCB layout is based on Figure 9.
MPQ4469 Rev. 1.0
11/22/2019
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26
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
U1
3.3V to 36V
VIN
2
C1A C1B
10μF 10μF
GND
R1
100kΩ
VIN
C5
0.1μF
L1
MPQ4469
5
EN
11
BST
C1C C1D
0.1μF 0.1μF
EN
3, 10
SW
D1
12
R5
100kΩ
VCC
FB
R3
1MΩ
GND
5pF
R4
316kΩ
7
PG
14
SS
C3
4.7nF
6
SYNC
C6
VOUT
C2A C2B
22μF 22μF
15
C4
1μF
PG
3.3V/5A
10μH
SYNC
FREQ
R6
10Ω
16
R2
169kΩ
1
PHASE
PHASE
8
BIAS
C7
0.1µF
AGND
13
4, 9
PGND
Figure 9: VOUT = 3.3V, fSW = 500kHz
U1
VIN
3.3V to 36V
2
C1A C1B
10μF 10μF
GND
R1
100kΩ
VIN
BST
C1C C1D
0.1μF 0.1μF
5
EN
11
C5
0.1μF
L1
MPQ4469
EN
SW
3, 10
D1
12
R5
100kΩ
PG
VCC
FB
R3
41.2kΩ
C6
10pF
VOUT
C2A C2B
22μF 22μF
GND
15
C4
1μF
R4
13kΩ
7
PG
SS
14
C3
4.7nF
SYNC
3.3V/5A
10μH
6
SYNC
FREQ
R6
10Ω
16
R2
169kΩ
1
PHASE
4, 9
PGND
BIAS
AGND
8
C7
0.1µF
13
PHASE
Figure 10: VOUT = 3.3V, fSW = 500kHz for < 100kΩ FB Divider Application
MPQ4469 Rev. 1.0
11/22/2019
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27
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
U1
VIN
3.3V to 36V
2
C1A
10μF
R1
100kΩ
GND
C1B
10μF
VIN
C5
0.1μF
L1
MPQ4469
5
EN
11
BST
C1C C1D
0.1μF 0.1μF
EN
3, 10
SW
D1
12
R5
100kΩ
VCC
FB
R3
1MΩ
GND
R4
191kΩ
7
PG
14
SS
C3
4.7nF
6
SYNC
C6
5pF
VOUT
C2A C2B
22μF 22μF
15
C4
1μF
PG
5V/5A
10μH
SYNC
FREQ
R6
10Ω
16
R2
169kΩ
1
PHASE
PHASE
8
BIAS
C7
0.1µF
AGND
13
4, 9
PGND
Figure 11: VOUT = 5V, fSW = 500kHz
U1
VIN
3.3V to 36V
2
C1A C1B
10μF 10μF
GND
R1
100kΩ
VIN
BST
C1C C1D
0.1μF 0.1μF
5
EN
11
C5
0.1μF
L1
MPQ4469
EN
SW
3, 10
D1
12
R5
100kΩ
PG
VCC
FB
R3
68.1kΩ
C6
10pF
VOUT
C2A C2B
22μF 22μF
GND
15
C4
1μF
R4
13kΩ
7
PG
SS
14
C3
4.7nF
SYNC
5V/5A
10μH
6
SYNC
FREQ
R6
10Ω
16
R2
169kΩ
1
PHASE
4, 9
PGND
BIAS
AGND
8
C7
0.1µF
13
PHASE
Figure 12: VOUT = 5V, fSW = 500kHz for < 100kΩ FB Divider Application
MPQ4469 Rev. 1.0
11/22/2019
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28
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
U1
VIN
3.3V to 36V
2
C1A
10μF
GND
R1
100kΩ
C1B
10μF
VIN
C5
0.1μF
L1
MPQ4469
5
EN
11
BST
C1C C1D
0.1μF 0.1μF
EN
3, 10
SW
D1
12
R5
100kΩ
VCC
FB
R3
1MΩ
C6
10pF
GND
R4
316kΩ
7
PG
14
SS
C3
4.7nF
6
SYNC
VOUT
C2A C2B
22μF 22μF
15
C4
1μF
PG
3.3V/5A
2.2μH
SYNC
FREQ
R6
10Ω
16
R2
33kΩ
1
PHASE
PHASE
8
BIAS
C7
0.1µF
AGND
13
4, 9
PGND
Figure 13: VOUT = 3.3V, fSW = 2.2MHz
U1
VIN
3.3V to 36V
2
C1A C1B
10μF 10μF
GND
R1
100kΩ
VIN
BST
C1C C1D
0.1μF 0.1μF
5
EN
11
C5
0.1μF
L1
MPQ4469
EN
SW
3, 10
D1
12
R5
100kΩ
PG
VCC
FB
R3
41.2kΩ
C6
10pF
VOUT
C2A C2B
22μF 22μF
GND
15
C4
1μF
R4
13kΩ
7
PG
SS
14
C3
4.7nF
SYNC
3.3V/5A
2.2μH
6
SYNC
FREQ
R6
10Ω
16
R2
33kΩ
1
PHASE
4, 9
PGND
BIAS
AGND
8
C7
0.1µF
13
PHASE
Figure 14: VOUT = 3.3V, fSW = 2.2MHz for < 100kΩ FB Divider Application
MPQ4469 Rev. 1.0
11/22/2019
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29
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
U1
VIN
3.3V to 36V
2
C1A C1B
10μF 10μF
R1
100kΩ
GND
VIN
C5
0.1μF
L1
MPQ4469
5
EN
11
BST
C1C C1D
0.1μF 0.1μF
EN
3, 10
SW
D1
12
R5
100kΩ
VCC
R3
1MΩ
GND
R4
191kΩ
7
PG
14
SS
C3
4.7nF
6
SYNC
C6
10pF
VOUT
C2A C2B
22μF 22μF
15
FB
C4
1μF
PG
5V/5A
2.2μH
SYNC
R6
10Ω
16
FREQ
R2
33kΩ
1
PHASE
PHASE
8
BIAS
C7
0.1µF
AGND
13
4, 9
PGND
Figure 15: VOUT = 5V, fSW = 2.2MHz
U1
VIN
3.3V to 36V
2
C1A C1B
10μF 10μF
GND
R1
100kΩ
VIN
BST
C1C C1D
0.1μF 0.1μF
5
EN
11
C5
0.1μF
L1
MPQ4469
EN
SW
3, 10
D1
12
R5
100kΩ
PG
VCC
FB
R3
68.1kΩ
C6
10pF
VOUT
C2A C2B
22μF 22μF
GND
15
C4
1μF
R4
13kΩ
7
PG
SS
14
C3
4.7nF
SYNC
5V/5A
2.2μH
6
SYNC
FREQ
R6
10Ω
16
R2
33kΩ
1
PHASE
4, 9
PGND
BIAS
AGND
8
C7
0.1µF
13
PHASE
Figure 16: VOUT = 5V, fSW = 2.2MHz for < 100kΩ FB Divider Application
MPQ4469 Rev. 1.0
11/22/2019
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30
MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN-20 (4mmx5mm)
PIN 1 ID
0.30X45° TYP.
PIN 1 ID
MARKING
PIN 1 ID INDEX
AREA
BOTTOM VIEW
TOP VIEW
SIDE VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT
INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.08
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
MPQ4469 Rev. 1.0
11/22/2019
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MPQ4469 – 36V, 5A, LOW IQ, ASYNCHRONOUS STEP-DOWN CONVERTER
CARRIER INFORMATION
Part Number
Package
Description
Quantity/Reel
Reel
Diameter
Carrier
Tape Width
Carrier
Tape Pitch
MPQ4469GV-AEC1
QFN-20 (4mmx5mm)
5000
13in
12mm
8mm
Notice: The information in this document is subject to change without notice. Users should warrant and guarantee that thirdparty Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MPQ4469 Rev. 1.0
11/22/2019
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