MPQ4572
High-Efficiency, 2A, 60V, Fully Integrated,
Synchronous Buck Converter,
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ4572 is a fully integrated, fixedfrequency, synchronous step-down converter. It
can achieve up to 2A of continuous output
current with peak current control for excellent
transient response.
The wide 4.5V to 60V input voltage range
accommodates a variety of step-down
applications in an automotive input environment.
The device’s 2μA shutdown mode quiescent
current makes it ideal for battery-powered
applications.
The MPQ4572 integrates internal high-side and
low-side power MOSFETs for high efficiency
without an external Schottky diode. It employs
advanced asynchronous modulation (AAM) to
achieve high efficiency during light-load
conditions by scaling down the frequency to
reduce switching and gate driver losses.
Standard features include built-in soft start,
enable control, and power good indication.
High-duty cycle and low-dropout mode are
provided for automotive cold crank conditions.
The chip provides over-current protection (OCP)
with valley-current detection to avoid current
runaway. It also has hiccup short-circuit protection
(SCP), input under-voltage lockout (UVLO), and
auto-recovery thermal protection.
With internal compensation, the MPQ4572 can
offer a very compact solution with a minimal
number of readily available, standard external
components. It is available in a QFN-12
(2.5mmx3mm) package.
Wide 4.5V to 60V Operating Input Range
2A Continuous Output Current
High-Efficiency, Synchronous Mode Control
250mΩ/45mΩ Internal Power MOSFETs
Configurable Frequency Up to 2.2MHz
180° Out-of-Phase SYNC Out Clock
40μA Quiescent Current
Low Shutdown Mode Current: 2μA
FB-Tolerance: 1% at Room Temp, 2% at
Full Temp
Selectable AAM or Forced CCM Operation
during Light-Load Conditions
Internal 0.45ms Soft Start
Remote EN Control
Power Good Indicator
Low-Dropout Mode
Over-Current Protection (OCP)
Short-Circuit Protection with Hiccup Mode
VIN Under-Voltage Lockout (UVLO)
Thermal Shutdown
Available in a QFN-12 (2.5mmx3mm)
Package
Available in a Wettable Flank Package
Available in AEC-Q100 Grade-1
APPLICATIONS
Automotive Infotainment
Automotive Lamps and LEDs
Automotive Motor Control
Industrial Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
MPQ4572 Rev. 1.0
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1/21/2020
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1
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL APPLICATION
Efficiency vs. Load Current
GND
100
VOUT
SW
MPQ4572
VCC
EN
EN
FREQ
GND
FB
CCM/SYNCO PG
PG
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
90
80
1.60
1.40
1.20
70
1.00
60
0.80
50
0.60
40
0.40
30
0.20
20
POWER LOSS (W)
GND
VOUT = 5V, L = 15μH, fSW = 400kHz, AAM
BST
IN
EFFICIENCY (%)
VIN
4.5V to 60V
0.00
1
10
100
1000
LOAD CURRENT (mA)
MPQ4572 Rev. 1.0
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2
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
ORDERING INFORMATION
Part Number*
MPQ4572GQB
MPQ4572GQB-AEC1
MPQ4572GQBE-AEC1***
Package
Top Marking
MSL Rating**
QFN-12 (2.5mmx3mm)
See Below
1
* For Tape & Reel, add suffix –Z (e.g. MPQ4572GQB–Z).
** Moisture Sensitivity Level Rating.
*** Wettable flank.
TOP MARKING (MPQ4572GQB AND MPQ4572GQB-AEC1)
AVN: Product code of MPQ4572GQB and MPQ4572GQB-AEC1
Y: Year code
WW: Week code
LLL: Lot number
TOP MARKING (MPQ4572GQBE-AEC1)
BMM: Product code of MPQ4572GQBE-AEC1
Y: Year code
WW: Week code
LLL: Lot number
MPQ4572 Rev. 1.0
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3
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
PACKAGE REFERENCE
TOP VIEW
CCM/
EN SYNCO
12
11
NC
NC
10
9
BST
1
8
IN
SW
2
7
GND
3
4
PG
FB
5
6
FREQ VCC
QFN-12 (2.5mmx3mm)
PIN FUNCTIONS
Pin #
Name
1
BST
2
SW
3
PG
4
FB
5
FREQ
6
VCC
7
8
9, 10
11
12
Description
Bootstrap. Connect a capacitor between SW and BST to form a floating supply across the
high-side switch driver.
Switch output. SW is the output of the internal power switches. A wide PCB trace is
recommended.
Power good indicator. The pin is an open drain; it requires a pull-up resistor to the power
source. PG is pulled up to the power source if the output voltage is within 90% to 108% of the
nominal voltage. It goes low when the output voltage exceeds 116% or falls below 84% of the
nominal voltage.
Feedback point. FB is the negative input of the error amplifier. Connect FB to the tap of an
external resistor divider between the output and GND to set the regulation voltage. In
addition, power good and under-voltage lockout circuits use FB to monitor the output voltage.
Configurable switching frequency. Connect a resistor to GND to set the switching
frequency.
Internal bias supply. This pin supplies power to the internal control circuit and gate drivers.
A decoupling capacitor (greater than 1µF) to ground is required close to this pin.
IC ground. Connect the pin to larger copper areas to the negative terminals of the input and
output capacitors.
Input supply. This pin supplies all power to the converter. Place a decoupling capacitor to
IN
ground, as close as possible to the IC, to reduce switching spikes.
No connection. These pins can be connected to GND to get better thermal and EMI
NC
performance in PCB layout.
Mode selection/synchronization output. Connect the CCM pin to GND through a resistor
CCM/ (10kΩ to 300kΩ) to force the converter into CCM. Float this pin to force the converter into
SYNCO non-synchronous AAM mode under light-load conditions. CCM/SYNCO is also a
synchronization output pin that can output a 180° out-of-phase clock to other devices.
Enable. Drive EN high to turn on the device; float or drive it low to turn off the device.
EN
GND
MPQ4572 Rev. 1.0
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4
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VIN ..............................................................65V
VSW ....................................... -0.3V to VIN + 0.3V
VBST .....................................................VSW + 6V
All other pins .................................. -0.3V to +6V
Continuous power dissipation (TA = 25°C) (2)
QFN-12 (2.5mmx3mm) ............................ 2.08W
Junction temperature ............................... 150°C
Lead temperature .................................... 260°C
Storage temperature ................ -65°C to +150°C
QFN-12 (2.5mmx3mm)
JESD51-7 (3).............................60......13....°C/W
EVQ4572-QB-00A (4)................45......11....°C/W
Electrostatic Discharge (ESD) Rating
HBM (Human body model) ........................ ±2kV
CDM (Charged device model) ................. ±750V
Recommended Operating Conditions
Continuous supply voltage (VIN) ...... 4.5V to 60V
Output voltage (VOUT) ............... 1V to 90% of VIN
Load current range .............................. 0A to 2A
Operating junction temp (TJ) .... -40°C to +150°C
Notes:
1) Absolute maximum ratings are rated under room temperature,
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
module will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) Measured on JESD51-7, 4-layer PCB.
4) Measured on MPS standard EVB: 8.9cmx8.9cm, 2oz copper
thick, 4-layer PCB.
MPQ4572 Rev. 1.0
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
ELECTRICAL CHARACTERISTICS
VIN = 24V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameters
Symbol Condition
Input Supply and Under-Voltage Lockout (UVLO)
Supply current (quiescent)
IQ
No load, VFB = 0.85V, AAM
Supply current (shutdown)
ISD
VEN = 0V
VIN UVLO rising threshold
INUVVth-R
VIN UVLO falling threshold
INUVVth-F
VIN UVLO hysteresis
INUVHYS
threshold
Output and Regulation
TJ = 25°C
Regulated FB reference
VREF
TJ = -40°C to +125°C
FB input current
IFB
VFB = 0.85V
Switches and Frequency
VBST - VSW = 5V, TJ = +25°C
High-side switch on
RDSON-H
resistance
VBST - VSW = 5V, TJ = -40°C to +125°C
TJ = 25°C
Low-side switch on
RDSON-L
resistance
TJ = -40°C to +125°C
SW leakage current
ISW-LKG
VEN = 0V, VSW = 0V or 60V
RFREQ = 76.8kΩ
Switching frequency
fSW
RFREQ = 28kΩ
RFREQ = 12.1kΩ
Minimum on time (5)
tON-MIN
Minimum off time (5)
tOFF-MIN
Power Good (PG)
PG current sink capacity
VPG-SINK Sink 4mA
Rising edge
PG delay time
tPG-DELAY
Falling edge
PG leakage current
IPG-LKG
VFB rising
PG rising threshold
PGRISING
(VFB / VREF)
VFB falling
VFB falling
PG falling threshold
PGFALLING
(VFB / VREF)
VFB rising
Enable (EN)
EN input rising threshold
VEN-RISING
EN input falling threshold
VEN-FALLING
EN threshold hysteresis
VEN-HYS
EN input current
IEN
VEN = 2V
EN turn-off delay
tEN-DELAY
BST
BST-SW UVLO
BST-SW UVLO hysteresis
Soft Start and VCC
Soft-start time
tSS
VCC regulator
VCC
ICC = 0mA
Min
Typ
Max
Units
3.8
3.3
40
2
4.0
3.5
65
5
4.2
3.7
μA
μA
V
V
500
mV
0.792 0.800 0.808
0.784
0.816
10
50
V
V
nA
150
100
30
20
300
750
1800
250
45
0.1
400
1000
2200
90
100
350
500
60
90
30
500
1250
2700
300
70
25
10
90
108
84
116
1.38
1.05
1000
mΩ
μA
kHz
kHz
kHz
ns
ns
mV
μs
μs
nA
%
%
%
%
1.45
1.12
330
0.7
1.52
1.19
V
V
mV
μA
μs
1.4
60
2.5
V
mV
5
4.6
mΩ
0.45
4.9
MPQ4572 Rev. 1.0
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5.2
ms
V
6
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
ELECTRICAL CHARACTERISTICS (continued)
VIN = 24V, VEN = 2V, TJ = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted.
Parameters
Protections
Peak current limit
Valley current limit
Zero-cross threshold
Negative current limit
Thermal shutdown (5)
Thermal shutdown
hysteresis (5)
Symbol
IPEAK-LIMIT
IVALLEY-LIMIT
IZCD
INEG-LIMIT
TSD
Condition
Min
Typ
Max
Units
20% duty cycle
2.4
2.4
-100
-2
3.5
4.6
140
-1.3
170
+300
-0.8
A
A
mA
A
°C
AAM
FCCM
Temperature rising
TSD-SYS
25
°C
Note:
5) Derived from the bench characterization and not tested in production.
MPQ4572 Rev. 1.0
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7
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL CHARACTERISTICS
VIN = 24V, TJ = -40°C to +125°C, unless otherwise noted.
Quiescent Current vs. Temperature
Shutdown Current vs. Temperature
2.5
50
2.4
2.3
ISHUT (μA)
IQ (μA)
45
40
2.2
2.1
2.0
35
1.9
1.8
30
-50
-25
0
25
50
75
TEMPERATURE (oC)
100
125
-50
VIN UVLO Threshold vs. Temperature
100
125
0.810
4.0
0.805
3.9
VREF (V)
VIN UVLO THRESHOLD (V)
0
25
50
75
TEMPERATURE (oC)
Feedback Reference vs. Temperature
4.1
3.8
3.7
Rising
Falling
3.6
0.800
0.795
3.5
3.4
0.790
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
VCC vs. Temperature
-25
0
25
50
75
TEMPERATURE (°C)
100
125
EN Threshold vs. Temperature
4.94
1.5
1.4
VEN (V)
4.92
VCC (V)
-25
4.90
4.88
1.3
Rising
Falling
1.2
1.1
4.86
1.0
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
8
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL CHARACTERISTICS (continued)
VIN = 24V, TJ = -40°C to +125°C, unless otherwise noted.
Zero-Current Detection (ZCD) vs.
Temperature
Peak Current Limit vs. Temperature
3.60
160
3.55
3.50
ILIMIT (A)
IZCD (mA)
150
140
130
3.45
3.40
120
3.35
3.30
110
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
-50
125
-25
0
25
50
75
o
TEMPERATURE ( C)
100
125
100
125
100
125
Negative Current Limit vs.
Temperature
Valley Current Limit vs. Temperature
1.40
3.60
ILIMIT-NEGATIVE (A)
ILIMIT-VALLEY (A)
3.55
3.50
3.45
3.40
1.35
1.30
1.25
3.35
3.30
1.20
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
0
25
50
75
TEMPERATURE (oC)
LS-FET On Resistance vs.
Temperature
400
70
350
60
RON-LS (mΩ)
RON-HS (mΩ)
HS-FET On Resistance vs.
Temperature
-25
300
50
40
250
200
30
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 24V, TJ = -40°C to +125°C, unless otherwise noted.
PG Rising Threshold vs. Temperature
120
PGVTH (AS PERCENTAGE OF
VFB)
PGVTH (AS PERCENTAGE OF
VFB)
115
PG Falling Threshold vs. Temperature
115
110
110
105
105
100
100
VFB Falling
VFB Rising
95
90
85
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
95
VFB Rising
VFB Falling
90
85
80
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
10
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
70
1.00
60
0.80
50
0.60
40
0.40
30
0.20
1
100
0.00
10
100
1000 2000
LOAD CURRENT (mA)
80
Efficiency vs. Load Current
fSW = 1MHz, L = 10μH, AAM
fSW = 1MHz, L = 10μH, CCM
3.20
2.80
2.40
70
2.00
60
1.60
50
1.20
40
0.80
30
0.40
20
1
10
100
LOAD CURRENT (mA)
0.00
1000 2000
100
90
80
70
60
50
40
30
20
10
0
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
1
Efficiency vs. Load Current
80
2.80
2.40
70
2.00
60
1.60
50
1.20
40
0.80
30
0.40
20
1
10
100
LOAD CURRENT (mA)
0.00
1000 2000
100
90
80
70
60
50
40
30
20
10
0
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
EFFICIENCY (%)
EFFICIENCY (%)
90
fSW = 2.2MHz, L = 4.7μH, CCM
3.20
POWER LOSS (W)
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
10
100
LOAD CURRENT (mA)
3.00
2.70
2.40
2.10
1.80
1.50
1.20
0.90
0.60
0.30
0.00
1000 2000
Efficiency vs. Load Current
fSW = 2.2MHz, L = 4.7μH, AAM
100
10
100
LOAD CURRENT (mA)
Efficiency vs. Load Current
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
90
1
1
10
100
LOAD CURRENT (mA)
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3.00
2.70
2.40
2.10
1.80
1.50
1.20
0.90
0.60
0.30
0.00
1000 2000
POWER LOSS (W)
20
1.50
1.35
1.20
1.05
0.90
0.75
0.60
0.45
0.30
0.15
0.00
1000 2000
POWER LOSS (W)
1.20
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
EFFICIENCY (%)
80
1.40
100
90
80
70
60
50
40
30
20
10
0
EFFICIENCY (%)
1.60
POWER LOSS (W)
EFFICIENCY (%)
fSW = 400kHz, L = 15μH, CCM
VIN=8V
VIN=12V
VIN=24V
VIN=36V
Vin=48V
VIN=60V
90
EFFICIENCY (%)
Efficiency vs. Load Current
fSW = 400kHz, L = 15μH, AAM
POWER LOSS (W)
100
Efficiency vs. Load Current
POWER LOSS (W)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, AAM, TA = 25°C, unless otherwise noted.
11
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, AAM, TA = 25°C, unless otherwise noted.
Line Regulation
0.20
0.15
0.15
LINE REGULATION (%)
LOAD REGULATION (%)
Load Regulation
0.20
0.10
0.05
0.00
Vin=8V
Vin=12V
Vin=24V
Vin=36V
Vin=48V
Vin=60V
-0.05
-0.10
-0.15
0.10
0.05
0.00
-0.05
-0.15
-0.20
-0.20
10
100
LOAD CURRENT (mA)
5 10 15 20 25 30 35 40 45 50 55 60
VIN (V)
1000 2000
Dropout vs. Input Voltage
Case Temp Rise vs. Load Current
60
CASE TEMPERATURE RISE
(°C)
5.2
5.0
VOUT (V)
4.8
4.6
Io=0.1A
Io=0.5A
Io=1A
Io=2A
4.4
4.2
50
40
30
20
Vin=12V
Vin=24V
Vin=60V
10
0
4.0
5.0
5.2
5.4
5.6 5.8
VIN (V)
6.0
6.2
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
IOUT (A)
6.4
Switching Frequency vs. RFREQ
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
Switching Frequency vs. VIN
fSW (kHz)
fSW (kHz)
Io=0.5A
Io=1A
Io=2A
-0.10
10
20
30
40
50
60
RFREQ (kΩ)
70
80
90 100
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
Rfreq=76.8k
Rfreq=12.1k
5 10 15 20 25 30 35 40 45 50 55 60
VIN (V)
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, AAM, TA = 25°C, unless otherwise noted. (6)
CISPR25 Class 5 Average Conducted
Emissions
CISPR25 Class 5 Peak Conducted
Emissions
150kHz to 108MHz
150kHz to 108MHz
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
PEAK CONDUCTED EMI (dBuV)
AVERAGE CONDUCTED EMI (dBuV)
CISPR25 CLASS 5 LIMITS
NOISE FLOOR
0.1
1
10
Frequency (MHz)
108
NOISE FLOOR
0.1
Frequency (MHz)
1
150kHz to 30MHz
150kHz to 30MHz
60
60
55
55
CISPR25 CLASS 5 LIMITS
50
50
AVERAGE RADIATED EMI (dBuV/m)
45
40
35
30
25
20
15
10
NOISE FLOOR
5
45
40
35
CISPR25 CLASS 5 LIMITS
30
25
20
15
10
5
0
-5
0
-10
-5
1
0.1
10
Frequency (MHz)
30
NOISE FLOOR
-10
1
0.1
55
HORIZONTAL POLARIZATION
45
CISPR25 CLASS 5 LIMITS
AVERAGE RADIATED EMI (dBuV/m)
PEAK RADIATED EMI (dBuV/m)
HORIZONTAL POLARIZATION
50
40
35
30
25
20
15
10
NOISE FLOOR
5
30
Horizontal, 30MHz to 200MHz
Horizontal, 30MHz to 200MHz
55
50
10
Frequency (MHz)
CISPR25 Class 5 Average Radiated
Emissions
CISPR25 Class 5 Peak Radiated
Emissions
45
108
10
CISPR25 Class 5 Average Radiated
Emissions
PR25 Class 5 Peak Radiated Emissions
PEAK RADIATED EMI (dBuV/m)
CISPR25 CLASS 5 LIMITS
40
35
30
25
CISPR25 CLASS 5 LIMITS
20
15
10
5
0
0
-5
-5
NOISE FLOOR
30
40
50
60
70
80
90
100 110 120
Frequency (MHz)
130
140
150
160
170
180
190
200
30
40
50
60
70
80
90
100 110 120
Frequency (MHz)
130
140
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150
160
170
180
190
200
13
MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 5V, L = 15µH, fSW = 450kHz, AAM, TA = 25°C, unless otherwise noted. (6)
CISPR25 Class 5 Average Radiated
Emissions
CISPR25 Class 5 Peak Radiated
Emissions
Vertical, 30MHz to 200MHz
Vertical, 30MHz to 200MHz
55
55
VERTICAL POLARIZATION
50
45
CISPR25 CLASS 5 LIMITS
40
35
30
25
20
15
10
40
35
30
25
15
10
5
0
0
-5
30
40
50
60
70
80
90
100 110 120
Frequency (MHz)
130
140
150
160
170
180
190
NOISE FLOOR
-5
200
30
50
60
70
80
90
100 110 120
Frequency (MHz)
130
140
150
160
170
180
190
200
Horizontal, 200MHz to 1GHz
Horizontal, 200MHz to 1GHz
55
55
HORIZONTAL POLARIZATION
50
40
CISPR25 Class 5 Average Radiated
Emissions
CISPR25 Class 5 Peak Radiated
Emissions
HORIZONTAL POLARIZATION
50
45
AVERAGE RADIATED EMI (dBuV/m)
45
PEAK RADIATED EMI (dBuV/m)
CISPR25 CLASS 5 LIMITS
20
NOISE FLOOR
5
CISPR25 CLASS 5 LIMITS
40
35
30
25
20
15
10
NOISE FLOOR
5
40
35
30
25
CISPR25 CLASS 5 LIMITS
20
15
10
5
0
0
-5
200
300
400
500
600
Frequency (MHz)
700
800
900
1000
NOISE FLOOR
-5
200
300
400
500
600
Frequency (MHz)
700
800
900
1000
CISPR25 Class 5 Average Radiated
Emissions
CISPR25 Class 5 Peak Radiated
Emissions
Vertical, 200MHz to 1GHz
Vertical, 200MHz to 1GHz
55
55
VERTICAL POLARIZATION
50
VERTICAL POLARIZATION
50
45
AVERAGE RADIATED EMI (dBuV/m)
45
PEAK RADIATED EMI (dBuV/m)
VERTICAL POLARIZATION
50
AVERAGE RADIATED EMI (dBuV/m)
PEAK RADIATED EMI (dBuV/m)
45
CISPR25 CLASS 5 LIMITS
40
35
30
25
20
15
10
NOISE FLOOR
5
40
35
30
25
CISPR25 CLASS 5 LIMITS
20
15
10
5
0
0
-5
200
300
400
500
600
Frequency (MHz)
700
800
900
1000
NOISE FLOOR
-5
200
300
400
500
600
Frequency (MHz)
700
800
900
1000
Note:
6) The EMC test results are based on the application circuit with an EMI filter (see Figure 8) and tested on the EVQ4572-QB-00A.
MPQ4572 Rev. 1.0
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Start-Up through Input Voltage
Start-Up through Input Voltage
IOUT = 0A, AAM
IOUT = 0A, CCM
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH1: VSW
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
20V/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
1ms/div.
1ms/div.
Start-Up through Input Voltage
Shutdown through Input Voltage
IOUT = 2A
IOUT = 0A, AAM
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH1: VSW
CH4: IL
2A/div.
CH1: VSW
20V/div.
10V/div.
CH4: IL
500mA/div.
1ms/div.
20ms/div.
Shutdown through Input Voltage
Shutdown through Input Voltage
IOUT = 0A, CCM
IOUT = 2A
CH3: VIN
10V/div.
CH3: VIN
10V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
10ms/div.
10ms/div.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Start-Up through EN
Start-Up through EN
IOUT = 0A, AAM
IOUT = 0A, CCM
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH1: VSW
20V/div.
CH4: IL
500mA/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
1ms/div.
1ms/div.
Start-Up through EN
Shutdown through EN
IOUT = 2A
IOUT = 0A, AAM
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH1: VSW
CH4: IL
2A/div.
10V/div.
CH1: VSW
20V/div.
CH4: IL
500mA/div.
1ms/div.
1s/div.
Shutdown through EN
Shutdown through EN
IOUT = 0A, CCM
IOUT = 2A
CH3: VEN
2V/div.
CH3: VEN
2V/div.
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH4: IL
500mA/div.
CH1: VSW
20V/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
200ms/div.
100μs/div.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Output Ripple
Output Ripple
IOUT = 0A, AAM
IOUT = 0A, CCM
CH2: VOUT/AC
10mV/div.
CH1: VSW
10V/div.
CH2:
VOUT/AC
20mV/div.
CH1: VSW
10V/div.
CH4: IL
500mA/div.
CH4: IL
1A/div.
400µs/div.
2µs/div.
Output Ripple
Short-Circuit Protection (SCP) Entry
IOUT = 2A
IOUT = 0A, AAM
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH1: VSW
10V/div.
CH2: VOUT/AC
20mV/div.
CH1: VSW
20V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
2µs/div.
4ms/div.
Short-Circuit Protection (SCP) Entry
Short-Circuit Protection (SCP) Entry
IOUT = 0A, CCM
IOUT = 2A
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH1: VSW
20V/div.
4ms/div.
4ms/div.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Short-Circuit Protection (SCP)
Recovery
Short-Circuit Protection (SCP)
Recovery
IOUT = 0A, AAM
IOUT = 0A, CCM
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH1: VSW
20V/div.
4ms/div.
4ms/div.
Short-Circuit Protection (SCP)
Recovery
Short-Circuit Protection (SCP)
Steady State
IOUT = 2A
CH2: VOUT
2V/div.
CH2: VOUT
2V/div.
CH3: VPG
5V/div.
CH3: VPG
5V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
20V/div.
CH1: VSW
20V/div.
4ms/div.
4ms/div.
Load Transient
Load Transient
IOUT = 0A to 1A, AAM
IOUT = 1A to 2A, AAM
CH2:
VOUT/AC
200mV/div.
CH2:
VOUT/AC
200mV/div.
CH4: IOUT
500mA/div.
CH4: IOUT
1A/div.
100µs/div.
100µs/div.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VOUT = 5V, L = 15µH, fSW = 400kHz, TA = 25°C, unless otherwise noted.
Cold Crank
Cold Crank
VIN = 24V to 4V to 5V, IOUT = 0A
VIN = 24V to 4V to 5V, IOUT = 2A
CH3: VIN
10V/div.
CH1: VSW
10V/div.
CH2: VOUT
5V/div.
CH3: VIN
10V/div.
CH1: VSW
10V/div.
CH2: VOUT
5V/div.
CH4: IL
500mA/div.
CH4: IL
2A/div.
40ms/div.
40ms/div.
VIN Ramp Down and Up
VIN Ramp Down and Up
VIN = 18V to 4.5V to 0V to 4.5V to 18V,
IOUT = 0A
VIN = 18V to 4.5V to 0V to 4.5V to 18V,
IOUT = 2A
CH3: VIN
5V/div.
CH1: VSW
5V/div.
CH2: VOUT
5V/div.
CH3: VIN
5V/div.
CH1: VSW
5V/div.
CH2: VOUT
5V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
10s/div.
10s/div.
Load Dump
VIN = 24V to 48V to 24V, IOUT = 2A
CH3: VIN
20V/div.
CH1: VSW
20V/div.
CH2: VOUT
5V/div.
CH4: IL
2A/div.
100ms/div.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
FUNCTIONAL BLOCK DIAGRAM
IN
CSA
VCC
Internal
Regulator
UVLO
ILIMIT
EN
RSEN
VCC
BST
REG
OCP
BST
Slope
Comp
Reference
Soft
Start
HS
Driver
COMP
VREF
Error
Amplifier
FB
18kΩ
600kΩ
36pF
0.4pF
VAAM COMP
AAM
Control
Logic
Oscillator CLK
PLL
CCM/
SYNCO
SW
VCC
LS
Driver
FREQ
50% of VREF
SCP
Hiccup
IVALLEY
PG
COMP
UV
PG REF
CSA
RSEN
ZCD
GND
Figure 1: Functional Block Diagram
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
OPERATION
The MPQ4572 is a fully integrated, synchronous,
rectified, step-down, non-isolated switch-mode
converter. It is available with a wide 4.5V to 60V
input supply range, and can achieve up to 2A of
continuous output current with excellent load and
line regulation over an ambient temperature
range of -40°C to +125°C. Figure 1 shows a
block diagram of the device.
PWM Control
At moderate to high output currents, the
MPQ4572 operates in a fixed-frequency, peak
current control mode to regulate the output
voltage.
An internal clock initiates a PWM cycle. At the
rising edge of the clock, the high-side switch (HSFET) turns on, and the inductor current rises
linearly to provide energy to the load. The HSFET remains on until its current reaches the
value set by the COMP voltage (VCOMP), which is
the output of the internal error amplifier. VCOMP is
based on the difference between the output
feedback voltage and internal high-precision
reference. VCOMP determines how much energy
should be transferred to the load. A higher load
current creates a higher VCOMP. Once the HS-FET
is on, it remains on for at least 90ns.
When the HS-FET is off, the low-side switch (LSFET) turns on immediately, and stays on until the
next clock starts. During this time, the inductor
current flows through the LS-FET. Once the LSFET is on, it remains on for at least 100ns before
the next cycle starts. To avoid shoot-through, a
dead time is inserted to prevent the HS-FET and
LS-FET from turning on simultaneously.
If the current in the HS-FET does not reach the
value set by COMP within one PWM period, the
HS-FET remains on, saving a turn-off operation.
Light-Load Operation
The MPQ4572 features configurable forced
continuous conduction mode (FCCM) and lightload asynchronous advanced mode (AAM),
which can be set by the CCM/SYNCO pin. FCCM
maintains a constant switching frequency and
smaller output ripple. However, FCCM has low
efficiency during light-load conditions, while AAM
achieves high efficiency (see Figure 2).
To force the device into FCCM, connect the
CCM/SYNCO pin to GND using a resistor
between 10kΩ and 300kΩ. In FCCM, the
converter works with a fixed frequency across a
no-load to full-load range. Float the CCM/SYNCO
pin to force the device into AAM under light-load
conditions. The device cannot change modes
while it is operating, so the mode must be
selected before start-up.
When AAM is enabled, the switching frequency is
scaled down according to VCOMP during light-load
conditions. The MPQ4572 first enters nonsynchronous operation while the inductor current
approaches zero at light-load. If the load further
decreases or is at no-load, VCOMP drops below
the internally set AAM value (VAAM). The
MPQ4572 then enters sleep mode and
consumes a low quiescent current to improve
light-load efficiency.
In sleep mode, the internal clock is blocked, so
the MPQ4572 skips some pulses. VFB is below
VREF, so VCOMP ramps up until it exceeds VAAM.
Then the internal clock is reset and the crossover
time is used as a benchmark for the next clock.
This control scheme helps the device achieve
high efficiency by scaling down the frequency to
reduce the switching and gate driver losses.
As the output current increases from light-load,
both VCOMP and the switching frequency rise. If
the output current exceeds the critical level set by
VCOMP, the MPQ4572 enters discontinuous
conduction operation (DCM) or CCM, which has
a constant switching frequency.
Inductor
Current
Load
Decreased
Inductor
Current
AAM
FCCM
t
t
Load
t Decreased
t
t
t
Figure 2: AAM and FCCM
Enable (EN) Control
The MPQ4572 can be enabled or disabled via a
remote EN signal that is referenced to ground. The
remote EN control operates with a positive logic
that is compatible with popular logic devices.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
Positive logic indicates that when the input voltage
exceeds the under-voltage lockout (UVLO)
threshold (about 4.0V), the converter is enabled by
pulling the EN pin above 1.45V. Drive the EN pin
below 1.12V to disable the MPQ4572. An internal
resistor (REN) from EN to GND allows EN to be
floated to shut down the chip (REN = 2.8MΩ when
EN is on; REN = 1.8MΩ when EN is off).
SYNC OUT (SYNCO)
The MPQ4572 has a SYNCO pin. During startup, SYNCO stays low and quickly outputs a 180°
phase-shift clock to the internal oscillator once
soft start is ready. Note that the falling edge of
SYNCO is a 180° phase-shift to the rising edge
of the internal oscillator. This function allows two
devices to operate in the same frequency, but 180°
out of phase, which reduces the total input current
ripple. This allows a smaller input bypass capacitor
to be used.
Internal Regulator
A 4.9V internal regulator powers most of the
internal circuitries. This regulator takes VIN and
operates in the full VIN range. When VIN exceeds
4.9V, the output of the regulator is in full
regulation. Lower VIN values result in lower output
voltages. The regulator is enabled when VIN
exceeds its UVLO threshold and EN is high. In
EN shutdown mode, the internal VCC regulator is
disabled to reduce power dissipation.
Compliance with the minimum on time of the HSFET is guaranteed. An advantage of this method is
that the device works at the desired fSW as long as
possible, and a correction is only made at high VIN.
For the Switching Frequency vs. VIN curve, see the
Typical Performance Characteristics section on
page 11, where RFREQ equals 12.1kHz.
Internal Soft Start (SS)
To avoid overshoot during start-up, the
MPQ4572 has built-in soft start (SS) that ramps
up the output voltage at a controlled slew rate
when the EN pin goes high. When the SS voltage
(VSS) is below the internal reference (VREF), VSS
overrides VREF as the error amplifier reference.
When VSS exceeds VREF, VREF acts as the
reference. At this point, soft start finishes, and
the MPQ4572 enters steady-state.
The SS time is internally set to 0.45ms. When the
output voltage is shorted to GND, the feedback
voltage is pulled low, then VSS is discharged. The
part will soft start again when it returns to the
normal state.
Pre-Biased Start-Up
If VFB exceeds VSS during start-up, the output has
a pre-biased voltage and neither the HS-FET nor
LS-FET turns on until VSS exceeds VFB. Note that
this capability is only available when the device is
set to AAM.
The calculated resistance may need fine tuning
with a bench test.
Power Good (PG) Indicator
The MPQ4572 has power good (PG) indication.
The PG pin is the open drain of a MOSFET. It
should be connected to a voltage source through
a resistor (e.g. 100kΩ). In the presence of an
input voltage, the MOSFET turns on so that the
PG pin is pulled to GND before soft start is ready.
PG goes high if the output voltage is within 90%
to 108% of the nominal voltage after a 70μs
delay. PG goes low when the output voltage is
above 116% or below 84% of the nominal
voltage after a 25μs delay.
It is not possible to use a high fsw with a high VIN,
since the minimum on time required for the HSFET is limited. The MPQ4572 control loop
automatically sets the maximum possible fSW up to
the set frequency, which also reduces excessive
power loss in the IC. VOUT is regulated by varying
the duration of the switch-off time of the HS-FET,
which results in an automatic reduction of fSW.
Under-Voltage Lock-Out (UVLO) Protection
The MPQ4572 has input under-voltage lockout
protection (UVLO) to ensure reliable output
power. Assuming EN is active, the MPQ4572 is
powered on when the input voltage exceeds the
UVLO rising threshold. The device is powered off
when input voltage drops below the UVLO falling
threshold. This function prevents the device from
Frequency Programmable and Foldback
The oscillating frequency (fSW) of the MPQ4572 is
programmed by an external frequency resistor.
The frequency resistor should be located
between the FREQ pin and GND, as close as
possible to the device. Select a proper RFREQ,
calculated with Equation (1):
R FREQ (MΩ)
30
fSW(kHz)
(1)
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
operating at an insufficient voltage. It is a nonlatch protection.
Over-Current Protection (OCP)
The MPQ4572 has a 3.5A peak current limit.
Once the inductor current reaches the current
limit, the HS-FET turns off immediately. Then the
LS-FET turns on to discharge the energy, and
the inductor current decreases. The HS-FET
does not turn on again until the inductor current
drops below a current threshold (the valley
current limit). This protection prevents the
inductor current from running away and
damaging the components.
Short-Circuit Protection (SCP)
When a short-circuit condition occurs, the
MPQ4572 hits its current limit immediately.
Meanwhile, the output voltage drops until VFB
falls below 50% of VREF. The device considers
this an output dead short, and triggers hiccup
short-circuit
protection
(SCP)
mode
to
periodically restart the part.
In hiccup mode, the MPQ4572 disables its output
power stage, slowly discharges the soft-start
capacitor, and then initiates a soft start. If the
short-circuit condition remains after soft start
ends, the device repeats this operation until the
short circuit disappears and the output returns to
the regulation level. This protection mode greatly
reduces the average short-circuit current to
alleviate thermal issues and protect the regulator.
Negative Current Protection
The MPQ4572 has a -1.3A negative current limit.
Once the inductor current reaches the current
limit, the LS-FET immediately turns off and the
HS-FET turns on. The current limit prevents the
negative current from dropping too low and
damaging the components.
Thermal Shutdown
For thermal protection, the MPQ4572 monitors
the IC temperature internally. This function
prevents the chip from operating at exceedingly
high temperatures. If the junction temperature
exceeds the threshold value (about 170°C), it
shuts down the whole chip. This is a non-latch
protection. There is a 25°C hysteresis. Once the
junction temperature drops to about 145°C, the
device resumes operation by initiating a soft
start.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating HS-FET driver. There are two methods to
charge the bootstrap capacitor (see Figure 3).
The first method is through the main charging
circuit from VCC through a diode. When the HSFET is on, VSW is about equal to VIN but exceeds
VCC, and the bootstrap capacitor is not charged.
The best charging period occurs when the LSFET is on, and VCC - VSW is at its largest. When
there is no current in the inductor, VSW equals
VOUT, so VCC can only charge BST when VOUT is
very small.
The second method is through the auxiliary
charging circuit from VIN. When the voltage
difference between BST and SW is below the
internal 5V bootstrap regulator, a PMOS pass
transistor (M1) turns on to charge the bootstrap
capacitor. The charging current is much smaller
than that from VCC, but as long as VIN exceeds
VSW, BST can be charged. This function is useful
in sleep mode, when there is not always a switch.
Figure 3: Internal Bootstrap Charging Circuit
Low-Dropout Operation (BST Refresh)
To improve dropout, the MPQ4572 is designed to
operate at close to 100% duty cycle as long as
the BST-to-SW voltage exceeds 1.4V. When the
BST-to-SW voltage drops below 1.34V, the HSFET turns off using a UVLO circuit, which allows
the LS-FET to conduct and refresh the charge on
the BST capacitor. When the input voltage drops,
the HS-FET remains on and close to 100% duty
cycle to maintain output regulation, until the BSTto-SW voltage falls below 1.34V.
Since the supply current sourced from the BST
capacitor is low, the HS-FET can remain on for
more switching cycles than are required to
refresh the capacitor. The means the effective
duty cycle of the switching regulator is high.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
The effective duty cycle during regulator dropout
is mostly influenced by the voltage drops across
the power MOSFET, inductor resistance, lowside diode, and PCB resistance.
Start-Up and Shutdown
If both VIN and VEN exceed their respective
thresholds, the chip starts. The reference block
starts first, generating a stable reference voltage
and current, and then the internal regulator is
enabled. The regulator provides a stable supply
for the remaining circuitries.
Three events can shut down the chip: EN going
low, VIN UVLO, and thermal shutdown. In the
shutdown procedure, the signaling path is first
blocked to avoid any fault triggering. The COMP
voltage and the internal supply rail are then
pulled down. The floating driver is not subject to
this shutdown command, but its charging path is
disabled.
While the internal supply rail is up, an internal
timer holds the power MOSFET off for about
50µs to blank the start-up glitches. When the
soft-start block is enabled, it first holds its SS
output low to ensure the circuitries are ready, and
then slowly ramps up.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider connected to the FB
pin sets the output voltage (see the Typical
Application section on page 29). The feedback
resistor (R1) must account for both stability and
dynamic response, so it cannot be too large or
too small. Choose an R1 value of about 40kΩ.
R2 is then estimated with Equation (2):
R2
Figure 4 shows
feedback network.
R1
VOUT
1
0.8
the
(2)
recommended
T-type
A good rule to determine the ideal inductance
value is to allow the inductor ripple current to be
approximately 30% of the maximum load current.
Ensure that the peak inductor current is below
the device peak current limit. The inductance
value can be calculated with Equation (3):
L
VOUT
V
(1 OUT )
fSW IL
VIN
(3)
Where ΔIL is the peak-to-peak inductor ripple
current.
Choose an inductor that will not saturate under
the maximum inductor peak current. Calculate
the peak inductor current with Equation (4):
MPQ4572
FB 5
inductor, higher series resistance, and lower
saturation current.
R3
R1
VOUT
R2
Figure 4: Feedback Network
R3 + R1 is used to set the loop bandwidth. A
higher R3 + R1 indicates a lower bandwidth. To
ensure loop stability, it is strongly recommended
to limit the bandwidth below 1/10 of the switching
frequency, and no higher than 100kHz.
The calculated resistance may need fine-tuning
via bench testing. Table 1 lists the recommended
feedback divider resistor values for common
output voltages. Use check loop analysis before
using the device in an application, and change
the resistance of R3 for loop stability if necessary.
Table 1: Resistor Values for Typical VOUT
VOUT (V)
R1 (kΩ)
R2 (kΩ)
3.3
5.0
41.2
41.2
13
7.68
Selecting the Inductor
The inductor must supply constant current to the
output load while being driven by the switching
input voltage. For the highest efficiency, choose
an inductor with a low DC resistance. High
inductance will result in less ripple current and
lower output ripple voltage. However, a larger
inductance value results in a physically larger
ILP IOUT
VOUT
V
(1 OUT )
2fSW L
VIN
(4)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
the AC current to the converter while maintaining
the DC input voltage. Use low-ESR capacitors for
the best performance. Ceramic capacitors with
X5R
or
X7R
dielectrics
are
strongly
recommended because of their low ESR and
small temperature coefficients. Other capacitors,
such as Y5V and Z5U, should not be used since
they lose too much capacitance with frequency,
temperature, and bias voltage.
Place the input capacitors as close to the IN pin
as possible. For most applications, a 22µF
capacitor is sufficient. For higher output voltages,
use a 47μF capacitor to improve system stability.
To maintain a small solution size, choose a
properly sized capacitor that has a voltage rating
compliant with the input spec.
Since the input capacitor absorbs the input
switching current, it requires an adequate ripple
current rating, which should not exceed the
converter’s maximum input ripple current. The
input ripple current can be estimated with
Equation (5):
ICIN IOUT
VOUT
V
(1 OUT )
VIN
VIN
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(5)
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (6):
ICIN
IOUT
2
(6)
For simplification, choose an input capacitor with
an RMS current rating greater than half of the
maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, use a small, high-quality ceramic
capacitor (0.1μF), placed as close to the IC as
possible. The input capacitance value determines
the input voltage ripple of the converter. If there
is an input voltage ripple requirement in the
system design, choose an input capacitor that
meets the specification.
The input voltage ripple caused by the
capacitance can be estimated with Equation (7):
VIN
IOUT
V
V
OUT (1 OUT )
fSW CIN VIN
VIN
(7)
The worst-case condition occurs at VIN = 2VOUT,
estimated with Equation (8):
VIN
I
1
OUT
4 fSW CIN
(8)
Selecting the Output Capacitor
The output capacitor maintains the output DC
voltage. Ceramic capacitors with low ESR are
recommended for a small size and low output
voltage ripple. Electrolytic and polymer
capacitors may also be used. The output voltage
ripple can be estimated with Equation (9):
VOUT
VOUT
V
1
(1 OUT ) (RESR
) (9)
fSW L
VIN
8fSW COUT
Where RESR is the equivalent series resistance of
the output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency and causes most of the output voltage
ripple. For simplification, the output voltage ripple
can be calculated with Equation (10):
VOUT
VOUT
V
(1 OUT )
8 fSW L COUT
VIN
2
(10)
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be calculated with Equation (11):
VOUT
VOUT
V
(1 OUT ) RESR
fSW L
VIN
(11)
Another consideration for output capacitance is
the allowable overshoot in VOUT if the load is
suddenly removed. In this case, energy stored in
the inductor is transferred to COUT, causing its
voltage to rise. To achieve a desired overshoot
relative to the regulated voltage, the output
capacitance can be estimated with Equation (12):
COUT
IOUT 2 L
(12)
VOUT 2 ((VOUTMAX / VOUT )2 1)
Where VOUTMAX / VOUT is the allowable maximum
overshoot.
After calculating the capacitance required for
both ripple and overshoot needs, choose the
larger value.
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MPQ4572 can be optimized for a wide range of
capacitance and ESR values.
VIN Under-Voltage Lockout (UVLO) Setting
The MPQ4572 has an internal, fixed UVLO
threshold. The rising threshold is 4.0V, while the
falling threshold is about 3.5V. For applications
that require a higher UVLO point, place an
external resistor divider between EN and IN to
obtain a higher equivalent UVLO threshold (see
Figure 5 and Figure 6). Add a 6V Zener diode
between EN to GND if the EN pin is connected to
VIN through a resistor.
8
VIN
IN
R4
12
Zener
6V
R5
EN
1.8MΩ
Figure 5: Adjustable UVLO Using EN Divider
when EN Rises
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
8
VIN
IN
R4
12
Zener
R5
6V
EN
2.8MΩ
Figure 6: Adjustable UVLO Using EN Divider
when EN Falling
BST Resistor and Capacitor
A resistor in series with the BST capacitor (RBST)
can reduce the SW rising rate and voltage spikes.
This enhances EMI performance and reduces
voltage stress at a high VIN. A higher resistance
is better for SW spike reduction, but
compromises efficiency. To make a tradeoff
between EMI and efficiency, it is recommended
to keep RBST below 20Ω. The recommended BST
capacitor value is between 0.1µF and 1μF.
The UVLO threshold can be calculated with
Equation (13) and Equation (14) when EN is
rising or falling, respectively:
INUV RISING (1
INUV FALLING (1
R4
) VEN_RISING
1.8M//R5
(13)
R4
) VEN_FALLING
2.8M//R5
(14)
Where VEN_RISING = 1.45V, VEN_FALLING = 1.12V.
When choosing R4, ensure it is big enough to
limit the current flowing into EN pin below 100µA.
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
PCB Layout Guidelines (7)
An optimized PCB layout is very important for
proper operation. A 4-layer layout is strongly
recommended to improve thermal performance.
For the best results, refer to Figure 7 and follow
the guidelines below:
1. Place the high-current paths (GND, IN, and
SW) very close to the device with short,
direct, and wide traces.
2. Use large copper areas to minimize
conduction loss and thermal stress.
Top Layer and Top Silk
3. Place the ceramic input capacitors as close to
the IN and GND pins as possible to minimize
high-frequency noise.
4. Place the T-type feedback resistors as close
as possible to the FB pin to ensure that the
trace connecting to the FB pin is as short as
possible.
5. Route SW and BST away from sensitive
analog areas, such as FB.
6. Use multiple vias to connect the power
planes to internal layer.
Inner Layer 1
Note:
7) The recommended PCB layout is based on the circuit in Figure
8.
Inner Layer 2
Bottom Layer and Bottom Silk
Figure 7: Recommended PCB Layout
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
TYPICAL APPLICATION CIRCUIT
C4
0.1µF
CIN9
22µF
GND
C1A
C1B
C1C
10µF 10µF 0.1µF
1210 1210 0603
C1D
0.1µF
0603
BST
VEMI
L3
15µH
1
U1
8 IN
SW
VOUT
R1
100kΩ
12
EN
D1
3
PG
C2B
22µF
GND
R5
7.68kΩ
MPQ4572
BZT52C6V2
PG
C2A
22µF
R4
41.2kΩ
R6
20kΩ
4
FB
EN
5V/2A
2
FREQ
5
R11
76.8kΩ
R9
100kΩ
VCC
CCM/SYNCO
11
CCM/SYNCO
GND
6
R10
100kΩ
7
C3
1µF
JP1
1
2
Figure 8: Typical Application Circuit
VEMI
L1
L2
240nH DFE201612E-R24M 4.7µH FDSD0402-H-4R7M
5V to 60V
CIN1 CIN2 CIN3 CIN4 CIN5 CIN6
1nF 10nF 1nF 10nF 1µF 1µF
GND
0603
0603
0603
0603 0805
CIN7 CIN8
10µF 10µF
0805
1210
CIN9
22µF
VIN
C1A C1B C1C C1D
10µF 10µF 0.1µF 0.1µF
1210
1210
1210
0603
0603
C4
0.1µF
8
C12
R23
0.1µF/100V 10Ω/0603
IN
1
L3
15µH
BST
U1
VIN
SW
R1
100kΩ
12
EN
D1
4
3
P
G
FREQ
R11
76.8kΩ
CCM/SYNCO
VOUT
C2C
1nF
C2D
10nF
C2E
1nF
C2F
10nF
GND
11
VOUT
CCM/SYNCO
R10
100kΩ
C10
R20
0.1µF 10Ω
C11
R21
7
VCC
GND
6
C2B
22µF
5
R9
100kΩ
C3
1µF
R4
41.2kΩ
R6
20kΩ
C2A
22µF
R5
7.68kΩ
MPQ4572
BZT52C6V2
PG
FB
EN
5V/2A
VOUT
2
JP1
1
0.1µF 10Ω
2
Figure 9: Typical Application Circuit with EMI Filters
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
PACKAGE INFORMATION
QFN-12
(2.5mmx3mm)
QFN-12
(2.5mmX3mm)
Non-Wettable Flank
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NOTE:
1) LAND PATTERNS OF PINS 2, 7, AND 8
HAVE THE SAME LENGTH AND WIDTH.
2) ALL DIMENSIONS ARE IN MILLIMETERS.
3) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
PACKAGE OUTLINE DRAWING FOR 12L FCQFN (2.5X3.0MM)-3
PACKAGE INFORMATION
(continued) revision 0.0
MF-PO-D-0484
QFN-12 (2.5mmx3mm)
Wettable Flank
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
SECTION A-A
NOTE:
1) THE LEAD SIDE IS WETTABLE.
2) LAND PATTERNS OF PINS 2, 7, AND 8
HAVE THE SAME LENGTH AND WIDTH.
3) ALL DIMENSIONS ARE IN MILLIMETERS.
4) LEAD COPLANARITY SHALL BE 0.08
MILLIMETERS MAX.
5) JEDEC REFERENCE IS MO-220.
6) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
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MPQ4572 – 60V, 2A, SYNCHRONOUS STEP-DOWN CONVERTER, AEC-Q100
CARRIER INFORMATION
Part Number
Package
Description
Quantity/Reel
Reel Diameter
Carrier
Tape Width
Carrier
Tape Pitch
MPQ4572GQB-Z
MPQ4572GQB-AEC1-Z
MPQ4572GQBE-AEC1-Z
QFN-12
(2.5mmx3mm)
5000
13in
12mm
8mm
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
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