MPQ6526
Hex Half-Bridge Motor Driver
with Serial Input Control
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MPQ6526 is a six, half-bridge, DMOS,
output driver with integrated power MOSFETs
that can drive up to six different loads.
The six half-bridges can be controlled
separately from a standard serial data interface
and have various diagnostic functions. The
MPQ6526 has very low quiescent current in
standby mode, making it suitable for a wide
range of applications.
Full protection features include short-circuit
protection (SCP), under-voltage protection
(UVP), and thermal shutdown.
The MPQ6526 requires a minimal number of
readily
available,
standard,
external
components and is available in QFN-24
(4mmx4mm)
and
QFN-24
(5mmx5mm)
packages.
Up to 0.9A Output Current
Total Max Current 2.4A (All Outputs
Combined)
RDS(ON) (HS + LS) Typically 1.1Ω at 25°C,
Maximum 2Ω at 150°C
Very Low Quiescent Current IVS < 6μA in
Standby Mode Versus Total Temperature
Range
Outputs Short-Circuit Protected
Over-Temperature
Protection
and
Pre-Warning
Under-Voltage Protection (UVP)
Serial Data Interface
Various Diagnostic Functions: Shorted
Output, Open-Load, Over-Temperature, and
Under-Voltage
Fault Output Flag
Daisy Chaining Possible
Serial Interface Clock Frequency up to
3MHz, 5V Compatible
Available in QFN-24 (4mmx4mm) and
QFN-24 (5mmx5mm) Packages
Available in QFN-24 (5mmx5mm) with
Wettable Flank
Available in AEC-Q100 Grade 1
APPLICATIONS
Drive Various Loads in Automotive and
Industrial Applications
DC Motors
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit the MPS website under Quality
Assurance. “MPS” and “The Future of Analog IC Technology” are registered
trademarks of Monolithic Power Systems, Inc.
MPQ6526 Rev. 1.01
www.MonolithicPower.com
9/10/2018
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© 2018 MPS. All Rights Reserved.
1
MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
TYPICAL APPLICATION
Serial Load Configuration
Parallel Load Configuration (Independent Motor Operation)
MPQ6526 Rev. 1.01
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
ORDERING INFORMATION
Part Number*
MPQ6526GR-AEC1
MPQ6526GU-AEC1
MPQ6526GUE-AEC1**
Package
QFN-24 (4mmx4mm)
QFN-24 (5mmx5mm)
QFN-24 (5mmx5mm)
Top Marking
See Below
See Below
See Below
* For Tape & Reel, add suffix –Z (e.g. MPQ6526GR-AEC1–Z)
** Wettable Flank
TOP MARKING (MPQ6526GR-AEC1)
MPS: MPS prefix
Y: Year code
WW: Week code
MP6526: Product code of MPQ6526GR-AEC1
LLLLLL: Lot number
TOP MARKING (MPQ6526GU-AEC1)
MPS: MPS prefix
YY: Year code
WW: Week code
MP6526: Product code of MPQ6526GU-AEC1
LLLLLLL: Lot number
TOP MARKING (MPQ6526GUE-AEC1)
MPS: MPS prefix
YY: Year code
WW: Week code
MP6526: Product code of MPQ6526GUE-AEC1
LLLLLLL: Lot number
E: Wettable lead flank
MPQ6526 Rev. 1.01
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
PGND
OUT5
PGND
PGND
OUT6
DI
TOP VIEW
24
23
22
21
20
19
2
17
CS
VS
3
16
AGND
VS
4
15
FAULT
VS
5
14
VCC
OUT3
6
13
DO
8
9
10
11
12
EN
7
OUT1
VS
PGND
CLK
PGND
18
OUT2
1
PGND
OUT4
QFN-24 (4mmx4mm)
QFN-24 (5mmx5mm)
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (5)
Supply voltage (VVS) ..................................... 40V
VOUTx ........................................ -0.3 to VVS + 0.3V
Logic supply voltage (VVCC) ........... -0.3 to +6.5V
Logic input voltage ................ -0.3 to VVCC + 0.3V
Logic output voltage .............. -0.3 to VVCC + 0.3V
Voltage at all other pins ................. -0.3 to +6.5V
Continuous power dissipation (TA = +25°C) (2)
QFN-24 (4mmx4mm) ..................................... 3W
QFN-24 (5mmx5mm) .................................. 3.5W
Junction temperature ................................ 150°C
Lead temperature...................................... 260°C
Storage temperature ................... -60°C to 150°C
QFN-24 (4mmx4mm) ............. 42 ....... 9 .... °C/W
QFN-24 (5mmx5mm) ............. 36 ....... 8 .... °C/W
ESD Susceptibility (3)
Human body mode (HBM) ............................ 2kV
Machine mode (MM) ................................... 200V
Charge device model (CDM) ...................... 750V
θJA
θJC
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum
junction
temperature
TJ
(MAX),
the
junction-to-ambient thermal resistance θJA, and the ambient
temperature TA. The maximum allowable continuous power
dissipation at any ambient temperature is calculated by PD
(MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable
power dissipation produces an excessive die temperature,
causing the regulator to go into thermal shutdown. Internal
thermal shutdown circuitry protects the device from permanent
damage.
3) Devices are ESD-sensitive. Handling precaution is
recommended.
4) The device is not guaranteed to function outside of its
operating conditions.
5) Measured on JESD51-7, 4-layer PCB.
Recommended Operating Conditions (4)
Supply voltage (VVS) ........................... 7V to 28V
Logic supply voltage (VVCC) ........ 4.75V to 5.25V
Operating junction temp. (TJ) ....-40°C to +150°C
MPQ6526 Rev. 1.01
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9/10/2018
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
ELECTRICAL CHARACTERISTICS
7V < VVS < 28V, VVCC = 5V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
Operating supply current (VS)
Symbol
IVS
Condition
Min
VVS < 28V normal operation,
all output stages off
VVS < 28V normal operation,
all output low stages on, no load
VVS < 28V normal operation,
all output high stages on, no load
4.75V < VVCC < 5.25V, normal
operation
VVS = 28V, VVCC = 0V or VVCC =
5V, EN = low, or VVCC = 5V, bit SE
= low, output pins to VS and GND
4.75V < VVCC < 5.25V, EN or bit
SE = low
Typ
Max
Units
2.6
6
2.7
6
2.75
6
67
90
μA
1.8
6
μA
23
35
μA
3
mA
mA
Operating supply current (VCC)
IVCC
Quiescent current (VS)
IVS
Quiescent current (VCC)
IVCC
Discharge current (VS)
IVS
Internal oscillator frequency
fOSC
85
120
166
kHz
Power-on reset threshold
VVCC
2.3
2.6
3.0
V
30
100
190
μs
6.5
V
Power-on reset delay
VVS = 40V, EN = low
After switching on VVCC
Under-voltage lockout threshold
rising
Under-voltage lockout threshold
hysteresis
Under-voltage lockout delay time
Output Specification
5.5
0.6
7
HS + LS switch-on resistance
RDS(ON)
Inductive shutdown energy (7)
Over-current limit
IOCP
Over-current shutdown delay time
Open-load detection current
Output switch-on/-off delay
OUTx rising time
OUTx falling time
Dead time
EN Input
EN low-level threshold
EN high-level threshold
Pull-down current of EN input
TJ = -40°C to +125°C
TJ = +150°C (6)
Bit14 (SCT) = low, VVS = 13V
Bit14 (SCT) = high, VVS = 13V
Bit13 (OLD) = low, output off
VVS = 13V, RLOAD = 50Ω
VVS = 13V, 10% to 90% VOUT,
RLOAD = 50Ω
VVS = 13V, 10% to 90% VOUT,
RLOAD = 50Ω
VVS =13V, RLOAD = 50Ω
V
14
23
ms
1.1
1.7
2
15
1.8
0.3
0.72
2.4
60
Ω
Ω
mJ
A
mA
μs
1
0.1
0.28
1.4
1.3
0.21
0.53
1.9
2
20
50
μs
2
20
45
μs
2
μs
0.8
VEN = VVCC
3
10
ms
1.7
MPQ6526 Rev. 1.01
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80
V
V
μA
5
MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
ELECTRICAL CHARACTERISTICS (continued)
7V < VVS < 28V, VVCC = 5V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
Symbol
Thermal Shutdown and Pre-Warning
Thermal pre-warning threshold
Thermal pre-warning hysteresis
Thermal shutdown threshold
Thermal shutdown hysteresis
Ratio thermal shutdown/thermal
pre-warning
Condition
Min
Typ
Max
Units
120
145
15
175
15
170
°C
°C
°C
°C
(7)
150
1.05
200
1.2
MPQ6526 Rev. 1.01
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
SERIAL INTERFACE TIMING ELECTRICAL CHARACTERISTICS (7)
7V < VVS < 28V, VVCC = 5V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
Logic Inputs (DI, CLK, CS)
Symbol
Condition
Min
Typ
Input low-level threshold
Input high-level threshold
Pull-down current of DI, CLK
Pull-up current of CS
Logic Output (DO)
Output low level
VDI, VCLK = VVCC
VCS = 0V
Output high level
Leakage current (tri-state)
Timing Characteristics
DO enable after CS falling edge
DO disable after CS rising edge
DO falling/rising time
DO valid time
CS set-up time (high to low)
CS set-up time (low to high)
0V < VDO < VVCC, VCS = VVCC
T10
T4
T8
CS high time
T9
CLK high time
CLK low time
CLK period time
CLK set-up time (high to low)
CLK set-up time (low to high)
DI set-up time
DI hold time
T5
T6
T1
T2
0.7 x
VVCC
2
2
VVCC 0.7V
-10
CDO = 100pF
CDO = 100pF
CDO = 100pF
CDO = 100pF
Bit14 (SCT) = high
Bit14 (SCT) = low
T7
T3
T11
T12
150
150
0.75
0.3
150
150
333
150
150
26
26
Max
Units
0.3 x
VVCC
V
V
50
50
μA
μA
0.5
V
V
10
μA
200
200
100
200
ns
ns
ns
ns
ns
ns
ms
ms
ns
ns
ns
ns
ns
ns
ns
NOTES:
6) Guaranteed by characterization, not tested in production.
7) Not subject to production test, specified by design.
MPQ6526 Rev. 1.01
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9/10/2018
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
SERIAL INTERFACE TIMING DIAGRAMS
MPQ6526 Rev. 1.01
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9/10/2018
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
TYPICAL PERFORMANCE CHARACTERISTICS
VVS = 13V, VVCC = 5V, TA = 25°C, unless otherwise noted.
MPQ6526 Rev. 1.01
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9/10/2018
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VVS = 13V, VVCC = 5V, TA = 25°C, unless otherwise noted.
SCP
Output Delay Time
Output Delay Time
SCT=0, OUT1 short to OUT2
HS ON
HS OFF
VOUT1
10V/div.
VCLK
2V/div.
VCLK
2V/div.
VOUT2
10V/div.
ISC
1A/div.
VCS
2V/div.
VCS
2V/div.
VOUT
5V/div.
VOUT
5V/div.
Output Delay Time
Output Delay Time
LS OFF
LS ON
VCLK
2V/div.
VCLK
2V/div.
VCS
2V/div.
VCS
2V/div.
VOUT
5V/div.
VOUT
5V/div.
MPQ6526 Rev. 1.01
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
PIN FUNCTIONS
QFN-24
QFN-24
4x4
5x5
Pin #
Pin #
1
1
2, 3, 4, 5
3, 4
6
6
7, 9, 10, 21, 7, 9, 10, 21,
22, 24
22, 24
8
8
11
11
Name
Description
OUT4
VS
OUT3
Half-bridge output 4.
Power supply.
Half-bridge output 3.
PGND
Power ground.
OUT2
OUT1
Half-bridge output 2.
Half-bridge output 1.
Enable. Drive EN low for standby mode. Drive EN high for normal
operation.
Serial data output.
Logic supply voltage.
Fault output. A low output at FAULT indicates that the IC has detected
an over-temperature or over-current condition. This output is open-drain.
Analog ground.
Chip select input.
Serial clock input.
Serial data input.
Half-bridge output 6.
Half-bridge output 5.
No connection.
12
12
EN
13
14
13
14
DO
VCC
15
15
FAULT
16
17
18
19
20
23
-
16
17
18
19
20
23
2, 5
AGND
CS
CLK
DI
OUT6
OUT5
NC
MPQ6526 Rev. 1.01
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
BLOCK DIAGRAM
Figure 1: Functional Block Diagram
MPQ6526 Rev. 1.01
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
OPERATION
The MPQ6526 is a six, half-bridge, motor driver
that can drive up to six different loads with
separate controls for high-side or low-side
MOSFETs from a standard serial data interface.
Serial Interface
Data transfer starts with the falling edge of the
CS signal (see Figure 2). Execution of new input
data is enabled on the rising edge of the CS
signal. Data must appear at DI synchronized to
CLK and is accepted on the falling edge of the
CLK signal. LSB (bit0, SRR) must be transferred
first.
The output data at DO is enabled on the falling
edge of CS. The output data changes state with
the rising edge of CLK and remains stable until
the next rising edge of CLK appears. When CS
is high, DO is in a tri-state condition. LSB (bit0,
TP) is transferred first.
Figure 2: Data Transfer
Table 1: Input Data Protocol
Bit
Input Register
0
SRR
1
2
3
4
5
6
7
8
9
10
11
12
13
LS1
HS1
LS2
HS2
LS3
HS3
LS4
HS4
LS5
HS5
LS6
HS6
OLD
14
SCT
15
SE
Function
Status register reset (high = reset; the bits PSF, SCD and over-temperature
shutdown in the output data register are set to low).
Controls output LS1 (high = switch output LS1 on).
Controls output HS1 (high = switch output HS1 on).
Controls output LS2 (high = switch output LS2 on).
Controls output HS2 (high = switch output HS2 on).
Controls output LS3 (high = switch output LS3 on).
Controls output HS3 (high = switch output HS3 on).
Controls output LS4 (high = switch output LS4 on).
Controls output HS4 (high = switch output HS4 on).
Controls output LS5 (high = switch output LS5 on).
Controls output HS5 (high = switch output HS5 on).
Controls output LS6 (high = switch output LS6 on).
Controls output HS6 (high = switch output HS6 on).
Open-load detection (low = on).
Programmable time delay for short circuit (shutdown delay high/low =
12ms/1.5ms).
Software enable. Low = standby, high = normal operation (data transfer is not
affected by standby function because the digital part is still powered).
MPQ6526 Rev. 1.01
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
Table 2: Output Data Protocol
Bit
Input Register
0
TP
1
Status LS1
2
Status HS1
3
4
5
6
7
8
9
10
11
12
Status LS2
Status HS2
Status LS3
Status HS3
Status LS4
Status HS4
Status LS5
Status HS5
Status LS6
Status HS6
13
SCD
14
EN
15
PSF
Function
Temperature pre-warning: high = warning (over-temperature shutdown see
remark below).
Normal operation: high = output is on, low = output is off. Open-load detection:
high = open load, low = no open load (correct load condition is detected if the
corresponding output is switched off).
Normal operation: high = output is on, low = output is off. Open-load detection:
high = open load, low = no open load (correct load condition is detected if the
corresponding output is switched off).
See LS1.
See HS1.
See LS1.
See HS1.
See LS1.
See HS1.
See LS1.
See HS1.
See LS1.
See HS1.
Short circuit detected. Set SCD high when at least one output is switched off by
a short-circuit condition.
Enable. EN is controlled by software (bit SE in the input register) and hardware
Enable (EN). Low = standby, high = normal operation.
Power supply fail. Under-voltage at VS detected.
NOTE: Bit0 to 15 = high: over-temperature shutdown.
Table 3: Status of the Input Register after Power-On Reset
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
(SE) (SCT) (OLD) (HS6) (LS6) (HS5) (LS5) (HS4) (LS4) (HS3) (LS3) (HS2) (LS2) (HS1) (LS1) (SRR)
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
Enable Control (EN)
There are two ways to enable or disable the
MPQ6526:
Controlled by software: set bit SE in the input
register. Low = standby, high = normal
operation.
Hardware enable (EN): low = standby, high =
normal operation.
In both cases, if the device is disabled, then all
output stages are turned off, but the serial
interface remains active. The output stages can
be activated again by setting the bit SE high
(when EN = high) or by switching EN back to
high (when SE = high).
Open-Load Detection
When the open-load detection bit (OLD) is set to
low, open-load detection is enabled. In this
mode, a pull-down current for each low-side
switch is turned on. When an open-load has
been detected, the corresponding output bit
(LSx or HSx) in the output data register is set to
high. Once the open load is removed, the
corresponding DO bit is cleared, indicating the
end of the open-load event.
Testing the open load of H-bridge configuration
is a two-step process. First, switch off all
high-side (HSx/HSy) and low-side (LSx/LSy)
drivers. The voltage at both clamps in this
condition is pulled down. Next, with both
low-side drivers off, switch on one high-side
driver (HSx or HSy). Since the DC motor has a
relatively low internal resistance, the voltage of
the inactive high-side output should be at the
same level as the activated high-side output. In
the case of an open load, the inactive high-side
output register reports a 0 if the active high-side
output is 1. Conversely, if the load is connected,
the inactive high-side output reports a 1.
Discharge Circuit
Many
typical
applications
use
an
inverse-polarity protection diode (see D1 in
Figure 3). However, this method involves a
certain danger. During inhibit mode, the IC
consumes only an extremely low current (IVS),
such as 20μA maximum. Any peaks on the
supply voltage charge the blocking capacitor
gradually. D1 prevents the capacitor from
discharging via the power supply. Due to the
extremely small quiescent current, discharging
via the IC can also be neglected. This means
that during long periods in inhibit mode, the IC's
supply voltage could increase continuously until
the maximum supply voltage limit of 40V is
exceeded, damaging the IC. The device
features a discharger circuit that prevents such
unwanted effects. If VS exceeds a threshold
value of approximately 37V, the blocking
capacitor is discharged via an integrated
resistor until VS falls below the threshold again.
Figure 3: Functional Principle of the Discharger
Circuit
Over-Current Protection (OCP)
The MPQ6526 has internal overload and
short-circuit protection. The currents in both the
high-side and low-side MOSFETs are measured
and if the current exceeds the current limit, an
internal timer is started. When a permanent
over-current shutdown delay time programmed
by the short-circuit timer bit (SCT) is reached,
the short-circuit detection bit (SCD) is set, and
the shorted output is disabled. By writing a high
to the SRR bit in the input register, the SCD bit
is reset, and the disabled outputs are enabled.
MPQ6526 Rev. 1.01
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9/10/2018
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MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
Thermal Shutdown and Pre-Warning
Thermal monitoring is also integrated into the
MPQ6526. If the junction temperature rises
above the thermal pre-warning threshold, the
temperature pre-warning bit (TP) in the output
register is set. When the temperature falls below
the thermal pre-warning threshold, the bit TP is
reset. The bit TP can be read without
transferring a complete 16-bit data word. When
CS = high to low, the state of TP appears at DO.
After the microcontroller has read this
information, CS is set high, and the data transfer
is interrupted without affecting the state of the
input and output registers.
If the junction temperature rises above the
thermal shutdown threshold, all switches turn off,
and all bits in the output register are set high.
Operation resumes immediately when the
junction temperature has fallen below the
thermal shutdown threshold and when a high
has been written to the SRR bit in the input
register.
The thermal pre-warning
threshold have hysteresis.
and
Power-Supply Fail
If at any time the voltage on VS falls below the
under-voltage lockout (UVLO) threshold voltage,
an internal timer is started. The power supply
fail bit (PSF) in the output register is set, and all
outputs are disabled when a permanent UVLO
delay time is reached.
Operation resumes immediately when VS rises
above the UVLO threshold. The PSF bit remains
high until it is reset by the SRR bit in the input
register.
Fault Output
The MPQ6526 includes an open-drain,
active-low, fault indicator output (FAULT). A
fault is indicated if the current limit is tripped or
thermal shutdown is tripped. A fault on any
channel causes FAULT to be pulled low. The
FAULT value is maintained until the fault
condition is removed and normal operation
resumes. Do not apply more than 6V to FAULT.
shutdown
Note that bit0 to 15 = high indicates an
over-temperature shutdown.
MPQ6526 Rev. 1.01
www.MonolithicPower.com
9/10/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
16
MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
PACKAGE INFORMATION
QFN-24 (4mmx4mm)
Non-Wettable Flank
MPQ6526 Rev. 1.01
www.MonolithicPower.com
9/10/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
17
MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
PACKAGE INFORMATION (continued)
QFN-24 (5mmx5mm)
Non-Wettable Flank
MPQ6526 Rev. 1.01
www.MonolithicPower.com
9/10/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
18
MPQ6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL
PACKAGE INFORMATION (continued)
QFN-24 (5mmx5mm)
Wettable Flank
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MPQ6526 Rev. 1.01
www.MonolithicPower.com
9/10/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
19
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