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MPQ6532GVE-AEC1-P

MPQ6532GVE-AEC1-P

  • 厂商:

    MPS(美国芯源)

  • 封装:

    VFQFN28_EP

  • 描述:

    多相 电机驱动器 功率 MOSFET PWM,步进/方向 28-QFN(4x5)

  • 数据手册
  • 价格&库存
MPQ6532GVE-AEC1-P 数据手册
MPQ6532 5V to 60V, Three-Phase Brushless DC Motor Pre-Driver, AEC-Q100 Qualified DESCRIPTION FEATURES The MPQ6532 is a gate driver IC designed for three-phase brushless DC (BLDC) motor driver applications. It is capable of driving three halfbridges, consisting of six N-channel power MOSFETs, up to 60V. • • The MPQ6532 integrates a regulated charge pump to generate gate drive power, and uses a bootstrap (BST) capacitor to generate a supply voltage for the high-side MOSFET (HS-FET) driver. An internal trickle-charge circuit maintains a sufficient HS-FET driver voltage even when the output is at 100% duty cycle. Internal safety features include configurable short-circuit protection (SCP), over-current protection (OCP), adjustable dead-time (DT) control, under-voltage lockout (UVLO), and thermal shutdown. • • • • • • • • • • The MPQ6532 integrates 120° commutation using three Hall sensor inputs. The pulse-width modulation (PWM), DIR, and nBRAKE inputs control the motor speed, direction, and braking, respectively. • • The MPQ6532 is available in a QFN-28 (4mmx5mm) package with an exposed thermal pad, and is AEC-Q100 qualified. • • Wide 5V to 60V Input Voltage (VIN) Range Built-in Hall Sensor Inputs and 120° Commutation Logic Charge Pump Gate Drive Supply Bootstrap (BST) High-Side (HS) Driver with Trickle-Charge Circuit Supports 100% Duty Cycle Operation Low-Power Sleep Mode Configurable Short-Circuit Protection (SCP) Over-Current Protection (OCP) Adjustable Dead-Time (DT) Control to Prevent Shoot-Through Pulse-Width Modulation (PWM) Speed Control Input Brake Control Input Motor Start-Up Current Limit Thermal Shutdown and Under-Voltage Lockout (UVLO) Protection Fault Indication Output Thermally Enhanced Surface-Mount Package Available in a QFN-28 (4mmx5mm) Package Available in AEC-Q100 Grade 1 APPLICATIONS • • Three-Phase Brushless DC (BLDC) Motors and Permanent Magnet Synchronous Motors (PMSMs) Automotive Actuators, Pumps, and Fans All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS,” the MPS logo, and “Simple, Easy Solutions” are trademarks of Monolithic Power Systems, Inc. or its subsidiaries. MPQ6532 Rev. 1.0 MonolithicPower.com 11/4/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 1 MPQ6532 – 5V TO 60V, THREE-PHASE BLDC MOTOR PRE-DRIVER, AEC-Q100 TYPICAL APPLICATION CPA DT 0.47µF CPB RDT 10µF VIN VREG VIN nFAULT MPQ6532 CIN OC_REF BSTA nSLEEP DIR GHA PWM SHA To Phase C nBRAKE HA HB To Phase B GLA LSS HC Phase A (Repeat for B and C) GND MPQ6532 Rev. 1.0 MonolithicPower.com 11/4/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 2 MPQ6532 – 5V TO 60V, THREE-PHASE BLDC MOTOR PRE-DRIVER, AEC-Q100 ORDERING INFORMATION Part Number* MPQ6532GVE-AEC1** Package QFN-28 (4mmx5mm) Top Marking See Below MSL Rating 2 * For Tape & Reel, add suffix -Z (e.g. MPQ6532GVE-AEC1-Z). ** Wettable Flank TOP MARKING MPS: MPS prefix Y: Year code WW: Week code MP6532: Part number LLLLLL: Lot number E: Wettable lead flank PACKAGE REFERENCE nSLEEP nFAULT DIR 24 23 OC_REF 26 DT 25 GND 28 27 TOP VIEW VIN 1 22 PWM CPA 2 21 nBRAKE CPB 3 20 HA VREG 4 19 HB BSTA 5 18 HC SHA 6 17 LSS GHA 7 16 GLC GLA 8 15 GHC 11 12 13 14 GLB BSTC SHC SHB GHB 9 10 BSTB Exposed pad on backside connected to GND MPQ6532 Wettable Flank QFN-28 (4mmx5mm) MPQ6532 Rev. 1.0 MonolithicPower.com 11/4/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 3 MPQ6532 – 5V TO 60V, THREE-PHASE BLDC MOTOR PRE-DRIVER, AEC-Q100 PIN FUNCTIONS Pin # Name 1 VIN 2 CPA 3 CPB 4 VREG 5 BSTA 6 7 8 SHA GHA GLA 9 BSTB 10 11 12 SHB GHB GLB 13 BSTC 14 15 16 17 18 19 20 SHC GHC GLC LSS HC HB HA 21 nBRAKE 22 PWM 23 DIR 24 nFAULT 25 nSLEEP 26 OC_REF 27 DT 28 GND Description Input supply voltage. Bypass VIN to ground using a ceramic capacitor. Additional bulk capacitance may be required. See the Application Information section on page 15 for more details. Charge pump capacitor. Connect a ceramic capacitor between the CPA and CPB pins. See the Application Information section on page 15 for more details. Charge pump capacitor connection terminal. Gate drive supply output. Connect a ceramic capacitor to ground. See the Application Information section on page 15 for more details. Bootstrap for phase A. Connect a ceramic capacitor from this pin to SHA. See the Application Information section on page 15 for more details. High-side (HS) source connection for phase A. HS gate drive for phase A. Low-side (LS) gate drive for phase A. Bootstrap for phase B. Connect a ceramic capacitor from this pin to SHB. See the Application Information section on page 15 for more details. HS source connection for phase B. HS gate drive for phase B. LS gate drive for phase B. Bootstrap for phase C. Connect a ceramic capacitor from this pin to SHC. See the Application Information section on page 15 for more details. HS source connection for phase C. HS gate drive for phase C. LS gate drive for phase C. LS source connection. Hall-sensor input for phase C. HC has an internal pull-down resistor. Hall-sensor input for phase B. HB has an internal pull-down resistor. Hall-sensor input for phase A. HA has an internal pull-down resistor. Brake input. Pull nBRAKE active low to turn on all low-side MOSFETs (LS-FETs) and stop the motor; pull it high for normal operation. This pin has an internal pull-down resistor. External pulse-width modulation (PWM) input. Pull PWM active high to drive the phase selected by the commutation logic high; pull it low to drive the phase low. This pin has an internal pull-down resistor. Direction input. Pull this pin high or low to set the motor rotation direction. See Table 2 on page 13 for more details. Fault indication. This pin is the open-drain output. nFAULT is pulled logic low if a fault condition occurs. Sleep mode input. Pull nSLEEP logic low to enter low-power sleep mode; pull it high to enable the device. This pin has an internal pull-down resistor. Over-current protection (OCP) reference voltage input. Dead time setting. Connect a resistor to ground to set the dead time. See the Application Information section on page 15 for more details. Ground. MPQ6532 Rev. 1.0 MonolithicPower.com 11/4/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. 4 MPQ6532 – 5V TO 60V, THREE-PHASE BLDC MOTOR PRE-DRIVER, AEC-Q100 θJA θJC ABSOLUTE MAXIUM RATINGS (1) Thermal Resistance (4) Input voltage (VIN) ........................ -0.3V to +62V CPA ............................................. -0.3V to +55V CPB .......................................... -0.3V to +12.5V CPB (transient,
MPQ6532GVE-AEC1-P 价格&库存

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