MPQ8645P
16V, 30A, Scalable, Digital, Synchronous
Step-Down Converter with PMBus
DESCRIPTION
FEATURES
The MPQ8645P is a fully integrated, PMBuscompatible, high-frequency, synchronous buck
converter. The MPQ8645P offers a very
compact solution that achieves up to 30A of
output current per phase, with excellent load
and line regulation over a wide input supply
range. The MPQ8645P operates at high
efficiency over a wide output current load range.
The PMBus interface provides converter
configurations and key parameter monitoring.
The MPQ8645P adopts MPS’s proprietary
multi-phase constant-on-time (MCOT) control,
which provides fast transient response and
eases loop stabilization. The MCOT scheme
also allows multiple MPQ8645P devices to be
connected in parallel with excellent current
sharing and phase interleaving for high-current
applications.
Fully integrated protection features include
over-current protection (OCP), over-voltage
protection (OVP), under-voltage protection
(UVP), and over-temperature protection (OTP).
The MPQ8645P requires a minimal number of
readily available, standard external components,
and is available in a TQFN-25 (4mmx5mm)
package.
PMBus 1.3 Compliant
Scalable Multi-Phase Operation
3.1V to 16V with External 3.3V VCC Bias
4V to 16V with Internal Bias or External
3.3V VCC Bias
30A Continuous Output Current per Phase
Low RDS(ON) Integrated Power MOSFETs
Lossless and Accurate On-Die Current
Sensing
Adaptive COT for Ultrafast Transient
Response
Stable with Zero-ESR Output Capacitors
0.5% Reference Voltage Over 0°C to 70°C
Junction Temperature Range
Output Voltage True Remote Sense
Output Adjustable from 0.4V to 0.9 x VIN Up
to 5.5V Max
Output Voltage/Current, Input Voltage, and
Junction Temperature Reporting
Built-In MTP to Store Custom
Configurations
Programmable via PMBus
o Output Voltage
o Output Current Limit
o Selection of Pulse-Skip or Forced-CCM
Operation
o Soft-Start Time
o Selection of Switching Frequency from
400kHz, 600kHz, 800kHz, or 1000kHz
o Selection of Hiccup or Latch-Off for
OCP, OVP, and OTP
o Ramp Compensation
Available in a TQFN-25 (4mmx5mm)
Package
APPLICATIONS
Telecom and Networking Systems
Base Stations
Servers
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, visit the MPS website under Quality Assurance. “MPS”, the
MPS logo, and “Simple, Easy Solutions” are trademarks of Monolithic Power
Systems, Inc. or its subsidiaries.
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
1
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
TYPICAL APPLICATION CIRCUITS
Single-Phase Operation
CBST
R1
L1
VIN
BST
IN
CIN
MPQ8645P
CTRL
EN
VOUT
SW
COUT
VOSNS+
PGOOD
R2
CVCC
CCDRV
ALT#
RADDR
SCL
SDA
RREF
Two-Phase Operation
CBST
R1
L1
VIN
IN
CIN
BST
VOUT
SW
MPQ8645P
COUT
CTRL
EN
VOSNS+
PGOOD
CVCC
RADDR
RREF
CBST1
L2
IN
BST
SW
CIN1
MPQ8645P
CTRL
VOSNS+
CVCC1
ALT#
RADDR1
SCL
SDA
RREF1
PS#
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
2
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
ORDERING INFORMATION
Part Number*
MPQ8645PGVT- xxxx**
EVKT-8645P
Package
TQFN-25 (4mmx5mm)
Evaluation kit
Top Marking
See Below
See Below
* For Tape & Reel, add suffix –Z (e.g. MPQ8645PGVT-xxxx**–Z).
** “xxxx” is the configuration code identifier for the register settings stored in the MTP. The default number is
“0000”. Each “x” is a hexadecimal value between 0 and F. Work with an MPS FAE to create this unique number,
even if ordering the “0000” code.
TOP MARKING
MPS: MPS prefix
Y: Year code
WW: Week code
M8645P: Part number
LLLLLL: Lot number
EVALUATION KIT EVKT-8645P
EVKT-8645P contents: (Items below can be ordered separately).
Item #
1
Part Number
EVQ8645P-V-1Phase-00A
2
MPQ8645P software
3
EVKT-USBI2C-02
Item
MPQ8645P single-phase evaluation board
MPQ8645P GUI and driver for the USB
communication interface
One MPS PMBus USB communication interface,
one USB cable, and one ribbon cable
Quantity
1
1
1
Order directly from monolithicpower.com or our distributors.
Input Power Supply
Input
USB Cable
USB to I2C
Communication Interface
EVKT- USB12C-02
Ribbon Cable
Evaluation Board
Output
Load
EVKT-8645P Kit Set-Up
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
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© 2020 MPS. All Rights Reserved.
3
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
PACKAGE REFERENCE
TOP VIEW
TQFN-25 (4mmx5mm)
PIN FUNCTIONS
PIN #
Name
1, 16
IN
2, 3
SW
4, 14, 15
PGND
5
VDRV
6
7
SCL
SDA
8
ALT#
9
CTRL
10
PG
Description
Supply voltage. IN supplies power to the internal MOSFET and regulator. Use an input
capacitor to decouple the input rail. Use wide PCB traces and multiple vias to make the
connection.
Switch output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to
VIN by the high-side switch during the PWM duty cycle on time. The inductor current drives
SW negative during the off time. Use wide PCB traces to make the connection.
System ground. PGND is the reference ground of the regulated output voltage, and
requires careful consideration during PCB layout. Connect PGND with wide PCB traces.
Decoupling input pin for 3.3V driver power supply. Decouple VDRV with a minimum
1µF ceramic capacitor placed as close to VDRV as possible. X7R or X5R grade dielectric
ceramic capacitors are recommended. VDRV accepts an external 3.3V bias. If no external
3.3V bias is provided, connect VDRV to VCC through a 2Ω to 10Ω resistor.
PMBus clock.
PMBus data.
PMBus alert pin. ALT# is active low. A pull-up resistor connected to 3.3V is required if the
ALT# function is needed.
PMBus control pin. CTRL is a digital input that turns the regulator on or off with proper
ON_OFF_CONFIG (02h) configuration. Drive CTRL high to turn on the regulator. Drive
CTRL low to turn off the regulator. Do not float CTRL.
Power good output. The output of PG is an open-drain signal. PG requires a pull-up
resistor connected to a DC voltage to indicate high if the output voltage exceeds 90% of
the nominal voltage. There is a PGOOD delay from low to high. PG must be pulled high to
ensure proper operation.
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
4
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
PIN FUNCTIONS (continued)
PIN #
Name
11
PASS
12
13
17
18
19
20
21
22
23
24
25
Description
Passes RUN signals to the next phase.
Receives RUN signals from the previous phase. TAKE is used for master detection
TAKE during the initial power-up. For the master phase, TAKE must be pulled high through a
resistor. For the slave phase, TAKE is connected to the PASS of the previous phase.
PWM signal. SET turns the high-side MOSFET on when a RUN signal is present. For
SET
multi-phase operation, tie the SET pins of all phases together.
Phase shedding. With proper PMBus setting, pull PS# high to enable a slave phase. Pull
PS#
PS# low to disable a slave phase. Connect PS# of the master phase to AGND.
PMBus slave address-setting pin. Connect a resistor from ADDR to AGND to set the
ADDR
address of this device.
Current-sense output. For single-phase operation, keep ISUM floating. For multi-phase
ISUM
operation, tie the ISUM pins of all phases together for current sharing.
Reference current generator amplifier output. Connect a 60.4kΩ or 180kΩ resistor with
IREF
1% or higher accuracy to IREF.
Output voltage sense negative return. VOSNS- is tied directly to the GND sense point
VOSNSof the load. Connect VOSNS- to AGND if the remote sense is not used.
Output voltage sense positive return. Connect VOSNS+ to the output voltage sense
VOSNS+ positive side to provide feedback voltage to the system. Vias should be avoided on the VO
traces.
AGND Analog ground. Select AGND as the control-circuit reference point.
Internal 3.3V LDO output. VCC powers the analog and digital control circuits. Decouple
VCC with a 1µF ceramic capacitor placed as close to VCC as possible. X7R or X5R grade
VCC
dielectric ceramic capacitors are recommended. During MTP programming, a 5V voltage
with a 300ms period may be observed on VCC. This VCC pin does not accept external
voltage bias. For multi-phase applications, connect the VCC pins of all phases together.
Bootstrap. A capacitor connected between SW and BS is required to form a floating
BST
supply across the high-side switch driver.
ABSOLUTE MAXIMUM RATINGS (1)
Recommended Operating Conditions (4)
Supply voltage (VIN) ...................................... 18V
VIN - VSW (DC) .................................. -0.3V to 18.3V
VIN - VSW (25nc) ...................................... -5V to 25V
VSW (DC) .......................................... -0.3V to 18.3V
VSW (25ns) (2)........................................... -5V to 25V
VBST............................................................. 22.3V
VBST - VSW (25ns) (2) ............................................. 5V
VCC, VDRV ..................................................... 4.5V
VCC (1s) (3).......................................................... 6V
All other pins .................................. -0.3V to 4.3V
All other pins (1s) (3) ........................................... 6V
Junction temperature ................................ 170°C
Lead temperature...................................... 260°C
Storage temperature .................-65°C to +170°C
Supply voltage (VIN) ............................ 4V to 16V
Output voltage (VOUT) ...................... 0.6V to 5.5V
External VDRV bias ........................... 2.9V to 3.6V
Operating junction temp (TJ) .....-40°C to +125°C
Thermal Resistance (5)
θJB
θJC_TOP
TQFN-25 (4mmx5mm) ......... 1.8 ....... 6.3 ... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) Specified by design. Measured by using a differential
oscilloscope probe.
3) Voltage rating during MTP programming.
4) The device is not guaranteed to function outside of its
operating conditions.
5) θJB is the thermal resistance from the junction to the board
around the PGND soldering point. θJC_TOP is the thermal
resistance from the junction to the top of the package.
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
5
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
VIN Supply Current
Supply current (quiescent)
MOSFET
RDS(ON)
Switch leakage
Symbol
Condition
IIN
RonHS
RonLS
SWLKG_HS
SWLKG_LS
Output Current Limit
Output current limit (inductor
ILIM_VALLEY
valley)
Min output current limit
(inductor valley) programmable ILIM_VALLEY_MIN
value (6)
Max output current limit
(inductor valley) programmable ILIM_VALLEY_MAX
value
Output current limit (DC)
ILIM_DC
Min output over-current
ILIM_DC_MIN
programmable value (6)
Max output over-current
ILIM_DC_MAX
warning programmable value (6)
Output over-current warning
IWARN
(DC)
Min output over-current warning
programmable value (6)
Max output over-current
warning programmable value (6)
Low-side negative current limit
in OVP
Low-side negative current limit
in OSM (6)
Frequency and Timer
Switching frequency (6)
Minimum on time (6)
Minimum off time (6)
ILIM_NEG_OVP
Typ
Max
Units
VCTRL = 0V
2.5
4
mA
TJ = 25°C
TJ = 25°C
SW = 0V
SW = 12V
4.4
1.5
0.1
1
10
20
μA
30
33
A
D7h = 0x14
Min
27
1.5
36
46h = 0x007C (per phase)
46h = 0x00BA (per phase)
4Ah = 0x0074 (per phase)
25
tON_MIN
tOFF_MIN
40
A
44
A
30
A
3
A
45
A
28
31
A
3
A
4Ah = 0x00BA (per phase)
45
A
D5h[2] = 1b’0
D5h[2] = 1b’1
-13
-20
A
A
-10
A
ILIM_NEG_OSM
fSW
mΩ
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1] = 2b’00)
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1] = 2b’01)
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1] = 2b’10)
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1] = 2b’11)
fSW = 1000kHz, VO = 0.6V
VFB = 580mV
280
400
520
kHz
480
600
720
kHz
680
800
920
kHz
850
1000
1150
kHz
50
220
ns
ns
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
6
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
Symbol
Condition
Output Over-Voltage and Under-Voltage Protection (OVP, UVP)
Default setting (D4h[1:0] =
OVP threshold
VOVP
2b’00)
Default setting (D9h[3:2] =
UVP threshold
VUVP
2b’10)
Max programmable OVP
D4h[1:0] = 2b’11
VOVP_max
threshold
Min programmable OVP
VOVP_min
D4h[1:0] = 2b’00
threshold
OVP threshold resolution
Max programmable UVP
threshold
Min programmable UVP
threshold
OSM threshold falling
Typ
112%
115%
76%
79%
83%
VREF
127%
130%
133%
VREF
112%
115%
VREF
5%
VREF
Per LSB
Max
Units
VREF
VUVP_max
D9h[3:2] = 2b’11
81%
84%
88%
VREF
VUVP_min
D9h[3:2] = 2b’00
66%
69%
72%
VREF
UVP threshold resolution
OSM threshold rising
Min
Per LSB
VOSM_RISE
VOSM_FALL
VREF
VREF
VREF
5%
104.8%
EAh[9] = 1b’0
102.2%
CTRL
Input high voltage
VIH_CTRL
Input low voltage
VIL_CTRL
ADC
2.15
V
1.20
V
1.28
V
(6)
Input voltage range
0
ADC resolution
10
Bits
DNL
1
LSB
Sample rate
3
kHz
DAC (Feedback Voltage)
Range
Feedback accuracy
Resolution
Output voltage slew rate
Minimum output voltage slew
rate
Maximum output voltage slew
rate
VFB
21h = 0x012C, D1h[1:0] = 2b’00
Per LSB
Default setting (DAh[3:0] =
4b’0000)
DAh[3:0] = 4b’1111
DAh[3:0] = 4b’0000
512
594
600
600
2
672
606
20
30
40
20
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
50
mV
mV
mV
µs/
2mV
µs/
2mV
µs/
2mV
7
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
Maximum feedback voltage
with margin (6)
Minimum feedback voltage
with margin (6)
Feedback voltage with margin
high (6)
Feedback voltage with margin
low (6)
Symbol
Condition
Min
VFB_MG_HIGH_
Typ
Max
Units
672
mV
512
mV
VFB_MG_HIGH
672
mV
VFB_MG_LOW
512
mV
MAX
VFB_MG_LOW_
MIN
Soft Start and Turn-On Delay
Soft-start time
tSS
Min programmable soft-start
tSS_min
time (6)
Max programmable soft-start
tSS_max
time (6)
Turn-on delay
tON_DELAY
(6)
Min turn-on delay
tON_DELAY_Min
Max turn-on delay (6)
tON_DELAY_Max
Error Amplifier
Feedback current
IFB
Soft Shutdown
Soft shutdown discharge
RON_DISCH
MOSFET
Under-Voltage Lockout (UVLO)
VCC under-voltage lockout
VCCVth_Rise
threshold rising
VCC under-voltage lockout
VCCVth_Fall
threshold falling
VCC output voltage
VCC
Min input programmable turnVIN_ON_MIN
on voltage
Max input programmable turnVIN_ON_MAX
on voltage
Min input programmable turnVIN_OFF_MIN
off voltage (6)
Max input programmable turnVIN_OFF_MAX
off voltage
VDRV under-voltage lockout
VDRVVth_Rise
threshold rising
VDRV under-voltage lockout
VDRVVth_Fall
threshold falling
61h[2:0] = 3b’001
1.7
61h[2:0] = 3b’000
60h = 0x0001
60h = 0x0000
60h = 0x0100
3.0
ms
1
ms
16
ms
4.5
0
1024
5.1
ms
ms
ms
VFB = VREF
50
100
nA
TJ = 25°C
60
120
Ω
2.60
2.75
2.9
V
2.35
2.50
2.65
V
3.10
3.25
3.40
V
2.65
2.90
3.1
V
16
16.5
17
V
2.5
2.75
3
V
VCC = 3.3V
VCC = 3.3V
3.9
2.3
15.75
V
2.55
2.75
2.95
V
2.15
2.35
2.55
V
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
8
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
Symbol
Condition
Min
Typ
Max
Units
91%
94%
97%
VREF
112% 115% 118%
VREF
76%
79%
83%
VREF
1.6
2.0
2.4
ms
0.3
V
1.5
2.3
µA
600
720
Power Good (PG)
Power good high threshold
PGVth_Hi_Rise
PGVth_Lo_Rise
Power good low threshold
PGVth_Lo_Fall
Power good low-to-high delay
Power good sink current
capability
Power good leakage current
PGTd
VPG
IPG_LEAK
VOL_100
Power good low-level output
voltage
VOL_10
Thermal Protection (TP)
TP fault rising threshold (6)
TSD_Rise
TP fault falling threshold (6)
TSD_Fall
Min TP fault temp (6)
Max TP fault temp (6)
TP warning rising threshold (6)
TP warning falling threshold (6)
Min TP warning temp (6)
Max TP warning temp (6)
Monitoring Parameters
Min output voltage monitor
range (6)
Max output voltage monitor
range (6)
Output voltage monitor
accuracy (6)
Output voltage monitor
accuracy (6)
Output voltage bit resolution
Output current monitor
accuracy
Output current monitor
accuracy (6)
FB from low to high, default
setting (D9h[1:0] = 2b’01)
FB from low to high, default
setting (D4h[1:0] = 2b’00)
FB from high to low, default
setting (D9h[3:2] = 2’b10)
Default setting (D1h[5:2] =
4b’0000)
IPG = 10mA
VPG = 3V
VIN = 0V, pull PGOOD up to 3.3V
through a 100kΩ resistor,
TJ = 25°C
VIN = 0V, pull PGOOD up to 3.3V
through a 10kΩ resistor,
TJ = 25°C
mV
700
820
Default setting (4Fh = 0x0091)
Default setting (4Fh = 0x007D
and D6h[2:1] = 2b’00)
145
°C
125
°C
TSD_WARN_MIN
TSD_WARN_MAX
TWARN_Rise Default setting (4Ah = 0x0078)
Default setting (4Ah = 0x0078,
TWARN_Fall
D6h[2:1] = 2b’00)
TSD_WARN_MIN
TSD_WARN_MAX
35
165
120
°C
°C
°C
100
°C
35
160
°C
°C
MVOUT_RANGE
0
V
MVOUT_RANGE
5.5
V
MVOUT_ACC
VO = 0.6V to 2.5V
-2%
0.6
2%
V
MVOUT_ACC
VO = 2.5V to 5.5V
50
50
mV
MIOUT_ACC
VO = 1.2V, fSW = 800kHz,
IO = 30A
-2.5
2.5
A
MIOUT_ACC
3A ≤ IO ≤30A
-2.5
2.5
A
1.25
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
mV
9
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
Parameters
Output current bit resolution (6)
Min input voltage monitor (6)
Max input voltage monitor (6)
Input voltage monitor accuracy
Input voltage bit resolution (7)
Symbol
Condition
MIN_RANGE
MIN_RANGE
MIN_ACC
PMBus DC Characteristics (SDA, SCL, ALT#, CTRL) (6)
Input high voltage
VIH
Input low voltage
VIL
Output low voltage
VOL
IOL = 1mA
Input leakage current
ILEAK
SDA, SCL, ALT# = 3.3V
Transient voltage including
Maximum voltage (SDA, SCL,
VMAX
ringing
ALT#, CTRL)
Pin capacitance on SDA,SCL
CPIN
PMBus Timing Characteristics (7)
Min operating frequency
Max operating frequency
Bus free time
Between stop and start condition
Holding time
Repeated start condition setup time
Stop condition set-up time
Data hold time
Data set-up time
Clock low time-out
Clock low period
Clock high period
Clock/data fall time
Clock/data rise time
Min
-2%
Typ
62.5
2.5
18
12
25
Max
2%
2.1
0.4
10
V
V
V
µA
3.6
V
10
pF
0.8
-10
-0.3
3.3
Units
mA
V
V
V
mV
10
1000
4.7
4.0
kHz
kHz
µs
µs
4.7
µs
4.0
300
250
25
4.7
4.0
µs
ns
ns
ms
µs
µs
ns
ns
35
50
300
1000
Notes:
6) Guaranteed by design.
7) Guaranteed by design, not tested in production. The parameter is tested during parameter characterization.
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
10
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS
Load Regulation
fSW vs. IOUT
VIN = 12V, CCM
1.215
1000
1.213
900
1.211
800
1.209
700
1.207
600
fSW (KHz)
VO (V)
VIN = 12V, CCM, fSW = 1000kHz
1.205
1.203
400
1.201
300
1.199
200
Pulse Skip
CCM
1.197
0
5
10
IO (A)
15
1000KHz
800KHz
600KHz
400KHz
100
1.195
0
20
0
10
20
30
IO (A)
Thermal Derating
Efficiency
VIN = 12V, fSW = 1000kHz, TJ = 125°C,
no air flow
VIN = 12V, fSW = 1000kHz, L = 0.44μH/0.18mΩ
100
35
95
30
20
15
10
Vo=1.2V
Vo=2.5V
Vo=5V
5
EFFICIENCY (%)
90
25
LOAD (A)
500
85
80
75
70
65
5V
2.5V
1.2V
60
55
50
0
5
55
105
AMBIENT TEMP (℃)
0
10
20
30
IO (A)
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
IOUT = 0A, CCM, 1000kHz, SinglePhase
IOUT = 30A, CCM, 1000kHz, SinglePhase
CH1: VSW
5V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
10mV/div.
CH2:
VOUT/AC
10mV/div.
1μs/div.
1μs/div.
IOUT = 0A, DCM, 1000kHz, SinglePhase
IOUT = 30A, DCM, 1000kHz, SinglePhase
CH1: VSW
5V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
10mV/div.
CH2:
VOUT/AC
10mV/div.
4ms/div.
1μs/div.
Power-On through CTRL, CCM,
IOUT = 30A, Single-Phase
Power-On through CTRL, CCM,
IOUT = 0A, Single-Phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
1ms/div.
1ms/div.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Power-On through CTRL, DCM,
IOUT = 0A, Single-Phase
Power-On through CTRL, DCM,
IOUT = 30A, Single-Phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4: VPGOOD
5V/div.
CH4:
VPGOOD
5V/div.
1ms/div.
1ms/div.
Power-Off through CTRL, CCM,
IOUT = 30A, Single-Phase
Power-Off through CTRL, CCM,
IOUT = 0A, Single-Phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
20ms/div.
20ms/div.
Power-Off through CTRL, DCM,
IOUT = 30A, Single-Phase
Power-Off through CTRL, DCM,
IOUT = 0A, Single-Phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
20ms/div.
20ms/div.
MPQ8645P Rev. 1.2
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13
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Pre-Bias Start-Up, DCM, SinglePhase
Pre-Bias Start-Up, CCM, SinglePhase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
1ms/div.
1ms/div.
Load Transient, IOUT = 0A to 10A,
CCM, 1000kHz
Load Transient, IOUT = 0A to 10A,
DCM, 1000kHz
CH3: VOUT
200mV/div.
CH3: VOUT
200mV/div.
CH4: VOUT
50mV/div.
CH4: VOUT
50mV/div.
20μs/div.
20μs/div.
OCP, Latch-Off Option, CCM,
Single-Phase
CH1: VSW
10V/div.
OCP, Hiccup Option, CCM, SinglePhase
CH1: VSW
10V/div.
CH2: VPGOOD
2V/div.
CH2:
VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
40ms/div.
40ms/div.
MPQ8645P Rev. 1.2
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14
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
OCP, Hiccup Option, DCM, SinglePhase
OCP, Latch-Off Option, DCM,
Single-Phase
CH1: VSW
10V/div.
CH1: VSW
10V/div.
CH2: VPGOOD
2V/div.
CH2:
VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
40ms/div.
40ms/div.
OVP, Hiccup Option, DCM,
Single-Phase
OVP, Hiccup Option, CCM, SinglePhase
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CH2: VPGOOD
2V/div.
CH2:
VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
400μs/div.
400μs/div.
OVP, Latch-Off Option, CCM,
Single-Phase
OVP, Latch-Off Option, DCM,
Single-Phase
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CH2:
VPGOOD
2V/div.
CH2: VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
400μs/div.
400μs/div.
MPQ8645P Rev. 1.2
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15
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
FUNCTIONAL BLOCK DIAGRAM
IREF
RAMP
VOSNS+
VCC
REFERENCES
BIAS CURENT
GENERATOR
FB
GAIN
VIN
VDRV
LDO
BST
20MHz
FB
+
+Gm1
+
VOSNS-
FB+RAMP
VTEMP
SET
VCOMP
Comp1
+
S
Q
R
xQ
MN1
TEMP
SENSE
PWM
SW
DRIVERS
COMP- OUT
MN2
CC1
SOFT
START
ZCD
REF
VIN
SW
DAC
PGND
R
O
IS1
ISEN
ISUM
IS2
TON Generator
LS Current Sense
SET
MASTER
DETECTION
TAKE
MS
CC2
Valley Current Limit
TAKEPASS
LOGIC
RUN
ILIM
Out
+
Gm2
Blank
In
I
O
OneShot 2
PASS
2MEG
HiZ
SDA
SCL
PMBus
ALT#
SYSTEM
CONFIGURE
REGISTERS
Slave Fault
VTEMP
ADC
MUX
ADC
Slave
Fault
Detect
ISUM
ISEN
FB
ADDR
SS_RDY
VI N
CONTROL LOGIC
FB
REF
MTP
CTRL
PS#
FB
MONITOR
PG
MN3
AGND
Figure 1: Functional Block Diagram
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
MULTI-PHASE OPERATION
R4
CBST
VIN
IN
CTRL
CTRL
BST
MPQ8645P
VOUT
L1
SW
CFF
VOSNS+
RFB2
RFB1
CLC
COUT
CVCC
MASTER
ALT#
SCL
SDA
RREF
CBST1
IN
CTRL
BST
RADDR
L2
SW
CFF_S
VOSNS+
MPQ8645P
RFB1_S
RFB2_S
CVCC1
SLAVE1
RREF1
CBSTn
IN
CTRL
BST
MPQ8645P
RADDR1
Ln
SW
VOSNS+
CVCCn
SLAVEn
RREFn
RADDRn
Figure 2: Multi-Phase (n+1) Configuration
MPQ8645P Rev. 1.2
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17
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
MULTI-PHASE OPERATION (continued)
VFB+RAMP
VCOMP
COMP-OUT
SET
RUN1
PWM1
PASS1/TAKE2
RUN2
PWM2
PASS2/TAKE3
RUN3
PWM3
PASS3/TAKE4
RUN4
PWM4
PASS4/TAKE1
t0 t1
t2
t3 t4
t5
t6 t7
t8
t9 t10
t11
t12
t13
t14
Figure 3: Multi-Phase Interleaved Operation (Steady State)
VFB+RAMP
VCOMP
COMP_OUT
SET
RUN1
PWM1
PASS1/TAKE2
RUN2
PWM2
PASS2/TAKE3
RUN3
PWM3
PASS3/TAKE4
RUN4
PWM4
PASS4/TAKE1
t0
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
Figure 4: Multi-Phase Interleaved Operation (Load Step-Up Response)
MPQ8645P Rev. 1.2
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18
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
OPERATION
MCOT OPERATION
The MPQ8645P is a fully integrated,
synchronous,
step-down,
switch-mode
converter that uses multi-phase constant-ontime (COT) control to provide a fast transient
response. The selectable internal ramp
compensation stabilizes the system and makes
it easy to use.
Master/Slave Auto-Detection
One master phase is needed for both singleand multiple-phase operation. To be configured
as a master phase, the TAKE pin of the phase
must be pulled high to a voltage source. The
PASS/TAKE pins of all phases are connected in
a daisy chain configuration. The PASS pin of
the last phase is connected back to the TAKE
pin of the first (master) phase. For single-phase
operation, the PASS and TAKE pins are
connected together. After power-up, the master
phase is determined, and the rest of phases are
slave phases.
MCOT Operation (Master)
The master phase has the following functions:
Accepts both write and read commands
through the PMBus from the system.
Generates the SET signals.
Manages start-up, shutdown, and all
protections.
Monitors fault alerts from the slave phases
through the PG pin.
Starts the first on pulse.
Starts the on pulse when receiving RUN
and SET signals.
Determines the on pulse width of its own
phase based on the per-phase and total
current.
Carries on the PASS/TAKE signal.
MCOT Operation (Slave)
The slave phase has the following functions:
Accepts write commands through the
PMBus from the system.
Takes the SET signal from the master.
Sends an OV/UV/OT alert to the master
through PG.
Starts the on pulse when receiving RUN
and SET signals.
Determines the on pulse width of its own
phase based on the per-phase and total
current.
Carries on the PASS/TAKE signal.
Figure 3 shows the details of MCOT operation.
At t0, VFB + RAMP drops below the reference
level (VCOMP) in the master phase and
generates a SET signal. All phases receive this
SET signal, but only the phase that has the
active RUN signal takes action (the master, in
this case). Therefore, the master turns on the
high-side MOSFET (HS-FET). Meanwhile, a
fixed on pulse is generated on PASS, and this
signal is passed to the TAKE pin of Slave 1.
At t1, the falling edge of the TAKE pin of Slave
1 activates the RUN signal. From this point on,
Slave 1 is waiting for the SET signal to turn on
the HS-FET.
At t2, the on pulse of the master phase expires,
and the HS-FET turns off. The on-pulse width is
fixed with the given input voltage, output
voltage, and selected switching frequency. The
on pulse width is fine-tuned based on the perphase and total currents.
At t3, VFB + RAMP drops below VCOMP in the
master phase again. Only Slave 1 has an active
RUN signal, so it turns on its HS-FET. All other
phases ignore this SET signal. Meanwhile,
Slave 1 generates a fixed on pulse on PASS,
and this on pulse is passed to the TAKE pin of
Slave 2.
The above operation continues, and the phase
turns on its HS-FETs one by one for a fixed on
time. The operation is carried on through the
PASS/TAKE loop, and only the phase that has
the RUN signal turns on the HS-FET when the
SET signal is ready.
The MPQ8645P utilizes constant-on-time (COT)
control, which provides super-fast load transient
response. When a load step-up occurs, the FB
signal is lower than REF, so the SET signal is
generated more frequently than during steady
state to respond to the load transient. This
depends on the load transient step size and
slew rate. The SET signal can be
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
generated with the minimum 50ns interval (i.e.
the next phase can be turned on in as little as
50ns after the turn-on of the previous phase to
provide super-fast load transient response).
Figure 4 shows the detailed operation.
Ramp Compensation
The MPQ8645P provides internal ramp
compensation to support all types of output
capacitors. Only the master phase utilizes ramp
compensation. Whenever a SET signal is
generated, the ramp is increased with a certain
amount of amplitude in a fixed period. The ramp
is then discharged with an adaptive slew rate.
This ramp signal is superimposed to the FB
signal, so when the superimposed ramp + FB
signal reaches the REF signal, a new SET
signal is generated. The ramp is selectable
through the PMBus command of D0h[3:1] to
support
a
wide
range
of
operation
configurations. The larger the ramp is, the less
jitter the system will have. However, a larger
ramp also results in slower load transient
response. It is recommended to choose an
optimal ramp based on your particular design if
load transient response is a critical design
target.
In single-phase operation, the ramp does not
need to be reset by the SET signal, and can be
reset by pulse-width modulation (PWM) instead.
This option can be selected through the PMBus
command EAh[3]. When EAh[3] = 0, the ramp
is reset by PWM. This is only for single-phase
operation. When EAh[3] = 1b’1, the ramp is
reset by the SET signal. This is optimal for both
single-phase and multi-phase operations.
Mode Selection
The MPQ8645P provides both forced
continuous conduction mode (CCM) operation
and pulse-skip operation under light-load
condition. The operation mode can be chosen
through the PMBus command D2h[0]. When
D2h[0] = 1b’1, the device operates in CCM.
When D2h[0] = 0, the device operates in pulseskip operation.
Phase-Shedding Operation (Slave)
For multi-phase operation, slave phases can be
enabled or disabled through the PMBus or PS#
pin. The phase-shedding function is disabled in
the master phase to ensure proper operation.
If phase shedding is controlled through the
PMBus, the E5h[0] command is used. When
E5h[0] = 1b’0, slave phases are enabled. When
E5h[0] = 1b’1, slave phases are disabled.
If phase shedding is controlled through the PS#
pin, the E5h[1] command must be set to 1b’1. In
this way, the slave phases are enabled when
PS# is pulled high. Slave phases are disabled
when PS# is pulled low.
Soft Start (SS)
The soft-start (SS) time can be programmed
through the PMBus command TON_RISE (61h).
The minimum SS time is 1ms when 61h =
0x0000. Selectable SS time options include
1ms, 2ms, 4ms, 8ms, and 16ms.
Pre-Bias Start-Up
The MPQ8645P is designed for monotonic
start-up into pre-biased loads. If the output
voltage is pre-biased to a certain voltage during
start-up, the IC disables switching for both the
high-side and low-side switches until the
internal reference voltage exceeds the sensed
output voltage at the FB pin. Before the
reference voltage reaches the pre-biased FB
level, if the BST voltage is lower than the 2.4V
threshold, the low-side MOSFET (LS-FET) is
forced on for about 200ns to charge up the BST
voltage.
Output Voltage Discharge
When the MPQ8645P is disabled through
CTRL or the PMBus OPERATION command,
output voltage discharge mode is enabled if this
function is selected. Both the HS-FET and the
LS-FET are latched off. A discharge MOSFET
connected between SW and GND turns on to
discharge the output voltage. The typical switch
on resistance of this MOSFET is about 50Ω.
Once the FB voltage drops below 10% * REF,
the discharge MOSFET turns off. This feature
can be enabled or disabled through PMBus
command MFR_CTRL_01 (D1h[6]).
Current Sense and Over-Current Protection
(OCP)
The MPQ8645P features on-die current sensing
and a programmable, positive, current-limit
threshold. The MPQ8645P provides both
inductor valley current limiting (set by the
PMBus command D7h) and output DC limiting
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
(set by the PMBus command 46h).
Inductor Valley Over-Current Protection
(D7h)
During the LS-FET on state, the SW current
(inductor current) is sensed and monitored
cycle by cycle. When FB drops below the
reference, the HS-FET is only allowed to turn
on whenever no over-current (OC) condition is
detected during the LS-FET on state. Therefore,
the inductor current is limited cycle by cycle. If
31 consecutive cycles of an OC condition are
detected, over-current protection (OCP) is
triggered.
During an OC or output short-circuit condition, if
the output voltage drops below the undervoltage protection (UVP) threshold, the device
enters OCP immediately.
Once OCP is triggered, the device either enters
hiccup mode or latches off, depending on the
PMBus selection. If it latches off, VCC or VIN
must be power recycled to enable the part
again.
The inductor valley over-current limit can be
programmed through the PMBus command
D7h. D7h only sets the per-phase inductor
valley current limit, regardless of whether the
device is operating in single-phase or multiphase operation.
Output Over-Current (DC) Protection (46h)
The output DC current is sensed and monitored
during operation. During an OC condition, if the
sensed output DC current exceeds the 46h
setting, the device enters OCP immediately.
Once OCP is triggered, the device enters
hiccup mode or latches off, depending on the
PMBus selection. If it latches off, VCC or VIN
must be power recycled to enable the part
again. The output over-current DC limit can be
programmed through the PMBus command 46h,
which limits the total output current of the rail.
Negative Inductor Current Limit
When the LS-FET detects a negative current
lower than the limit set through the PMBus
D5h[2] command, the part turns off the LS-FET
for a certain period of time to limit the negative
current. This period is set through the PMBus
command D5h[3].
Under-Voltage Protection (UVP)
The MPQ8645P monitors the output voltage
using the FB pin connected to the tap of a
resistor divider to detect an under-voltage
condition. If the FB voltage drops below the
under-voltage protection (UVP) threshold (set
through the PMBus VOUT_UV_FAULT_ LIMIT
command), UVP is triggered. After UVP is
triggered, the device either enters hiccup mode
or latches off, depending on the PMBus
selection. If it latches off, VCC or CTRL must be
power recycled to enable the part again.
Over-Voltage Protection (OVP)
The MPQ8645P monitors the output voltage
using the FB pin connected to the tap of a
resistor divider to detect an over-voltage
condition. See the MFR_OVP_NOCP_SET
section on page 46 for detailed OVP responses.
Output Sinking Mode (OSM)
The MPQ8645P employs an output-sinking
mode (OSM) to regulate the output voltage to
the targeted value. When the FB voltage is
above 105% * REF but below the OVP
threshold, OSM is triggered. During OSM, the
MPQ8645P runs in forced CCM. The device
exits OSM when the HS-FET turns back on.
OSM can be enabled and disabled through the
PMBus command EAh bit[9].
Over-Temperature Protection (OTP)
The
MPQ8645P
has
over-temperature
protection (OTP). The IC monitors the junction
temperature
internally.
If
the
junction
temperature exceeds the threshold value (set
through
the
PMBus
command
OT_FAULT_LIMIT), the converter shuts off.
After OTP is triggered, the device either enters
hiccup mode or latches off, depending on the
PMBus command MFR_OVP_NOCP_SET. If it
latches off, VCC or CTRL must be power
recycled to enable the part again.
Output Voltage Setting
The internal DAC reference range of the
MPQ8645P is 162mV to 672mV. To achieve a
higher output voltage, an external or internal
voltage
divider
can
be
selected.
VOUT_SCALE_LOOP
(29h)
and
MFR_CTRL_VOUT
(D1h[1:0])
are
used
together to set different output voltages. Table 1
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
shows the relationship of VOUT_SCALE_LOOP
(29h) and MFR_CTRL_VOUT (D1h[1:0]).
Table 1: VOUT_SCALE_LOOP vs
MFR_CTRL_VOUT
FB
Divider
VOUT_SCALE_
LOOP (29h)
MFR_CTRL_VOUT
(D1h[1:0])
External
29h = RFB2 /
(RFB1 + RFB2)
D1h[1:0] = 2’b00
29h = 0x03E8
D1h[1:0] = 2’b00
29h = 0x01F4
D1h[1:0] = 2’b01
29h = 0x00FA
D1h[1:0] = 2’b10
29h = 0x007D
D1h[1:0] = 2’b11
Internal
It
is
not
recommended
to
change
VOUT_SCALE_LOOP (29h) and MFR_CTRL_
VOUT (D1h[1:0]) when the power stage is
enabled.
External Voltage Divider
If an external voltage divider is used to set the
output voltage, the MFR_CTRL_VOUT (D1h)
can only be set to D1[0:0] = 2’b00. Figure 5
shows the configuration of an external voltage
divider used. VOSNS+ and VOSNS- are
connected to the output voltage sense point
through a resistor divider (RFB1 and RFB2).
1. Determine the Vo_set source based on the
OPERATION (01h) command. Assume that
VOUT_COMMAND (21h) is selected.
2. Set D1[1:0] to 2’b00 for the external voltage
divider option.
3. Select RFB1 and RFB2 to have a 600mV FB
voltage. In this case, RFB2 / (RFB1 + RFB2) =
0.24.
4. Set the VOUT_SCALE_LOOP (29h) to
0x00F0 to match the external voltage
divider ratio (0.24).
5. Set the VOUT_COMMAND (21h) to 0x04E2
(LSB = 2mV). VOUT_COMMAND = 600mV
/ VOUT_SCALE_LOOP.
6. VOUT_COMMAND (21h) must be sent after
VOUT_SCALE_LOOP (29h) and D1h.
Otherwise, the change of VOUT_SCALE_
LOOP (29h) and D1h will not be effective.
Internal Voltage Divider
Figure 6 shows the configuration of the internal
voltage divider. VOSNS+ and VOSNS- are
connected directly to the output voltage sense
point.
OPERATION
Command
VOUT_MARGIN_HIGH
OPERATION
Command
VOUT_COMMAND
VOUT_COMMAND
MUX
Vo_set
V OUT_S CA LE_LOOP
DAC_reference
EAMP
VOUT_MARGIN_LOW
To PWM
FB
VOUT_MARGIN_HIGH
MUX
Vo_set
V OUT_S CA LE_LOOP
DAC_reference
EAMP
VOUT_MARGIN_LOW
To PWM
VOSNS+
FB
D1h=00
200kΩ
VOSNS+
D1h=00
200kΩ
D1h=01
VO
D1h=01
RFB1
RFB2
D1h=10
COUT
D1h=10
50kΩ
COUT
100kΩ
VO
100kΩ
D1h=11
50kΩ
50kΩ
D1h=11
VOSNS-
50kΩ
VOSNS-
Figure 5: Output Voltage Set by External
Resistor Divider
The MPQ8645P provides output voltage
monitoring through register READ_VOUT (8Bh).
To achieve the correct output voltage setting
and
monitoring,
the
registers
VOUT_COMMAND (21h), VOUT_MARGIN_
HIGH (25h), VOUT_MARGIN_LOW (26h), and
VOUT_SCALE_LOOP (29h) should be set
correspondingly. The steps below show how to
set the output voltage to 2.5V:
Figure 6: Output Voltage Set by Internal
Resistors Divider
Table 2 shows the internal voltage divider
options through MFR_CTRL_VOUT (D1h).
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
Table 2: Output Voltage Range with Internal
Voltage Divider
MFR_CTRL_VOUT (D1h)
Bits
Description
2’b00: VREF / VO = 1, VO = 0.4V to 0.672V
2’b01: VREF / VO = 0.5,
VO = 0.4V to 1.344V
[1:0]
2’b10: VREF / VO = 0.25,
VO = 0.7V to 2.688V
2’b11: VREF / VO = 0.125,
VO = 1.3V to 5.376V
The MPQ8645P provides output voltage
monitoring through the register READ_VOUT
(8Bh). To achieve the correct output voltage
setting
and
monitoring,
the
registers
VOUT_COMMAND (21h), VOUT_MARGIN_
HIGH (25h), VOUT_MARGIN_LOW (26h), and
VOUT_SCALE_LOOP (29h) should be set
correspondingly. The steps below show how to
set the output voltage to 2.5V.
1. Determine the Vo_set source based on the
OPERATION (01h) command. Assume that
VOUT_COMMAND (21h) is selected.
2. Choose the D1[1:0] value based on the
Vo_set value. The D1[1:0] value is chosen
so that the FB voltage is as close to 600mV
as possible. In this case, both D1[1:0] =
2’b10 and D1[1:0] = 2’b11 can provide Vo =
2.5V, but D1[1:0] = 2’b10 yields a 625mV
FB voltage, while D1[1:0] = 2’b11 yields a
312.5mV FB voltage. Choose D1[1:0] =
2’b10.
Power Good (PGOOD)
The MPQ8645P has a power good (PGOOD)
output. PGOOD is the open drain of a MOSFET.
Connect PGOOD to VDRV or another external
voltage source less than 3.6V through a pull-up
resistor (typically 100kΩ). After applying the
input voltage, the MOSFET turns on so that
PGOOD is pulled to GND before the soft start is
ready. After the FB voltage reaches the
threshold set by the PMBus command
POWER_GOOD_ON and a delay set by the
PMBus, PGOOD is pulled high. The delay can
be chosen through the PMBus command
MFR_CTRL_VOUT (D1h) [5:2].
When the converter encounters any fault (e.g.
UV, OV, OT, UVLO, etc.), PGOOD is latched
low. It cannot be pulled high again until a new
soft start is initialized.
When the MPQ8645P is configured as the
master in single- or multi-phase operation, the
PG pin is used for fault indication. Therefore,
PG must be pulled high to ensure proper
operation. Otherwise, the MPQ8645P may
enter protection response mode.
This slave fault detection feature can be
enabled or disabled through the PMBus bit
D0h[0].
If the input supply fails to power the MPQ8645P,
PGOOD is clamped low even though it is tied to
an external DC source through a pull-up
resistor. Figure 7 shows the relationship
between the PGOOD voltage and the pull-up
current.
2
4. Set the VOUT_COMMAND (21h) to 0x4E2
(LSB = 2mV).
5. VOUT_COMMAND (21h) must be sent after
VOUT_SCALE_LOOP (29h) and D1h.
Otherwise, the change of VOUT_SCALE_
LOOP (29h) and D1h will not be effective.
1.8
1.6
1.4
1.2
I_PG (mA)
3. Set the VOUT_SCALE_LOOP (29h) to
0x00FA to match D1[1:0] = 2’b10.
1
0.8
0.6
0.4
0.2
0
0.6
0.65
0.7
0.75V_PG (V)
0.8
0.85
0.9
6. The VOUT_COMMAND (21h) cannot
exceed the minimum/maximum value
specified in Table 2.
Figure 7: PGOOD Clamped Voltage vs. Pull-Up
Current
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
APPLICATION INFORMATION
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
AC current to the converter while maintaining
the DC input voltage. Use ceramic capacitors
for the best performance. During the layout,
place the input capacitors as close to IN as
possible.
The capacitance can vary significantly with
temperature. Capacitors with X5R and X7R
ceramic dielectrics are recommended because
they are fairly stable over a wide temperature
range.
The capacitors must have a ripple current rating
that exceeds the converter’s maximum input
ripple current. Estimate the input ripple current
with Equation (1):
VOUT
V
(1 OUT )
VIN
VIN
ICIN IOUT
(1)
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (2):
ICIN
I
OUT
2
(2)
For simplification, choose an input capacitor
with an RMS current rating that exceeds half
the maximum load current.
The input capacitance value determines the
converter input voltage ripple. Select a
capacitor value that can meet any input voltage
ripple requirements.
Estimate the input voltage ripple with Equation
(3):
VIN
IOUT
V
V
OUT (1 OUT )
f SW C IN
VIN
VIN
(3)
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (4):
VIN
IOUT
1
4 f SW C IN
(4)
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. The output voltage ripple can be
estimated with Equation (5):
VOUT
VOUT
V
1
(1 OUT ) (RESR
) (5)
fSW L
VIN
8 fSW COUT
When
using
ceramic
capacitors,
the
capacitance dominates the impedance at the
switching frequency. Therefore, the output
voltage ripple is dominated by the output
capacitances. For simplification, estimate the
output voltage ripple with Equation (6):
VOUT
VOUT
2
8 f SW L C OUT
(1
VOUT
)
VIN
(6)
When using capacitors with a larger ESR (e.g.
POSCAP, OSCON, etc.), the ESR dominates
the impedance at the switching frequency.
Therefore, the output voltage ripple can be
determined by the ESR. For simplification,
estimate the output ripple with Equation (7):
VOUT
VOUT
V
(1 OUT ) R ESR
f SW L
VIN
(7)
Selecting the Inductor
The inductor supplies constant current to the
output load while being driven by the switching
input voltage. A larger-value inductor results in
less ripple current and a lower output ripple
voltage, but also has a larger physical size,
higher series resistance, and lower saturation
current. Select an inductor value that sets the
inductor peak-to-peak ripple current between
30% and 40% of the maximum switch current
limit. Be sure to also design for a peak inductor
current that is below the maximum switch
current limit. Calculate the inductance value
with Equation (8):
VOUT
V
(8)
L
(1 OUT )
f SW IL
VIN
Where ∆IL is the peak-to-peak inductor ripple
current.
Choose an inductor that will not saturate under
the maximum inductor peak current. The peak
inductor current can be calculated with
Equation (9):
ILP IOUT
VOUT
V
(1 OUT )
2 f SW L
VIN
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(9)
24
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
PCB Layout Guidelines
Efficient PCB layout is critical for stable
operation. For best performance, refer to Figure
8 and follow the guidelines below:
6. Place a VCC decoupling capacitor close to
the device.
1. Place the input MLCC capacitors as close
to the IN and PGND pins as possible.
8. Place the BST capacitor as close to BST
and SW as possible.
2. Place one 1μF to 4.7μF 0402 MLCC near
pin1.
9. Use a trace width of 20 mils or higher to
route the path (a 0.1μF to 1µF bootstrap
capacitor is recommended).
3. Place the major MLCC capacitors on the
same layer as the MPQ8645P.
4. Maximize the VIN and PGND copper plane
to minimize parasitic impedance.
5. Place as many PGND vias as possible as
close to the pin as possible to minimize
parasitic impedance and thermal resistance.
7. Connect AGND and PGND at the point of
the VCC capacitor’s ground connection.
10. Place a REF capacitor close to TRK/REF to
RGND.
11. Place one 10pF to 100pF MLCC between
the two remote sense lines.
RLC
RFB1
CFF
CBST
CIN3
CIN1
CIN2
Crv1
Rrv1
Figure 8: Example of PCB Layout (Placement and Top Layer PCB)
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
PMBUS INTERFACE
Table 3: PMBus Address vs. ADDR Resistor
PMBus Serial Interface Description
The power management bus (PMBus) is an
open-standard power management protocol
that defines a means of communication with
power conversion and other devices.
RADDR
(kΩ)
4.99
15
24.9
34.8
45.3
54.9
64.9
75
84.5
95.3
105
115
124
133
147
154
The PMBus is a two-wire, bidirectional serial
interface, consisting of a data line (SDA) and a
clock line (SCL). The lines are pulled to a bus
voltage externally when they are idle. When
connecting to the lines, a master device
generates an SCL signal and device address,
and arranges the communication sequence.
This is based on I2C operation principles. The
MPQ8645P is a PMBus slave that supports
both standard mode (100kHz) and fast mode
(400kHz and 1000kHz). The PMBus interface
adds flexibility to the power supply solution.
Slave Address
To support multiple MPQ8645P devices used
on the same PMBus, use the ADDR pin to
program the slave address for each MPQ8645P
device. There is 10µA of current flowing out of
ADDR. Connect a resistor between ADDR and
AGND to set the ADDR voltage. The internal
ADC converts the pin voltage to set the PMBus
address. A maximum of 32 addresses can be
set via ADDR pin. Table 3 shows the PMBus
address for different resistor values from ADDR
to
AGND.
Pre-set
the
register
MFR_ADDR_PMBUS (D3h) to set the PMBus
address.
For multi-phase configurations, the slave
phases can share the same address as the
masters or have different addresses, depending
on the application needs. The slave phases can
only accept write commands, and cannot
accept read commands from the PMBus master.
The master phase can accept both write and
read commands from the PMBus master.
Start and Stop Conditions
The start and stop conditions are signaled by
the master device, which signifies the beginning
and end of the PMBus transfer. The start
condition is defined as the SDA signal
transitioning from high to low while the SCL is
high. The stop condition is defined as the SDA
signal transitioning from low to high while the
SCL is high (see Figure 9).
Slave Address
(R_IREF=60.4kΩ)
30h
31h
32h
33h
34h
35h
36h
37h
38h
39h
3Ah
3Bh
3Ch
3Dh
3Eh
3Fh
Slave Address
(R_IREF=180kΩ)
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
4Ah
4Bh
4Ch
4Dh
4Eh
4Fh
The master then generates the SCL clocks and
transmits the device address and the read/write
direction bit (R/W) on the SDA line. Data is
transferred in 8-bit bytes by the SDA line. Each
byte of data is followed by an acknowledge bit
(ACK).
PMBus Update Sequence
The MPQ8645P requires a start condition, a
valid PMBus address, a register address byte,
and a data byte for a single data update. The
device acknowledges receipt of each byte by
pulling the SDA line low during the high period
of a single clock pulse. A valid PMBus address
selects the MPQ8645P. The device performs
an update on the falling edge of the LSB byte.
Protocol Usage
All PMBus transactions on the MPQ8645P are
done using defined bus protocols. The following
protocols are implemented:
• End byte with PEC
• Receive byte with PEC
•
•
•
•
•
Write byte with PEC
Read byte with PEC
Write word with PEC
Read word with PEC
Block read with PEC
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
PMBus Bus Message Format
In the tables in Figure 10, unshaded cells
indicate that the bus host is driving the bus
actively, and shaded cells indicate that the
MPQ8645P is driving the bus.
S = Start condition
Sr = Repeated start condition
P = Stop condition
R = Read bit
W = Write bit
A = Acknowledge bit (0)
A = Acknowledge bit (1)
“A” represents the acknowledge bit. The ACK
bit is typically active low (logic 0) if the
transmitted byte is received successfully by a
device.
However, when the receiving device is the bus
master, the acknowledge bit for the last byte
read is a logic 1, indicated by A (see Figure 9).
Packet Error Checking (PEC)
The MPQ8645P PMBus interface supports the
use of the packet error-checking (PEC) byte.
The PEC byte is transmitted by the MPQ8645P
during a read transaction or sent by the bus
host during a write transaction.
The PEC byte is used by the bus host or the
MPQ8645P to detect errors during a bus
transaction (depending on whether the
transaction is a read or a write). If the host
determines that the PEC byte read during a
read transaction is incorrect, it can decide to
repeat the read if necessary. If the MPQ8645P
determines that the PEC byte sent during a
write transaction is incorrect, it ignores the
command (does not execute it) and sets a
status flag. Within a group command, the host
can choose to send or not send a PEC byte as
part of the message to the MPQ8645P.
PMBus Alert Response Address (ARA)
The PMBus alert response address (ARA) is a
special address that can be used by the bus
host to locate any devices that need to talk to it.
A host typically uses a hardware interrupt pin to
monitor the PMBus ALERT pins of a number of
devices. When a host interruption occurs, the
host issues a message on the bus using the
PMBus receive byte, or the receive byte with
PEC protocol.
The special address used by the host is 0x0C.
Any devices that have a PMBus use the ALERT
signal to return their own 7-bit address as the
seven MSBs of the data byte. The LSB value is
not used, and can be either 1 or 0. The host
reads the device address from the received
data byte, and proceeds to handle the alert
condition.
More than one device may have an active
PMBus ALERT signal and attempt to
communicate with the host. In this case, the
device with the lowest address dominates the
bus and succeeds in transmitting its address to
the host. The device that succeeds disables its
PMBus alert signal. If the host sees that the
PMBus alert signal is still low, it continues to
read addresses until all devices that need to
talk to it have successfully transmitted their
addresses.
Figure 9: Data Transfer Over the PMBus
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
a) Send Byte and Send Byte with PEC
1
S
7
Slave Address
1
Wr
1
A
8
Data Byte
1 1
A P
1
S
7
Slave Address
1
Wr
1
A
8
Data Byte
1
A
8
PEC
1 1
A P
b) Receive Byte and Receive Byte with PEC
1
S
7
Slave Address
1
Rd
1
A
8
Data Byte
1 1
A P
1
S
7
Slave Address
1
Rd
1
A
8
Data Byte
1
A
8
PEC
1 1
A P
c) Write Byte and Write Byte with PEC
1
S
7
Slave Address
1
Wr
1
A
8
Command Code
1
A
8
Data Byte
1 1
A P
1
S
7
Slave Address
1
Wr
1
A
8
Command Code
1
A
8
Data Byte
1
A
8
PEC
1 1
A P
d) Write Word and Write Word with PEC
1
S
7
Slave Address
1 1
Wr A
8
Command Code
1
A
8
Data Byte Low
1
A
8
Data Byte High
1 1
A P
1
S
7
Slave Address
1 1
Wr A
8
Command Code
1
A
8
Data Byte Low
1
A
8
Data Byte High
1
A
1
1
8
PEC
1 1
A P
e) Read Byte and Read Byte with PEC
1
7
1
1
8
S
Slave Address
1
7
Wr
A
Command Code
1
1
8
S
Slave Address
Wr
A
Command Code
A S
1
7
1
1
Slave Address Rd A
1
7
1
1
8
Data Byte
1
1
A P
8
1
8
Data Byte
A
PEC
A S
Slave Address Rd A
8
Command Code
1 1
A S
7
1 1
Slave Address Rd A
8
Data Byte Low
1
A
8
Data Byte High
1
A
8
Command Code
1 1
A S
7
1 1
Slave Address Rd A
8
Data Byte Low
1
A
8
Data Byte High
1
A
1
1
A P
f) Read Word and Read Word with PEC
1
S
1
S
7
Slave Address
7
Slave Address
1
Wr
1
Wr
1
A
1
A
1
P
8
PEC
1
A
1
P
g) Block Read with PEC
Figure 10: PMBus Message Format
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
Data and Numerical Formats
The MPQ8645P uses a direct format internally
to represent real-world values such as voltage,
current, power, and temperature.
All numbers without a suffix in this document
are decimals, unless explicitly designated
otherwise.
Numbers in the binary format are indicated by
the prefix “n’b”, where n is the binary count. For
example, 5’b01010 indicates a 5-bit binary data,
and the data is 01010.
The suffix “h” indicates a hexadecimal format,
which is used for the register address numbers
in this document.
The symbol “0x” indicates a hexadecimal format,
which is used for the value in the register. For
example, 0xA3 is a 1-byte number whose
hexadecimal value is A3.
PMBus Communication Failure
A data transmission fault occurs when the data
is not transferred between the devices properly.
There are several types of data transmission
faults listed below:
Sending too few data
Reading too few data
Sending too many bytes
Reading too many bytes
Improperly set read bit in the address byte
Unsupported command code
PMBus Reporting and Status Monitoring
The MPQ8645P supports real-time monitoring
for some operation parameters and status with
the PMBus interface (see Table 4).
Table 4: PMBus Monitored Parameters and
Status
Parameter/Status
PMBus
Output voltage
1.25mV/LSB
Output current
60.5mA/LSB
Temperature
1˚C/LSB
Input voltage
25mV/LSB
VIN OV
VIN UV
VIN OV warn
VIN UV warn
VO OV
VO UV
Over-temperature (OT)
OT warn
VO OC
VO OC warn
Multi-Time Programming (MTP)
The MPQ8645P has built-in multiple-time
programming (MTP) cells to store user
configurations. The standard command of 15h
(STORE_USER_ALL)
is
not
currently
supported in the MPQ8645P. However, the
MTP cells can be programmed through the
following command combination:
E7h (2000h) E7h (1000h) E7h (4000h)
In the MPS GUI for the MPQ8645P, the above
commands are integrated together and named
15h (STORE_USER_ALL). The MPS GUI
supports the 15h command.
When MTP is being programmed, the VCC
voltage may rise as high as 5V. Be cautious if
VCC is connected to circuits that cannot take
such high voltage. The MTP programming
typically takes about 300ms.
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
REGISTER MAP
Name
Code
Type
Bytes
OPERATION
ON_OFF_CONFIG
CLEAR_FAULTS
WRITE_PROTECT
STORE_USER_ALL
RESTORE_USER_ALL
CAPABILITY
VOUT_MODE
VOUT_COMMAND
VOUT_MAX
VOUT_MARGIN_HIGH
VOUT_MARGIN_LOW
VOUT_SCALE_LOOP
VOUT_MIN
VIN_ON
VIN_OFF
IOUT_OC_FAULT_LIMIT
IOUT_OC_WARN_LIMIT
OT_FAULT_LIMIT
OT_WARN_LIMIT
VIN_OV_FAULT_LIMIT
VIN_OV_WARN_LIMIT
VIN_UV_WARN_LIMIT
TON_DELAY
TON_RISE
STATUS_BYTE
STATUS_WORD
STATUS_VOUT
STATUS_IOUT
01h
02h
03h
10h
15h
16h
19h
20h
21h
24h
25h
26h
29h
2Bh
35h
36h
46h
4Ah
4Fh
51h
55h
57h
58h
60h
61h
78h
79h
7Ah
7Bh
R/W w/ PEC
R/W w/ PEC
Send byte w/ PEC
R/W w/ PEC
Send byte w/ PEC
Send byte w/ PEC
R w/ PEC
R w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
1
1
0
1
0
0
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
2
1
1
STATUS_INPUT
7Ch
R w/ PEC
1
STATUS_TEMPERATURE
7Dh
R w/ PEC
1
STATUS_CML
READ_VIN
7Eh
88h
R w/ PEC
R w/ PEC
1
2
READ_VOUT
READ_IOUT
8Bh
8Ch
R w/ PEC
R w/ PEC
2
2
READ_TEMPERATURE_1
PMBUS_REVISION
8Dh
98h
MFR_ID
99h
MFR_MODEL
9Ah
MFR_REVISION
9Bh
MFR_4_DIGIT
9Dh
R w/ PEC
R w/ PEC
Block read w/
PEC
Block read w/
PEC
Block read w/
PEC
Block read w/
PEC
2
1
1(byte)+
3(data)
1(byte)+
8(data)
1(byte)+
1(data)
1(byte)+
6(data)
Default Value
0x80
0x16
0x00
0xB0
0x40
0x0258 (1.2V)
0x0ABE (5.5V)
0x02A0 (1.344V)
0x0200 (1.024V)
0x01F4 (0.5)
0x00FA (0.5V)
0x0020 (8V)
0x00014 (5V)
0x00A1 (39A)
0x0091 (35A)
0x009B(155oC)
0x0091 (145oC)
0x0021 (16.5V)
0x0021 (16.5V)
0x0010 (4V)
0x0000 (0ms)
0x0001 (2ms)
MTP?
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
0x33h, ASCII “13” (PMBus 1.3)
0x4D 0x50 0x53, ASCII”MPS”
0x4D 0x50 0x51 0x38 0x36 0x34
0x35 0x50, ASCII”MPQ8645P”
0x31, ASCII”1” (REV 1)
Yes*
0x31 0x36 0x30 0x30 0x30 0x30
(MPQ8645P 4-digit 0000)
Yes*
MPQ8645P Rev. 1.2
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30
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
REGISTER MAP (continued)
Name
Code
Type
MFR_CTRL_COMP
MFR_CTRL_VOUT
MFR_CTRL_OPS
MFR_ADDR_PMBUS
MFR_VOUT_OVP_FAULT_LIMIT
MFR_OVP_NOCP_SET
MFR_OT_OC_SET
MFR_OC_PHASE_LIMIT
MFR_HICCUP_ITV_SET
MFR_PGOOD_ON_OFF
MFR_VOUT_STEP
MFR_LOW_POWER
MFR_CTRL
D0h
D1h
D2h
D3h
D4h
D5h
D6h
D7h
D8h
D9h
DAh
E5h
EAh
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
Bytes
1
1
1
1
1
1
1
1
1
1
1
1
2
Default Value
0x0D
0x40
0x05
0x00
0x00
0x00
0x00
0x14 (30A)
0x00
0x00
0x00
0x00
bit[9]=0, bit[3]=0
MTP?
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Note:
* For manufacturer write only.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
OPERATION (01h)
OPERATION is a paged register. The OPERATION command turns the converter output on or off in
conjunction with the input from the CTRL pin. OPERATION also sets the output voltage to the upper or
lower margin voltages. The unit remains in the commanded operating mode until a subsequent
OPERATION command or a change in the state of the CTRL pin instructs the converter to change to
another mode. The OPERATION command also re-enables the converter after a fault-triggered
shutdown. Writing an off command followed by an on command clears all faults. Writing only an on
command after a fault-triggered shutdown will not clear the fault registers.
Command
Format
Bit
Access
Function
Default value
Bit[7:6]
00
01
10
10
10
10
10
7
R/W
6
R/W
5
R/W
1
0
0
Bit[5:4]
XX
XX
00
01
01
10
10
Bit[3:2]
XX
XX
XX
01
10
01
10
Bit[1:0]
XX
XX
XX
XX
XX
XX
XX
OPERATION
Unsigned binary
4
3
R/W
R/W
0
On/off
Immediate off
Immediate off
On
On
On
On
On
0
2
R/W
1
R
X
X
0
Margin state
N/A
N/A
Off
Margin low (ignore fault)
Margin low (act on fault)
Margin high (ignore fault)
Margin high (act on fault)
0
R
X
X
01h
0x00
0x60
0x80
0x94
0x98
0xA4
0xA8
ON_OFF_CONFIG (02h)
The ON_OFF_CONFIG command configures the combination of the CTRL input and the PMBus
commands to turn the converter on and off. This includes how the converter responds when an input
voltage is applied.
Command
Format
Bit
Access
Function
Default value
7
R
X
0
6
R
X
0
5
R
X
0
OPERATION
Unsigned binary
4
3
R/W
R/W
on
op
1
0
2
R/W
ctrl
1
1
R/W
pol_ctrl
1
0
R
delay
0
on
The on bit sets the default to either operate whenever the input voltage is present, or for the on/off to be
controlled by CTRL and PMBus commands.
Bit[4] Value
0
1
Meaning
Converter powers up whenever the input voltage is present, regardless of state the of the CTRL pin.
Converter does not power up until commanded by the CTRL pin and OPERATION command (as
programmed in bit[3:0]).
op
The op bit controls how the converter responds to the OPERATION commands.
Bit[3] Value
0
1
Meaning
Converter ignores the “on” bit in the OPERATION command from the PMBus.
Converter responds to the “on” bit in the OPERATION command from the PMBus.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
ctrl
The ctrl bit controls how the converter responds to the CTRL pin.
Bit[2] Value
0
1
Meaning
Converter ignores the CTRL pin (on/off controlled only by the OPERATION command).
Converter requires the CTRL pin to be asserted to power up. Depending on the bit[3] op bit, the
OPERATION command may also be required to instruct the converter to power up.
pol_ctrl
The pol_ctrl bit sets the polarity of the CTRL pin.
Bit[1] Value
0
1
Meaning
Active low (pull CTRL pin low to start the converter).
Active high (pull CTRL pin high to start the converter).
delay
The delay bit sets the turn-off action when the converter is commanded off through the PMBus. This bit
is read-only, and cannot be modified by the end user.
Bit[0] Value
0
Meaning
TOFF_DELAY, TOFF_FALL
CLEAR_FAULTS (03h)
The CLEAR_FAULTS command resets all stored warning and fault flags. If a fault or warning condition
still remains when the CLEAR_FAULTS command is issued, the ALT# signal may not be cleared or is
reasserted almost immediately. Issuing a CLEAR_FAULTS command will not cause the converter to
restart in the event of a fault turn-off. The converter restart must be done by issuing an OPERATION
command after the fault condition is cleared. This command uses the PMBus to send the byte protocol.
WRITE PROTECT (10h)
The WRITE_PROTECT command controls writes to the converter. This command provides protection
against accidental changes. This command is not intended to provide protection against deliberate or
malicious changes to the converter’s configuration or operation.
All the supported commands may have their parameters read, regardless of the WRITE_PROTECT
settings.
0
0
Bit[7:0] Value
0 0 0 0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Meaning
Enables writes to all commands.
Disables all writes except to the WRITE_PROTECT, OPERATION, PAGE, ON_OFF_
CONFIG, and VOUT_COMMAND commands.
Disables all writes except to the WRITE_PROTECT, OPERATION, and PAGE
commands.
Disables all writes except to the WRITE_PROTECT command.
When 10h is set to a value other than 0x00, in order to program to MTP, 15h must be programmed
through the MPS GUI. A separate MTP command of E7h cannot be used. See the MTP Programming
section on page 29 for details regarding MTP programming.
The default value of 10h is 0x00.
STORE_USER_ALL (15h)
Write all data from the registers to the internal MTPs. This process operates when the MPQ8645P
receives a STORE_USER_ALL command from the PMBus interface. The MPQ8645P does not
currently support a standard 15h command, but can accept a 15h command from the MPS GUI for the
MPQ8645P. See the MTP Programming section on page 29 for details.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
The following registers can be stored using STORE_USER_ALL.
OPERATION (01h)
ON_OFF_CONFIG (02h)
WRITE_PROTECT (10h)
VOUT_COMMAND (21h)
VOUT_MAX (24h)
VOUT_MARGIN_HIGH (25h)
VOUT_MARGIN_LOW (26h)
VOUT_SCALE_LOOP (29h)
VOUT_MIN (2Bh)
VIN_ON (35h)
VIN_OFF (36h)
IOUT_OC_FAULT_LIMIT (46h)
IOUT_OC_WARN_LIMIT (4Ah)
OT_FAULT_LIMIT (4Fh)
OT_WARN_LIMIT (51h)
VIN_OV_FAULT_LIMIT (55h)
VIN_OV_WARN_LIMIT (57h)
VIN_UV_WARN_LIMIT (58h)
TON_DELAY (60h)
TON_RISE (61h)
TOFF_DELAY (64h)
MFR_REVISION (9Bh)
MFR_4_DIGIT (9Dh)
MFR_CTRL_COMP (D0h)
MFR_CTRL_VOUT (D1h)
MFR_CTRL_OPS (D2h)
MFR_ADDR_PMBUS (D3h)
MFR_VOUT_OVP_FAULT_LIMIT (D4h)
MFR_OVP_NOCP_SET (D5h)
MFR_OT_OC_SET (D6h)
MFR_OC_PHASE_LIMIT (D7h)
MFR_HICCUP_ITV_SET (D8h)
MFR_PGOOD_ON_OFF (D9h)
MFR_VOUT_STEP (DAh)
MFR_LOW_POWER (E5h)
MFR_CTRL (EAh)
MFR_LOW_POWER (E5h)
MFR_CTRL (EAh)
RESTORE_USER_ALL (16h)
The RESTORE_USER_ALL command instructs the MPQ8645P to copy the entire contents of the MTP
values to the matching locations in the registers. The values in the registers are overwritten by the
value retrieved from the MTP. Any items in the MTPs that do not have matching locations in the
operating memory are ignored.
The RESTORE_USER_ALL command can be used while the MPQ8645P is operating. However, the
MPQ8645P may be unresponsive during operation with unpredictable, undesirable, or even
catastrophic results, and therefore it is not recommended.
This command is write-only.
CAPABILITY (19h)
The CAPABILITY command returns information about the PMBus functions supported by the
MPQ8645P. This command is read with the PMBus read byte protocol.
Command
Format
Bit
Access
Function
Default value
Bit[6:5] Value
0
0
0
1
1
0
1
1
7
R
PEC
1
CAPABILITY
Unsigned binary
3
2
1
6
5
4
R
R
R
R
R
R
Max bus speed
Alert
X
X
X
0
1
1
0
0
0
PEC supported, max speed 1MHz, supports PMBus alert and ARA.
0
R
X
0
Meaning
Maximum supported bus speed is 100kHz.
Maximum supported bus speed is 1MHz.
Maximum supported bus speed is 400kHz.
Reserved.
The default value of 19h is 0xB0.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
VOUT_MODE (20h)
The VOUT_MODE command reads and commands the output voltage. The 3 MSBs determine the data
format (only direct format is supported in MPQ8645P), and the other 5 bits represent the exponent used
in the output voltage read/write commands.
The default value of 20h is 0x40.
VOUT_COMMAND (21h)
VOUT_COMMAND sets the output voltage of the MPQ8645P. VOUT_COMMAND and VOUT_SCALE_
LOOP together determine the feedback reference voltage: VOUT_COMMAND * VOUT_SCALE_LOOP.
The Output Voltage Setting section on page 22 details how to set the output voltage.
Command
Format
Bit
Access
Function
Default value
VOUT_COMMAND
Direct
9
8
7
6
15
14
13
12
11
10
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
1
0
0
1
0
1
1
0
0
0
X
The value is unsigned, and 1LSB = 2mV. The default value of 21h is 1.2V, which is 0x0258.
VOUT_MAX (24h)
The VOUT_MAX command sets an upper limit on the output voltage of the converter to enable
command regardless of any other commands or combinations. The intent of this command is to provide
a safeguard against the output voltage accidentally being set to a possibly destructive level, rather than
to be the primary output over-voltage protection.
Command
Format
Bit
Access
Function
Default value
VOUT_MAX
Direct
8
7
15
14
13
12
11
10
9
6
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
1
0
1
1
1
0
1
1
1
0
0
0
X
If an attempt is made to program the output voltage higher than the limit set by this command, the
device responds as follows:
The commanded output voltage is set to VOUT_MAX.
The NONE OF THE ABOVE bit is set in STATUS_BYTE.
The VOUT bit is set in STATUS_WORD.
The VOUT_MAX_MIN warning bit is set in the STATUS_VOUT register.
The device notifies the host.
The value is unsigned, and 1LSB = 2mV. The maximum value of VOUT_MAX is 5.5V, and the default
value is 5.5V. Therefore, the default value of 24h is 0x0ABEh.
VOUT_MARGIN_HIGH (25h)
Command
Format
Bit
Access
Function
Default value
VOUT_MARGIN_HIGH
Direct
9
8
7
6
15
14
13
12
11
10
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
0
X
0
X
0
X
0
0
0
1
0
1
0
1
0
0
0
0
0
The value is unsigned, and 1LSB = 2mV. The default value is 1.344V. Therefore, the default value of
25h is 0x02A0.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
VOUT_MARGIN_LOW (26h)
Command
Format
Bit
Access
Function
Default value
VOUT_MARGIN_LOW
Direct
9
8
7
6
15
14
13
12
11
10
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
0
X
0
X
0
X
0
0
0
1
0
0
0
0
0
0
0
0
0
The value is unsigned, and 1LSB = 2mV. The default value is 1.024V, which is 0x0200.
VOUT_SCALE_LOOP (29h)
VOUT_SCALE_LOOP sets the feedback resistor divider ratio, and is equal to VFB/VOUT. Regardless
of whether an external or internal feedback resistor divider is used, VOUT_SCALE_LOOP should
match the actual feedback resistor divider used.
Command
Format
Bit
Access
Function
Default value
VOUT_SCALE_LOOP
Direct
9
8
7
6
15
14
13
12
11
10
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
1
1
1
1
1
0
1
0
0
X
The value is unsigned, and 1LSB = 0.001. The default value is 0.5, which is 0x01F4.
VOUT_MIN (2Bh)
The VOUT_MIN command sets a lower limit on the output voltage for the converter, regardless of any
other commands or combinations. The intent of this command is to provide a safeguard against the
output voltage accidentally being set to a possibly destructive level, rather than to be the primary output
under-voltage protection.
Command
Format
Bit
Access
Function
Default value
VOUT_MIN
Direct
8
7
15
14
13
12
11
10
9
6
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
0
X
If an attempt is made to program the output voltage below the limit set by this command, the device
responds as follows:
The commanded output voltage is set to VOUT_MIN.
The NONE OF THE ABOVE bit is set in STATUS_BYTE.
The VOUT bit is set in STATUS_WORD.
The VOUT_MAX_MIN warning bit is set in the STATUS_VOUT register.
The device notifies the host.
The minimum value of VOUT_MIN is 0.5V. The value is unsigned, and 1LSB = 2mV. The default value
is 0.5V, which is 0x00FA.
VIN_ON (35h)
The VIN_ON command sets the value of the input voltage (in V), at which the converter should start to
run if all other required power-up conditions are met. The VIN_ON value can be set between 4V and
15V with a 0.25V increment. The VIN_ON value should always be set higher than the VIN_OFF value,
with enough margin so that there is no bouncing between VIN_ON and VIN_OFF during the power
conversion.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
Command
Format
Bit
Access
Function
Default value
VIN_ON
Direct
8
7
15
14
13
12
11
10
9
6
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
0
X
0
X
0
X
0
0
0
0
0
0
0
1
0
0
0
0
0
The value is unsigned, and 1LSB = 250mV. The default value is 8V, which is 0x0020.
VIN_OFF (36h)
The VIN_OFF command sets the value of the input voltage (in V), at which the converter should stop
power conversion once operation has started. The VIN_OFF value can be set between 2.75V and
14.75V with a 0.25V increment. The VIN_OFF value should be always set lower than the VIN_ON
value, with enough margin so that there is no bouncing between VIN_OFF and VIN_ON during the
power conversion.
Command
Format
Bit
Access
Function
Default value
VIN_OFF
Direct
8
7
15
14
13
12
11
10
9
6
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
0
X
0
X
0
X
0
0
0
0
0
0
0
0
1
0
1
0
0
The value is unsigned, and 1LSB = 250mV. The default value is 5V, which is 0x0014.
IOUT_OC_FAULT_LIMIT (46h)
The IOUT_OC_FAULT_LIMIT sets the output DC current limit. In multi-phase configuration, this
command sets the total output DC current limit. If the sensed output DC current is higher than the limit,
the MPQ8645P responds with either a latch-off or a hiccup, based on the setting in MFR_OT_OC_SET.
Meanwhile, the OC fault flags are set in STATUS_BYTE (78h) and STATUS_WORD (79h) respectively,
and the ALT# signal is asserted.
Command
Format
Bit
Access
Function
Default value
IOUT_OC_FAULT_LIMIT
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
1
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
1
242mA/LSB
0
1
The value is unsigned, and 1LSB = 242mA. The default value is 00A1h. The corresponding value of the
total output current is 39A.
IOUT_OC_WARN_LIMIT (4Ah)
The IOUT_OC_WARN_LIMIT command configures or reads the threshold for the over-current warning
detection. If the sensed current exceeds this value, the OC warning flags are set in STATUS_BYTE
(78h) and STATUS_WORD (79h) respectively, and the ALT# signal is asserted.
Command
Format
Bit
Access
Function
Default value
IOUT_OC_WARN_LIMIT
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
1
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
1
0
0
0
1
242mA/LSB
0
0
The value is unsigned, and 1LSB = 242mA. The default value is 0091h. The corresponding value of the
total output current is 35A.
MPQ8645P Rev. 1.2
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4/17/2020
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
OT_FAULT_LIMIT (4Fh)
The OT_FAULT_LIMIT configures or reads the threshold for the over-temperature fault detection. If the
measured temperature exceeds this value, an over-temperature fault is triggered, OT fault flags are set
in the STATUS BYTE (78h) and STATUS_WORD (79h) respectively, and the ALT# signal is asserted.
After the measured temperature falls below the value in this register, the MOSFET may be switched
back on with the OPERATION command when the part works in latch-off mode. The minimum
temperature fault detection time should be less than 20ms. The temperature ranges from 0°C to 255°C.
If an OT fault occurs when the temperature rises above this register value, the part implements autoretry when the temperature drops 20°C below this value.
Command
Format
Bit
Access
Function
Default value
15
14
13
12
11
10
OT_FAULT_LIMIT
Direct
9
8
7
6
R
R
R
R
R
R
R
R
R/W
0
0
0
0
0
0
0
0
1
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
1
1
0
1
1
1°C/LSB
0
0
The value is unsigned, and 1LSB = 1°C. The default value is 009Bh. The corresponding value is 155°C.
The OT_FAULT_LIMIT setting value should be below 160°C. If the OT_FAULT_LIMIT value is above
160oC, the register value is neglected, and the MPQ8645P enters thermal shutdown when the junction
temperature reaches 160°C.
Table 5 shows the relationship between direct values and real-world values.
Table 5: Direct Value vs. Real-World Value
Direct Value
Real-World Value (°C)
0000 0000
0
0000 0001
1
1111 1111
+255
OT_WARN_LIMIT (51h)
OT_WARN_LIMIT configures or reads the threshold for over-temperature warning detection. If the
sensed temperature exceeds this value, an over-temperature warning is triggered, the OT warning flags
are set in STATUS BYTE (78h) and STATUS_WORD (79h), and the ALT# signal is asserted. The
minimum temperature warning detection time should be less than 20ms.
Command
Format
Bit
Access
Function
Default value
15
14
13
12
11
10
OT_WARN_LIMIT
Direct
9
8
7
6
R
R
R
R
R
R
R
R
R/W
0
0
0
0
0
0
0
0
1
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
1
0
0
0
1
1°C/LSB
0
0
The value is unsigned, and 1LSB = 1°C. The default value is 0x0091h. The corresponding value is
145°C. The OT_WARN_LIMIT setting value should be below 160°C. The relationship between the
direct value and real-world value is the same as OT_FAULT_LIMIT.
VIN_OV_FAULT_LIMIT (55h)
The VIN_OV_FAULT_LIMIT command configures or reads the threshold for the input over-voltage fault
detection. If the measured value of VIN rises above the value in this register, VIN OV fault flags are set
in the respective registers. The MPQ8645P disables the power stage. When VIN drops below the
VIN_OV_FAULT_LIMIT, the MPQ8645P begins working again.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
Command
Format
Bit
Access
Function
Default value
VIN_OV_FAULT_LIMIT
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
1
500mV/LSB
0
1
The value is unsigned and 1LSB = 500mV. The default value is 21h. The corresponding value is 16.5V.
The VIN_OV_FAULT_LIMIT setting value should not be greater than 18V.
VIN_OV_WARN_LIMIT (57h)
The VIN_OV_WARN_LIMIT command configures or reads the threshold for the input over-voltage
warning detection. If the measured value of VIN rises above the value in this register, VIN OV warning
flags are set in the respective registers, and the ALT# signal is asserted.
Command
Format
Bit
Access
Function
Default value
VIN_OV_WARN_LIMIT
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
1
500mV/LSB
0
1
The value is unsigned and 1LSB = 500mV. The default value is 0x21. The corresponding value is
16.5V. The VIN_OV_WARN_LIMIT setting value should not be greater than 18V.
VIN_UV_WARN_LIMIT (58h)
The VIN_UV_WARN_LIMIT command configures or reads the threshold for the input under-voltage
fault detection. If the measured value of VIN falls below the value in this register, the VIN UV warning
flags are set in the respective registers, and the ALT# signal is asserted.
Command
Format
Bit
Access
Function
Default value
VIN_UV_WARN_LIMIT
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
1
0
0
0
0
250mV/LSB
0
0
The value is unsigned and 1LSB = 250mV. The default value is 0x10. The corresponding value is 4V.
The VIN_UV_WARN_LIMIT setting value should be greater than 3.3V.
TON_DELAY (60h)
The TON_DELAY command sets the time (in ms), from when a start condition is received (as
programmed by the ON_OFF_CONFIG command) until the output voltage starts to rise.
Command
Format
Bit
Access
Function
Default value
TON_DELAY
Direct
8
7
15
14
13
12
11
10
9
6
5
4
3
2
1
0
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
0
X
0
X
0
X
0
X
0
0
0
0
0
0
0
0
0
0
4ms/LSB
0
0
The value is unsigned and 1LSB = 4ms. The maximum value is 60h = 0x0100 (1024ms). The default
value is 0ms.
TON_RISE (61h)
The TON_RISE command sets the soft-start time (in ms) from when the output starts to rise until the
voltage has reached the regulation point.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
Command
Format
Bit
Access
Function
Default value
TON_RISE
Direct
8
7
15
14
13
12
11
10
9
6
5
4
3
2
1
0
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
0
X
0
X
0
X
0
X
0
0
0
0
0
0
0
0
0
1
1ms/LSB
0
0
The only supported values are:
3’b000: 1ms
3’b001: 2ms
3’b010: 4ms
3’b011: 8ms
3’b100 and up: 16ms
The default value is 0x01 (e.g. 2ms for soft-start time).
STATUS_BYTE (78h)
The STATUS_BYTE command returns the value of a number of flags indicating the state of the
MPQ8645P. Accesses to this command should be used according to the read byte protocol. To clear
bits in this register, the underlying fault should be removed and a CLEAR_FAULTS command issued.
Bits
[7]
Name
Reserved
[6]
OFF
[5]
VOUT_OV
[4]
IOUT_OC_FAULT
[3]
VIN_UV
[2]
OT_FAULT_WARN
[1]
COMM_ERROR
[0]
NONE_OF_THE_ABOVE
Behavior
Default
0
Live
0
0
Latched
0
0
Live
0
Latched
0
Live
0
Description
Always read as 0.
0: Part enabled
1: Part disabled. This can be from OC fault, OT fault, bad
MOSFET fault, UV/OV fault, or the OPERATION
command turning off
An output over-voltage fault has occurred.
0: No over-current fault detected
1: Over-current fault detected
Not supported, always read as 0.
0: No over-temperature warning or fault detected
1: Over-temperature warning or fault detected
0: No communication error detected
1: Communication error detected
0: No other fault or warning
1: Fault or warning not listed in bit[7:1] has occurred
STATUS_WORD (79h)
The STATUS_WORD returns the value of a number of flags indicating the state of the MPQ8645P. To
clear bits in this register, the underlying fault should be removed and a CLEAR_FAULTS command
issued.
Bits
Name
Behavior
Default
[15]
VOUT_STATUS
Live
0
[14]
IOUT_STATUS
Live
0
[13]
VIN_STATUS
Live
0
[12]
MFR_STATUS
[11]
POWER_GOOD#
[10]
[9]
Reserved
Reserved
0
Live
0
0
0
Description
0: No output fault or warning
1: Output fault or warning
0: No IOUT fault
1: IOUT fault
0: No VIN fault
1: VIN fault, at the period when VIN starts up, the initial flag
is 1 before VIN passes the UVLO threshold. The flag is
cleared once VIN passes the UVLO threshold
Always read as 0.
0: Power good signal is asserted
1: Power good signal is not asserted
Always read as 0.
Always read as 0.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
[8]
Low
Byte
UNKNOWN
Latched
0: No other fault has occurred
1: A fault type not specified in the bit[15:1] of STATUS_
WORD has been detected
0
STATUS_BYTE
STATUS_BYTE is the low byte of STATUS_WORD.
STATUS_VOUT (7Ah)
STATUS_VOUT command returns one data byte (see contents below).
Bits
Name
Behavior
Default
Live
0
Latched
Latched
0
0
[7]
VOUT_OV_FAULT
[6]
[5]
Reserved
Reserved
[4]
VOUT_UV_FAULT
Live
0
[3]
VOUT_MAX_MIN
Live
0
[2]
[1]
Reserved
Reserved
[0]
UNKNOWN
0
0
Latched
0
Description
0: No output OV fault
1: Output OV fault
Always read as 0.
Always read as 0.
0: No output UV fault
1: Output UV fault
0: No VOUT_MAX, VOUT_MIN warning
1: An attempt has been made to set the output voltage to
a value higher than allowed via the VOUT_MAX
command, or lower than the limit allowed via the
VOUT_MIN command
Always read as 0.
Always read as 0.
0: No other fault has occurred
1: A fault type not specified in bit[15:1] of STATUS_
WORD has been detected
STATUS_IOUT (7Bh)
Command
Format
Bit
Access
Function
Default value
7
R
IOUT_OC
0
6
R
IOUT_OC & VOUT_UV
0
STATUS_IOUT
Unsigned binary
5
R
IOUT_OC_WARNING
0
4
R
X
0
3
R
X
0
2
R
X
0
1
R
X
0
0
R
X
0
STATUS_INPUT (7Ch)
The STATUS_INPUT returns the value of the flags indicating the input voltage status of the MPQ8645P.
To clear bits in this register, the underlying fault or warning should be removed and a CLEAR_FAULTS
command issued.
Name
Behavior
Default
Set
[7]
VIN_OV_FAULT
R, latched
0
[6]
VIN_OV_WARN
R, latched
0
[5]
VIN_UV_WARN
R, latched
0
[4]
VIN_UV_FAULT
R, latched
0
R
0
Bits
[3:0]
Reserved
Description
0: No over-voltage fault detected in Vin pin
1: Over-voltage fault detected in Vin pin
0: Over-voltage condition on VIN has not occurred
1: Over-voltage condition on VIN has occurred
0: Under-voltage condition on VIN has not occurred
1: Under-voltage condition on VIN has occurred
0: Input voltage is higher than the voltage setting in VIN_ON.
1: Input voltage is lower than the voltage setting in VIN_ON.
Always read as 0000.
STATUS_TEMPERATURE (7Dh)
The STATUS_TEMPERATURE returns the value of the flags indicating the VIN over-voltage or undervoltage of the MPQ8645P. To clear bits in this register, the underlying fault should be removed and a
CLEAR_FAULTS command issued.
Bits
[7]
[6]
Name
OT_FAULT
OT_WARNING
Behavior
R, latched
R, latched
Default
0
0
Description
1: Over-temperature fault has occurred
1: Over-temperature warning has occurred
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
[5:0]
Reserved
R
0
Always read as 0.
STATUS_CML (7Eh)
Command
Format
Bit
Access
7
R
Invalid /
unsupported
command
0
Function
Default value
STATUS_CML
Unsigned binary
5
4
R
R
6
R
3
R
2
R
1
R
0
R
Invalid /
unsupported data
X
Memory fault
detected
X
X
Other fault
Memory
busy
0
0
0
0
0
0
0
READ_VIN (88h)
The READ_VIN command returns the 10-bit measured value of the input voltage.
Command
Format
Bit
Access
Function
Default value
15
R
14
R
13
R
0
0
0
12
R
11
R
10
R
9
R
0
0
0
0
READ_VOUT
Direct
8
7
R
R
6
R
X
0
0
0
5
4
R
R
25mV/LSB
0
0
3
R
2
R
1
R
0
R
0
0
0
0
READ_VOUT (8Bh)
The READ_VOUT command returns the 13-bit measured value of the output voltage.
Command
Format
Bit
Access
Function
Default value
15
R
14
R
X
0
0
13
R
12
R
11
R
10
R
9
R
0
0
0
0
0
READ_VOUT
Direct
8
7
6
5
R
R
R
R
1.25mV/LSB
0
0
0
0
4
R
3
R
2
R
1
R
0
R
0
0
0
0
0
READ_IOUT (8Ch)
The READ_IOUT command returns the 14-bit measured value of the output current. This value is also
compared with IOUT_OC_FAULT_LIMIT and IOUT_OC_WARN_LIMIT, and can affect STATUS_IOUT.
Command
Format
Bit
Access
Function
Default value
15
R
14
R
13
R
12
R
11
R
10
R
9
R
0
0
0
0
0
1
X
0
READ_IOUT
Direct
8
7
6
R
R
R
62.5mA/LSB
0
0
1
5
R
4
R
3
R
2
R
1
R
0
R
0
1
1
0
0
0
READ_TEMPERATURE_1 (8Dh)
The READ_TEMPERATURE_1 command returns the internal sensed temperature. This value is also
used internally for over-temperature fault and warning detection. This data has a range of -255°C to
+255°C.
Command
Format
Bit
Access
Function
Default value
READ_TEMPERATURE_1
Direct
9
8
7
6
15
14
13
12
11
10
5
4
3
2
1
0
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
Sign
0
0
0
0
1
0
1
0
X
1°C/LSB
1
0
READ_TEMPERATURE_1 is a 2-byte, two’s complement integer. Bit[9] is the sign bit. Table 6 shows
the relationship between direct values and real-world values.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
Table 6: Direct Value vs. Real-World Value
Sign
0
0
0
1
1
Direct Value
0 0000 0000
0 0000 0001
1 1111 1111
0 0000 0001
1 1111 1111
Real-World Value (°C)
0
1
+511
-511
-1
PMBUS_REVISION (98h)
The PMBUS_REVISION command returns the protocol revision used. Accesses to this command
should use the read byte protocol. Bit[7:4] indicates the PMBus revision of specification Part I to which
the device is compliant. Bit[3:0] indicates the revision of specification Part II to which the device is
compliant.
Name
Format
Bit
Access
Default value
7
R
0
6
R
0
5
R
1
PMBUS_REVISION
Unsigned binary
4
3
R
R
0
0
2
R
0
1
R
1
0
R
0
Bit[7:4] is always read as 4’b0011, specification PMBus Part I Revision 1.3.
Bit[3:0] is always read as 4’b0011, specification PMBus Part II Revision 1.3.
MFR_ID (99h)
The MFR_ID command returns the company identification.
Byte
Byte Name
Value
0
Byte Count
0x03
1
2
3
Character 1
Character 2
Character 3
0x4D, ASCII of “M”
0x50, ASCII of “P”
0x53, ASCII of “S”
Description
Always read as 0x03. The number of data bytes that the block
read command expects to read.
Always read as 0x4D.
Always read as 0x50.
Always read as 0x53.
MFR_MODEL (9Ah)
The MFR_MODEL command returns the part name.
Byte
Byte Name
Value
Description
Always read as 0x08, the number of data bytes that the block
read command expects to read.
0
Byte Count
0x08
1
Character 1
0x4D, ASCII of “M”
Always read as 0x4D.
2
Character 2
0x50, ASCII of “P”
Always read as 0x50.
3
Character 3
0x51, ASCII of “Q”
Always read as 0x51.
4
Character 4
0x38, ASCII of “8”
Always read as 0x38.
5
6
Character 5
Character 6
0x36, ASCII of “6”
0x34, ASCII of “4”
Always read as 0x36.
Always read as 0x34.
5
Character 5
0x35, ASCII of “5”
Always read as 0x35.
6
Character 6
0x50, ASCII of “P”
Always read as 0x50.
MPQ8645P Rev. 1.2
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4/17/2020
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
MFR_4_DIGIT (9Dh)
The MFR_4_DIGIT sets a unique four-digit number to identify different MTP configurations. The
MFR_4_DIGIT has a total of 6 bytes.
Byte
0
1
2
3
4
5
Byte Name
Character 0
Character 1
Character 2
Character 3
Character 4
Character 5
Value
0x31
0x36~0x39
0x30, 0x31
0x30~0x3F
0x30~0x33
0x30~0x3F
The default four-digit number for the MPQ8645P is -0000, which corresponds to 0x313630303030 (byte
0~5).
MFR_CTRL_COMP (D0h)
The MFR_CTRL_COMP command adjusts the loop compensation of the MPQ8645P.
Bits
[7:5]
[4]
Name
Reserved
Cff
Access
R/W
R/W
Behavior
Live
Live
Default
0000
0
Description
Sets the feed-forward capacitance when the internal
feedback resistor divider is selected.
0: 20pF
1: 50pF
Sets The internal RAMP compensation to stabilize the loop.
NOTE: the actual RAMP amplitude is related to EAh[3]. See
the register EAh description for details.
[3:1]
RAMP
R/W
Live
1101
[0]
Slave Fault
Detection
R/W
Live
1
EAh[3]=0 (single-phase)
EAh[3]=1 (multi-phase)
000: 5.6mV ramp
000: 8.6mV ramp
001: 9.8mV ramp
001: 15mV ramp
010: 18mV ramp
010: 27mV ramp
011: 30mV ramp
011: 45mV ramp
100: 8.5mV ramp
100: 13mV ramp
101: 15.1mV ramp
101: 23mV ramp
110: 27mV ramp
110: 41mV ramp
111: 44mV ramp
111: 68mV ramp
Enables or disables the slave fault detection function
through the PG pin.
0: Slave-phase fault detection is enabled
1: Slave-phase fault detection is disabled
MFR_CTRL_VOUT (D1h)
The MFR_CTRL_VOUT command adjusts the output voltage behaviors of the MPQ8645P.
Bits
[7]
Name
Reserved
Access
R/W
Behavior
Live
Default
0
[6]
VO
discharge
R/W
Live
1
[5:2]
PG delay
R/W
Live
0000
Description
Enables or disables the active output voltage discharge
when the MPQ8645P is commanded off through CTRL or
the OPERATION command.
1: Output voltage discharge at CTRL low
0: No active output voltage discharge
Sets the PG pull-high time after soft start finishes.
1111: 1ms
0000: 2ms
0001: 3ms
…
1110: 15ms
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
[1:0]
VO_RANGE
R/W
Live
00
Chooses the internal voltage divider ratio.
00: VREF / VO = 1V, VO = 0.4V to 0.672V, LSB = 2mV
01: VREF / VO = 0.5V, VO = 0.4V to 1.344V, LSB = 2mV
10: VREF / VO = 0.25V, VO = 0.7V to 2.688V, LSB = 2mV
11: VREF / VO = 0.125V, VO = 1.3V to 5.376V, LSB = 2mV
The default value of D1h is 0x40.
MFR_CTRL_OPS (D2h)
The MFR_CTRL_OPS command sets the switching frequency and light-load operation mode of the
MPQ8645P.
Bits
[7:3]
Name
Reserved
Access
Behavior
Default
00000
[2:1]
SWITCHING_
FREQUENCY
R/W
Live
10
[0]
SKIP_CCM
(SYNC)
R/W
Live
1
Description
00: Set fSW to 400kHz
01: Set fSW to 600kHz
10: Set fSW to 800kHz
11: Set fSW to 1000kHz
0: Pulse-skip mode at light-load
1: Forced CCM at light-load
The default value of D2h is 0x05.
MFR_ADDR_PMBUS (D3h)
Command
Format
Bit
Access
Function
Default value
7
R/W
Enable
0
6
R/W
5
R/W
0
0
MFR_ADDR_PMBUS
Direct
4
3
R/W
R/W
ADDR
0
0
2
R/W
1
R/W
0
R/W
0
0
0
Bit[7] (enable bit):
1: The address is decided by MFR_ADDR_PMBUS [6:0]
0: The address is decided by ADDR pin
The default value of D3h is 0x00.
MFR_VOUT_OVP_FAULT_LIMIT (D4h)
This MFR_VOUT_OVP_FAULT_LIMIT command sets the exit and entry thresholds for OVP.
Bits
[7:4]
Name
Reserved
Access
Behavior
Default
0000
[3:2]
OV_EXIT_
TH
R/W
Live
00
[1:0]
OV_ENTRY_
TH
R/W
Live
00
Description
Sets the OVP exit threshold.
00: 10% * VREF
01: 50% * VREF
10: 80% * VREF
11: 102.5% * VREF
Sets the OVP entry threshold.
00: 115% * VREF
01: 120% * VREF
10: 125% * VREF
11: 130% * VREF
The above thresholds are relative values of the reference voltage. The default value of D4h is 0x00.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
MFR_OVP_NOCP_SET (D5h)
This MFR_OVP_NOCP_SET command sets the responses of the output voltage OVP.
Bits
[7:4]
Name
Reserved
DELAY_NOCP
(D400)
Access
Behavior
Default
0000
R/W
Live
0
[2]
NOCP
R/W
Live
0
[1:0]
VOUT_OV
_Response
R/W
Live
00
[3]
Description
0: 100ns delay after NOCP
1: 200ns delay after NOCP
0: Set NOCP to -10A
1: Set NOCP to -15A
00: Latch-off with output voltage discharge
01: Latch-off without output voltage discharge in DCM
10: Hiccup with output voltage discharge
11: Hiccup without output voltage discharge in DCM
The bit[1:0] of MFR_OVP_NOCP_SET command tells the converter what action to take in response to
an output over-voltage fault. The device also:
Sets the VOUT_OV bit in the STATUS_BYTE.
Sets the VOUT bit in the STATUS_WORD.
Sets the VOUT over-voltage fault bit in the STATUS_VOUT command.
Notifies the host by asserting ALERT pin.
There are four OVP response modes that can be chosen through bit[1:0] of MFR_VOUT_OVP_
NOCP_SET:
Latch-off with output discharge: Once the MPQ8645P reaches the OV entry threshold, the LS-FET
turns on until the MPQ8645P reaches NOCP. The MPQ8645P turns off for a fixed amount of time
and turns on again. This operation repeats until FB drops below the OVP exit threshold set by
register D4[3:2]. Then the LS-FET turns off. If FB rises beyond the OV entry threshold again, the
LS-FET turns on again to discharge the output voltage. However, the converter will not attempt to
restart until the power of either VIN, VCC, or CTRL is recycled.
Latch-off without output discharge (only effective in DCM): Once the MPQ8645P reaches the OV
entry threshold, the LS-FET turns on. When the inductor current crosses zero, the converter enters
Hi-Z mode (output disabled). The converter stops discharging the output voltage. The converter will
not attempt to restart until the power of either VIN, VCC, or CTRL is recycled.
Hiccup with output discharge: Once the MPQ8645P reaches the OV entry threshold, the LS-FET is
on until the MPQ8645P reaches NOCP. The MPQ8645P turns off for a fixed amount of time and
turns on again. This operation repeats until FB drops below the OVP exit threshold set by register
D4[3:2]. Then the LS-FET turns off. A new SS is initiated.
Hiccup without output discharge (only effective in DCM): Once the MPQ8645P reaches OV, the LSFET remains on until the MPQ8645P reaches NOCP. Then a new SS is initiated.
The default value of D5h is 0x00.
MFR_OT_OC_SET (D6h)
The MFR_OT_OC_SET command sets the responses of OCP and sets the responses and hysteresis
of OTP. This is a 1-byte command.
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
Bits
[7:4]
Name
Reserved
Access
Behavior
Default
0000
[3]
OC_response
R/W
Live
00
[2:1]
OT_hyst
R/W
Live
00
[0]
OT_Response
R/W
Live
0
Description
0: Latch-off, never retry
1: Retry
00: 20°C
01: 25°C
10: 30°C
11: 35°C
0: Latch-off, never retry
1: Retry after the temp drops by the value set by bit[2:1]
The MFR_OT_OC_SET command tells the converter what kind of action to take in response to an
over-temperature fault and a total output over-current fault.
The default value of D6h is 0x00.
MFR_OC_PHASE_SET (D7h)
The MFR_OC_PHASE_SET command sets the inductor valley current limit of each individual phase.
This is a cycle-by-cycle current limit. After 31 consecutive cycles of OC, OCP is triggered. This is a 1byte command.
Bits
[7:5]
[4:0]
Name
Reserved
OC_limit
Access
Behavior
R/W
Live
Default
000
10100
Description
Current limit. 1.5A/LSB, [00000] = 0A.
The value is unsigned, and 1LSB = 1.5A. The default value of D7h is 0x14, which corresponds to 30A
of the inductor valley current limit.
MFR_HICCUP_ITV_SET (D8h)
This MFR_HICCUP_ITV_SET command sets the interval of hiccup during OCP. This is a 1-byte
command.
Bits
[7:6]
Name
Reserved
Access
Behavior
Default
00
[5:0]
Hiccup_itv
R/W
Live
000000
Description
OC fault hiccup interval time.
000000: 4ms
1 LSB = 4ms.
The D8h is only effective when EAh bit[10] is set to 1, and reaches the total output current limit set by
IOUT_OC_FAULT_LIMIT (46h).
When EAh bit[10] is set to “0” or when it reaches the inductor valley current limit set by
MFR_OC_PHASE_LIMIT, the OCP hiccup time is about five times the soft-start time set by TON_RISE
(61h).
The default value of D8h is 0x00.
MFR_UVP_PGOOD_ON_LIMIT (D9h)
This MFR_UVP_PGOOD_ON_LIMIT command sets the thresholds UVP and PGOOD on. Any fault
condition will pull PG low. The default value of D9h is 0x00.
Bits
[7:4]
[3:2]
Name
Reserved
UV_TH
Access
R/W
Behavior
Live
Default
0000
00
Description
Sets the UVP threshold. When FB drops below the UV_TH
level, the MPQ8645P enters UVP. The response of UVP is
the same as in OCP.
00: 69% * VREF
01: 74% * VREF
10: 79% * VREF
11: 84% * VREF
MPQ8645P Rev. 1.2
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MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUS
[1:0]
PG_ON
R/W
Live
00
Sets the threshold of FB at which PG is pulled high during
soft start. Once FB reaches the threshold, PG is pulled high
after the delay set by D1[5:2].
00: 90% * VREF
01: 92.5% * VREF
10: 95% * VREF
11: 97.5% * VREF
MFR_VOUT _STEP (DAh)
This MFR_VOUT_STEP command sets the slew rate of the output voltage transition after soft start
finishes. This command does not determine the slew rate of the output voltage during soft start.
Bits
[7:4]
Name
Reserved
Access
Behavior
Default
0000
[3:0]
Vout_step
R/W
Live
0000
Description
0000: 10µs/mV
1LSB = 2.5µs/mV.
The default value of DAh is 0x00.
MFR_LOW_POWER (E5h)
This MFR_LOW_POWER enables or disables the slave phase(s) in multi-phase configuration.
Bits
[7:2]
Name
Reserved
Access
Behavior
Default
000000
[1]
LP_PS#
R/W
Live
0
[0]
LP_PMBus
R/W
Live
0
Description
0: Low-power mode is disabled, regardless of PS#
1: Low-power mode is enabled when PS# is low, and
disabled when PS# is high
0: Low-power mode is disabled through PMBus
1: Low-power mode is enabled through PMBus
The slave phases can be enabled/disabled directly through bit[0] of MFR_LOW_POWER command.
When bit[1] of MFR_LOW_POWER is set to “1”, the slave phases can be enabled or disabled by the
PS# pin. The master phase cannot be disabled through the MFR_LOW_POWER command. The
default value of E5h is 0x00.
MFR_CTRL (EAh)
Some bits of MFR_CTRL enable or disable some functions.
Bits
[15:11]
Name
Reserved
Access
R
Behavior
Live
Default
[10]
total_oc_
hiccup_interval
R/W
Live
0
[9]
osm
R/W
Live
0
[8:4]
reserved
R
Live
[3]
phase_operation
R/W
Live
[2:0]
reserved
R
Live
Description
For manufacturer use only.
Chooses whether the interval during OCP HICCUP can be
changed through register D8h.
0: Fixed OCP hiccup interval
1: Adjustable OCP hiccup interval
Enables or disables the output sink mode (OSM) function.
0: Enable output sink mode (OSM)
1: Disable OSM
For manufacturer use only.
Determines single- or multi-phase operation. The selection
of this bit affects the actual ramp amplitude chosen through
register D0h[3:1]. See the MFR_CTRL_COMP (D0h)
section on page 44.
0: For single-phase operation
1: For multi-phase operation
For manufacturer use only.
MPQ8645P Rev. 1.2
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48
MPQ8645P – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUSTM
PACKAGE INFORMATION
TQFN-25 (4mmx5mm)
17
PIN 1 ID
MARKING
25
1
16
1.20
0.55
PIN 1 ID
INDEX AREA
0.00
0.55
4
14
1.20
5
13
BOTTOM VIEW
TOP VIEW
SIDE VIEW
NOTE:
1) LAND PATTERNS OF PINS 1~4 AND 14~16
HAVE THE SAME LENGTH AND WIDTH.
2) LAND PATTERNS OF PIN 5, 13, AND 17 AND
25 HAVE THE SAME LENGTH AND WIDTH.
3) ALL DIMENSIONS ARE IN MILLIMETERS.
4) LEAD COPLANARITY SHALL BE 0.08
MILLIMETERS MAX.
5) JEDEC REFERENCE IS MO-220.
6) DRAWING IS NOT TO SCALE.
1.20
0.55
0.00
0.55
1.20
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MPQ8645P Rev. 1.2
www.MonolithicPower.com
4/17/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
49
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