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NB648EQJ-LF-Z

NB648EQJ-LF-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    QFN30_EP

  • 描述:

    Buck Switching Regulator IC Positive Adjustable 0.8V 1 Output 8A 30-VFQFN Exposed Pad

  • 数据手册
  • 价格&库存
NB648EQJ-LF-Z 数据手册
NB648 High Effeciency 8A, 25V, 580kHz Synchronous Step-down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The NB648 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 8A continuous output current over a wide input supply range with excellent load and line regulation. The NB648 operates at high efficiency over a wide output current load range. • • • • • • • • • • Current mode operation provides fast transient response and eases loop stabilization. Full protection features include OCP and thermal shut down. Wide 4.5V to 25V Operating Input Range 8A Output Current Low RDS(ON) Internal Power MOSFETs Proprietary Switching Loss Reduction Technique Fixed 580kHz Switching Frequency Sync from 300kHz to 2MHz External Clock Internal Compensation OCP Protection and Thermal Shutdown Output Adjustable from 0.8V to 15V Available in 30-pin QFN 5x6mm Package APPLICATIONS The NB648 requires a minimum number of readily available standard external components and is available in a space saving 5mx6mm 30pin QFN package. • • • • • • Notebook Systems and I/O Power Networking Systems Digital Set Top Boxes Personal Video Recorders Flat Panel Television and Monitors Distributed Power Systems “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION Efficiency VO=3.3V VIN 100 22 IN VCC R4 49.9k 30 AAM BST 16-19 SW NB648 R5 10k BG 25 R3 100k FB EN/SYNC PG GND 9-15,20 VIN=12V 95 23 VOUT D1 B140 Optional R1 40.2k 24 R2 32.4k 5-8 26 C8 NS ON OFF EFFICIENCY(%) 27-29 90 VIN=19V 85 80 75 70 65 60 0 1 2 3 4 5 6 7 8 9 IO(A) NB648 Rev. 0.9 12/10/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) NB648EQJ (5x6mm) QFN30 N648EQJ –20°C to +85°C For Tape & Reel, add suffix –Z (eg. NB648EQJ–Z). For RoHS compliant packaging, add suffix –LF (eg.NB648EQJ–LF–Z) AAM IN IN IN EN/SYNC PG FB PACKAGE REFERENCE 30 29 28 27 26 25 24 NC 1 23 BST NC 2 22 Vcc NC 3 21 NC NC 4 20 GND BG 5 19 SW BG 6 18 SW BG 7 17 SW BG 8 16 SW 11 12 13 GND GND GND GND ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN .......................................28V VSW ......................................–0.3V to VIN + 0.3V VBS ..................................................... VSW + 6V All Other Pins................................ –0.3V to +6V (2) Continuous Power Dissipation (TA = +25°C) ………………………………..……………..3.79W Junction Temperature.............................. 150°C Lead Temperature ................................... 260°C Storage Temperature.............. –65°C to +150°C Recommended Operating Conditions (3) Supply Voltage VIN .......................... 4.5V to 25V Output Voltage VOUT........................ 0.8V to 15V Operating Junct. Temp (TJ)..... –20°C to +125°C NB648 Rev. 0.9 12/10/2013 14 15 GND 10 GND 9 GND SW Thermal Resistance (4) θJA θJC 5x6mm QFN30....................... 33 ....... 7.... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ELECTRICAL CHARACTERISTICS VIN = 12V, TA = +25°C, unless otherwise noted. Parameters Symbol Supply Current (Shutdown) IIN Supply Current (Quiescent) (5) HS Switch On Resistance (5) LS Switch On Resistance IIN HSRDS-ON LSRDS-ON Switch Leakage SW LKG (5) Current Limit Oscillator Frequency Maximum Duty Cycle ILIMIT FSW DMAX Sync Frequency Range Feedback Voltage Feedback Current EN/SYNC Input Low Voltage EN/SYNC Input High Voltage FSYNC VFB IFB VILEN VIHEN EN Input Current IEN EN Turn Off Delay Power Good Rising Threshold Power Good Falling Threshold Power Good Delay Power Good Sink Current Capability Power Good Leakage Current VIN Under Voltage Lockout Threshold Rising VIN Under Voltage Lockout Threshold Hysteresis VCC Regulator VCC Load Regulation Thermal Shutdown Condition Min VEN = 0V VEN = 2V, VFB = 1V VEN = 0V, VSW = 0V or 12V VFB = 0.75V VFB = 700mV 9.5 450 85 0.3 788 VFB = 800mV Max Units 0 1 μA 0.7 50 8 1 mA mΩ mΩ 10 200 nA 730 A kHz % 580 90 808 10 2 828 100 0.4 2 VEN = 2V VEN = 0V ENTd-Off PGVth-Hi PGVth-Lo PGTd VPG Sink 4mA IPG_LEAK VPG = 3.3V INUVVth 3.8 INUVHYS 4.5 Icc=5mA MHz mV nA V V 2 0.1 μA 15 0.71 0.53 25 μsec V V μs 0.4 V 1 100 nA 4.0 4.2 V 880 VCC TSD Typ mV 5.5 5 150 % °C Note: 5) Guaranteed by design. NB648 Rev. 0.9 12/10/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PIN FUNCTIONS Pin # Name 1—4 5—8 NC BG 9—15, 21 GND Description No Connect. Low Side Gate Drive System Ground. This pin is the reference ground of the regulated output voltage. For this reason care must be taken in PCB layout. 16—19 Exposed Pad 22 SW Switch Output. Use wide PCB traces and multiple vias to make the connection. VCC 23 BST 24 FB 25 PG 26 EN/SYNC 27—29 IN 30 AAM Bias Supply. Decouple with 1µF capacitor. Bootstrap. A capacitor connected between SW and BS pins is required to form a floating supply across the high-side switch driver. Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. Power Good Output, the output of this pin is open drain. Power good threshold is 90% low to high and 70% high to low of regulation value. There is a 20μs delay to pull PG if the output voltage is lower than 10% of regulation value. EN=1 to enable the NB648. External clock can be applied to EN pin for changing switching frequency. For automatic start-up, connect EN pin to VIN with 100kΩ resistor. Supply Voltage. The NB648 operates from a +4.5V to +25V input rail. C1 is needed to decouple the input rail. Use wide PCB traces and multiple vias to make the connection. Connects to a voltage set by 2 resistor dividers forces NB648 into nonsynchronous mode when load is small. NB648 Rev. 0.9 12/10/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12.6V, VOUT = 3.3V, L = 1.5µH, TA = +25ºC, unless otherwise noted. Enable Supply Current vs. Input Voltage Disable Supply Current vs. Input Voltage 716 VCC Regulator Line Regulation 5.6 0.15 5.2 714 712 4.8 0.1 708 VCC (V) 710 0.05 706 704 10 20 INPUT VOLTAGE (V) -0.05 30 10 15 20 25 INPUT VOLTAGE (V) 10 8 6 4 2 0.2 0.4 0.6 0.8 Dmax Limit 10 Minimum on time Limit 1 0 1 0.1 0.05 Half Load -0.05 Full Load -0.15 5 NB648 Rev. 0.9 12/10/2013 20 25 30 10 15 20 25 INPUT VOLTAGE (V) 30 0.2 VIN =19V 0.1 0 VIN =12.6V -0.1 -0.2 -0.3 0 2 4 6 8 10 Efficiency 80 100 70 95 60 90 50 40 30 20 10 0 30 OUTPUT CURRENT(A) EFFICIENCY(%) CASE TEMPERATURE RISE(”C) 0.2 0 15 10 15 20 25 INPUT VOLTAGE (V) 0.3 Case Temperature vs. Output Current 0.15 -0.1 10 5 INPUT VOLTAGE (V) Line Regulation 0 5 0 Load Regulation 0.1 0 2.4 30 Operating Range DUTY CYCLE (%) NORMALIZED OUTPUT VOLTAGE(%) 5 100 OUTPUT VOLTAGE (V) PEAK CURRENT (A) 0 NORMALIZED OUTPUT VOLTAGE(%) 0 12 -0.2 3.6 2.8 Peak Current vs. Duty Cycle 0 4 3.2 0 702 700 4.4 VIN=12V VIN=19V 85 80 75 70 65 0 2 4 6 8 OUTPUT CURRENT(A) 10 60 0 1 2 3 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 5 6 7 8 9 IO(A) 5 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12.6V, VOUT = 3.3V, L = 1.5µH, TA = +25ºC, unless otherwise noted. Short Entry Enable Startup without Load Short Recovery VOUT 2V/div VOUT 2V/div VOUT 2V/div BG 5V/div BG 5V/div VEN 5V/div VSW 10V/div VSW 10V/div VSW 5V/div IINDUCTOR 10A/div IINDUCTOR 10A/div IINDUCTOR 1A/div 2ms/div Enable Startup with 8A Load VOUT 2V/div VEN 5V/div VSW 10V/div IINDUCTOR 10A/div 2ms/div Enable Shutdown without Load Enable Shutdown with 8A Load VOUT 2V/div VOUT 2V/div VEN 5V/div VEN 5V/div VSW 10V/div VSW 10V/div IINDUCTOR 1A/div IINDUCTOR 10A/div 2ms/div 400ms/div Load Transient Response Input Ripple Voltage Output Ripple Voltage IOUT=4A-8A, 1A/us IOUT=8A IOUT=8A VOUT 50mV/div VSW 10V/div IOUT 5A/div NB648 Rev. 0.9 12/10/2013 VOUT 500mV/div VOUT 20mV/div VSW 10V/div VSW 10V/div IINDUCTOR 10A/div IINDUCTOR 10A/div www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS BLOCK DIAGRAM IN + - VCC Regulator VCC RSEN Current Sense Amplifer Boost Regulator PGOOD MN3 Oscillator + HS Driver - PG Comparator + C1 Reference EN/SYNC 1MEG FB BS C1 1pF 50pF R1 Current Limit Comparator SW Comparator On Time Control Logic Control 400K + + - VCC LS Driver SDRV GND Error Amplifier AAM BG Figure 2—Function Block Diagram NB648 Rev. 0.9 12/10/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS OPERATION The NB648 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 8A continuous output current over a wide input supply range with excellent load and line regulation. The NB648 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The high-side power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, in 90% of one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off. Error Amplifier The error amplifier compares the FB pin voltage with the internal 0.808V reference (REF) and outputs a current proportional to the difference between the two. This output current is then used to charge or discharge the internal compensation network to form the COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. Internal Regulator Most of the internal circuitries are powered from the 5V internal regulator. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output decreases. Since this internal regulator provides the bias current for the bottom gate driver that requires significant amount of current depending upon the external MOSFET selection, a 1uF ceramic capacitor for decoupling purpose is required. Enable/Sync Control The NB648 has a dedicated Enable/Sync control pin (EN/SYNC). By pulling it high or low, the IC can be enabled and disabled by EN. Tie EN to VIN for automatic start up. To disable the part, EN must be pulled low for at least 5µs. NB648 Rev. 0.9 12/10/2013 The NB648 can be synchronized to external clock range from 300kHz up to 2MHz through the EN/SYNC pin. The internal clock rising edge is synchronized to the external clock rising edge. Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The NB648 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 4.0V while its falling threshold is a consistent 3.2V. Internal Soft-Start The soft-start is implemented to prevent the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) ramping up from 0V to 1.2V. When it is lower than the internal reference (REF), SS overrides REF so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control. Over-Current-Protection and Hiccup The NB648 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, output voltage starts to drop until FB is below the UnderVoltage (UV) threshold, typically 30% below the reference. Once a UV is triggered, the NB648 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-short to ground. The average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. The NB648 exits the hiccup mode once the over current condition is removed. Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than 150°C, it shuts down the whole chip. When the temperature is lower than its lower threshold, typically 140°C, the chip is enabled again. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M3, C4, L1 and C2 (Figure 2). If (VIN-VSW) is more than 5V, U2 will regulate M1 to maintain a 5V BST voltage across C4. SW Table 1—Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) 1.8 2.5 3.3 31.6 (1%) 31.6 (1%) 31.6 (1%) 25.5 (1%) 14.7(1%) 10(1%) 5 31.6 (1%) 6.04 (1%) Selecting the Inductor A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor DC resistance should be less than 15mΩ. For most designs, the inductance value can be derived from the following equation. L= VOUT × ( VIN − VOUT ) VIN × ΔIL × f OSC Figure 2—Internal Bootstrap Charging Circuit Where ΔIL is the inductor ripple current. Startup and Shutdown If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. Choose inductor current to be approximately 30% if the maximum load current, 8A. The maximum inductor peak current is: Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. Setting the Output Voltage The external resistor divider is used to set the output voltage (see the schematic on front page). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Figure 1). Choose R1 to be around 31.6kΩ for optimal transient response. R2 is then given by: R2 = NB648 Rev. 0.9 12/10/2013 R1 VOUT −1 0.808V IL(MAX ) = ILOAD + ΔIL 2 Under light load conditions below 100mA, larger inductance is recommended for improved efficiency. Selecting the Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 22µF capacitor is sufficient. Since the input capacitor (C1) absorbs the input switching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. ⎞ ⎟ ⎟ ⎠ 9 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS The worse case condition occurs at VIN =2VOUT, where: IC1 = ILOAD 2 For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: ΔVIN = ⎛ ILOAD V V × OUT × ⎜1 − OUT fS × C1 VIN ⎜⎝ VIN ⎞ ⎟⎟ ⎠ Selecting the Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT = VOUT ⎛ V × ⎜⎜1 − OUT fS × L ⎝ VIN The characteristics of the output capacitor also affect the stability of the regulation system. The NB648 can be optimized for a wide range of capacitance and ESR values. External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external BST diode are: z VOUT is 5V or 3.3V; and z Duty cycle is high: D= VOUT >65% VIN In these cases, an external BST diode is recommended from the output of the voltage regulator to BST pin, as shown in Fig.3 External BST Diode IN4148 BST CBST NB648 SW L + COUT 5V or 3.3V Figure 3—Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1~1µF. ⎞ ⎞ ⎛ 1 ⎟ ⎟⎟ × ⎜ R ESR + ⎜ 8 × f S × C2 ⎟⎠ ⎠ ⎝ Where L is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: ΔVOUT = ⎞ ⎛ V × ⎜⎜1 − OUT ⎟⎟ VIN ⎠ × L × C2 ⎝ VOUT 8 × fS 2 In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ΔVOUT = NB648 Rev. 0.9 12/10/2013 VOUT ⎛ V × ⎜⎜ 1 − OUT fS × L ⎝ VIN ⎞ ⎟⎟ × R ESR ⎠ www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PCB Layout PCB layout is very important to achieve stable operation. Please follow these guidelines and take Figure 4 for references. The high current paths (GND, IN and SW) should be placed very close to the device with short, direct and wide traces. The input capacitor needs to be as close as possible to the IN and GND pins. The external feedback resistors should be placed next to the FB pin. Keep the switching node SW short and away from the feedback network. Inner 1 Top Layer Inner 2 Bottom Layer Figure 4—PCB Layout NB648 Rev. 0.9 12/10/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 NB648 – 8A, 25V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PACKAGE INFORMATION 5x6mm QFN30 NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. NB648 Rev. 0.9 12/10/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12
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