2N6338, 2N6341
High-Power NPN Silicon
Transistors
. . . designed for use in industrial−military power amplifier and
switching circuit applications.
• High Collector−Emitter Sustaining Voltage −
VCEO(sus) = 100 Vdc (Min) − 2N6338
= 150 Vdc (Min) − 2N6341
• High DC Current Gain −
hFE = 30 − 120 @ IC = 10 Adc
= 12 (Min) @ IC = 25 Adc
• Low Collector−Emitter Saturation Voltage −
VCE(sat) = 1.0 Vdc (Max) @ IC = 10 Adc
• Fast Switching Times @ IC = 10 Adc
tr = 0.3 ms (Max)
ts = 1.0 ms (Max)
tf = 0.25 ms (Max)
• Pb−Free Packages are Available
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25 AMPERE
POWER TRANSISTORS
NPN SILICON
*MAXIMUM RATINGS
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Emitter−Base Voltage
Symbol
2N6338
2N6341
Unit
VCB
120
180
Vdc
VCEO
100
150
Vdc
VEB
Collector Current
Continuous
Peak
6.0
IC
Base Current
IB
Total Device Dissipation
@ TC = 25_C
Derate above 25_C
PD
Operating and Storage
Junction
Temperature Range
TJ, Tstg
TO−204AA
CASE 1−07
Vdc
Adc
25
50
10
Adc
200
1.14
W
W/°C
– 65 to + 200
_C
ORDERING INFORMATION
Device
Package
Shipping
2N6338
TO−204AA
100 Units / Tray
2N6338G
TO−204AA
(Pb−Free)
100 Units / Tray
2N6341
TO−204AA
100 Units / Tray
2N6341G
TO−204AA
(Pb−Free)
100 Units / Tray
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
Symbol
Max
Unit
θJC
0.875
_C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
*Indicates JEDEC Registered Data.
© Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 12
1
Publication Order Number:
2N6338/D
2N6338, 2N6341
PD, POWER DISSIPATION (WATTS)
200
175
150
125
100
75
50
25
0
0
25
50
75
100
125
150
175
200
TC, CASE TEMPERATURE (°C)
Figure 1. Power Derating
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*ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
VCEO(sus)
100
150
−
−
Vdc
−
−
50
50
−
−
10
1.0
μAdc
mAdc
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (1)
(IC = 50 mAdc, IB = 0)
2N6338
2N6341
Collector Cutoff Current
(VCE = 50 Vdc, IB = 0)
(VCE = 75 Vdc, IB = 0)
2N6338
2N6341
ICEO
μAdc
Collector Cutoff Current
(VCE = Rated VCEO, VEB(off) = 1.5 Vdc)
(VCE = Rated VCEO, VEB(off) = 1.5 Vdc, TC = 150_C)
ICEX
Collector Cutoff Current (VCB = Rated VCB, IE = 0)
ICBO
−
10
μAdc
Emitter Cutoff Current (VBE = 6.0 Vdc, IC = 0)
IEBO
−
100
μAdc
50
30
12
−
120
−
−
−
1.0
1.8
−
−
1.8
2.5
ON CHARACTERISTICS (1)
DC Current Gain)
(IC = 0.5 Adc, VCE = 2.0 Vdc)
(IC = 10 Adc, VCE = 2.0 Vdc)
(IC = 25 Adc, VCE = 2.0 Vdc)
hFE
−
Collector Emitter Saturation Voltage
(IC = 10 Adc, IB = 1.0 Adc)
(IC = 25 Adc, IB = 2.5 Adc)
VCE(sat)
Vdc
Base−Emitter Saturation Voltage
(IC = 10 Adc, IB = 1.0 Adc)
(IC = 25 Adc, IB = 2.5 Adc)
VBE(sat)
Base−Emitter On Voltage (IC = 10 Adc, VCE = 2.0 Vdc)
VBE(on)
−
1.8
Vdc
fT
40
−
MHz
Cob
−
300
pF
Rise Time (VCC ≈ 80 Vdc, IC = 10Adc, IB1 = 1.0 Adc, VBE(off) = 6.0 Vdc)
tr
−
0.3
μs
Storage Time (VCC ≈ 80 Vdc, IC = 10 Adc, IB1 = IB2 = 1.0 Adc)
ts
−
1.0
μs
Fall Time (VCC ≈ 80 Vdc, IC = 10 Adc, IB1 = IB2 = 1.0 Adc)
tf
−
0.25
μs
Vdc
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product (2) (IC = 1.0 Adc, VCE = 10 Vdc, ftest = 10 MHz)
Output Capacitance (VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
SWITCHING CHARACTERISTICS
*Indicates JEDEC Registered Data.
(1) Pulse Test: Pulse Width v 300 μs, Duty Cycle v 2.0%.
(2) fT = |hfe| • ftest.
http://onsemi.com
2
2N6338, 2N6341
1000
700
VCC
+ 80 V
RB
10 OHMS
SCOPE
0
1N4933
- 9.0 V
tr, tf v 10 ns
DUTY CYCLE = 1.0%
td @ VBE(off) = 6.0 V
300
t, TIME (ns)
10 μs
+ 11 V
200
tr
100
70
50
30
- 5.0 V
20
NOTE: For information on Figures 3 and 6, RB and RC were
varied to obtain desired test conditions.
10
0.3
5.0 7.0 10
0.5 0.7 1.0
2.0 3.0
IC, COLLECTOR CURRENT (AMP)
r(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE (NORMALIZED)
Figure 2. Switching Time Test Circuit
1.0
0.7
0.5
D = 0.5
0.3
0.2
VCC = 80 V
IC/IB = 10
TJ = 25°C
500
RC
8.0 OHMS
20
30
Figure 3. Turn−On Time
0.2
0.1
0.1
P(pk)
θJC = r(t) θJC
θJC = 0.875°C/W MAX
0.05
0.07
0.05
0.02
t1
0.01
0.03
0.02
t2
SINGLE PULSE
0.01
0.01
0.02 0.03
0.05
DUTY CYCLE, D = t1/t2
0.1
0.2 0.3
0.5
1.0
2.0 3.0 5.0
t, TIME (ms)
10
20
30
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) θJC(t)
50
100
200 300
500
1000
Figure 4. Thermal Response
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC−VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 5 is based on TJ(pk) = 200_C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
v 200_C. TJ(pk) may be calculated from the data in
Figure 4. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
IC, COLLECTOR CURRENT (AMP)
100
50
200 μs
20
10
5.0
2.0
1.0
0.5
0.2
0.1
0.05
0.02
0.01
2.0
1.0 ms
dc
5.0 ms
TJ = 200°C
BONDING WIRE LIMITED
THERMALLY LIMITED @
TC = 25°C (SINGLE PULSE)
SECOND BREAKDOWN
LIMITED CURVES APPLY
BELOW RATED VCEO
3.0 5.0
7.0 10
20
30
2N6338
2N6341
50
70
100
200
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 5. Active Region Safe Operating Area
http://onsemi.com
3
2N6338, 2N6341
5.0
ts
t, TIME (s)
μ
1.0
VCC = 80 V
IB1 = IB2
IC/IB = 10
TJ = 25°C
3000
0.7
0.5
0.3
0.2
tf
0.1
0.07
0.05
0.3
0.5 0.7
1.0
2.0 3.0
5.0
10
IC, COLLECTOR CURRENT (AMP)
20
1000
700
500
300
200
100
70
50
0.1
30
TJ = 25°C
Cib
2000
C, CAPACITANCE (pF)
3.0
2.0
5000
Figure 6. Turn−Off Time
Cob
0.2
0.5
1.0
2.0
5.0 10
20
VR, REVERSE VOLTAGE (VOLTS)
Figure 7. Capacitance
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4
50
100
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 1−07
ISSUE Z
DATE 05/18/1988
SCALE 1:1
A
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO-204AA OUTLINE SHALL APPLY.
C
−T−
E
D
K
2 PL
0.13 (0.005)
U
T Q
M
M
Y
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
M
−Y−
L
V
SEATING
PLANE
2
H
G
B
M
T Y
1
−Q−
0.13 (0.005)
INCHES
MIN
MAX
1.550 REF
--1.050
0.250
0.335
0.038
0.043
0.055
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
--0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
39.37 REF
--26.67
6.35
8.51
0.97
1.09
1.40
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
--21.08
3.84
4.19
30.15 BSC
3.33
4.77
M
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
STYLE 2:
PIN 1. BASE
2. COLLECTOR
CASE: EMITTER
STYLE 3:
PIN 1. GATE
2. SOURCE
CASE: DRAIN
STYLE 4:
PIN 1. GROUND
2. INPUT
CASE: OUTPUT
STYLE 6:
PIN 1. GATE
2. EMITTER
CASE: COLLECTOR
STYLE 7:
PIN 1. ANODE
2. OPEN
CASE: CATHODE
STYLE 8:
PIN 1. CATHODE #1
2. CATHODE #2
CASE: ANODE
STYLE 9:
PIN 1. ANODE #1
2. ANODE #2
CASE: CATHODE
STYLE 5:
PIN 1. CATHODE
2. EXTERNAL TRIP/DELAY
CASE: ANODE
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
© Semiconductor Components Industries, LLC, 2000
January, 2000 − Rev. 07Z
1
Case Outline Number:
1
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