2N7002K

2N7002K, 2V7002K Small Signal MOSFET 60 V, 380 mA, Single, N−Channel, SOT−23 Features • • • • • ESD Protected Low RDS(on) Surface Mount Package 2V Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com ID MAX 1.6 W @ 10 V 60 V 380 mA 2.5 W @ 4.5 V SIMPLIFIED SCHEMATIC Applications • • • • RDS(on) MAX V(BR)DSS Low Side Load Switch Level Shift Circuits DC−DC Converter Portable Applications i.e. DSC, PDA, Cell Phone, etc. Gate 1 3 Drain MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Rating Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage VGS ±20 V Drain Current (Note 1) Steady State 1 sq in Pad Drain Current (Note 2) Steady State Minimum Pad (Top View) ID TA = 25°C TA = 85°C mA 380 270 3 Power Dissipation Steady State 1 sq in Pad Steady State Minimum Pad mA 320 230 3 1 2 PD mW 420 300 Pulsed Drain Current (tp = 10 ms) IDM 5.0 A Operating Junction and Storage Temperature Range TJ, TSTG −55 to +150 °C Source Current (Body Diode) IS 300 mA Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C ESD 2000 V Gate−Source ESD Rating (HBM, Method 3015) MARKING DIAGRAM & PIN ASSIGNMENT Drain ID TA = 25°C TA = 85°C 2 Source Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted on FR4 board using 1 sq in pad size with 1 oz Cu. 2. Surface−mounted on FR4 board using 0.08 sq in pad size with 1 oz Cu. SOT−23 CASE 318 STYLE 21 704 MG G 1 2 Gate Source 704 = Specific Device Code* M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Specific Device Code, Date Code or overbar orientation and/or location may vary depending upon manufacturing location. This is a representation only and actual devices may not match this drawing exactly. ORDERING INFORMATION Package Shipping† 2N7002KT1G SOT−23 (Pb−Free) 3000 / Tape & Reel 2V7002KT1G SOT−23 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2007 October, 2016 − Rev. 15 1 Publication Order Number: 2N7002K/D 2N7002K, 2V7002K THERMAL CHARACTERISTICS Characteristic Junction−to−Ambient − Steady State (Note 3) Symbol Max Unit RqJA 300 °C/W Junction−to−Ambient − t ≤ 5 s (Note 3) 92 Junction−to−Ambient − Steady State (Note 4) 417 Junction−to−Ambient − t ≤ 5 s (Note 4) 154 3. Surface−mounted on FR4 board using 1 sq in pad size with 1 oz Cu. 4. Surface−mounted on FR4 board using 0.08 sq in pad size with 1 oz Cu. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 60 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS 71 IGSS mV/°C mA TJ = 25°C 1 TJ = 125°C 10 TJ = 25°C 100 nA VDS = 0 V, VGS = ±20 V ±10 mA VDS = 0 V, VGS = ±10 V 450 nA VDS = 0 V, VGS = ±5.0 V 150 nA VGS = 0 V, VDS = 60 V VGS = 0 V, VDS = 50 V Gate−to−Source Leakage Current V ON CHARACTERISTICS (Note 5) Gate Threshold Voltage VGS(TH) Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) Forward Transconductance gFS VGS = VDS, ID = 250 mA 1.0 2.3 4.0 V mV/°C VGS = 10 V, ID = 500 mA 1.19 1.6 VGS = 4.5 V, ID = 200 mA 1.33 2.5 VDS = 5 V, ID = 200 mA 530 W mS CHARGES AND CAPACITANCES CISS Input Capacitance Output Capacitance COSS Reverse Transfer Capacitance CRSS Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD VGS = 0 V, f = 1 MHz, VDS = 20 V 24.5 45 4.2 8.0 2.2 5.0 nC 0.7 VGS = 4.5 V, VDS = 10 V; ID = 200 mA pF 0.1 0.3 0.1 SWITCHING CHARACTERISTICS, VGS = V (Note 6) Turn−On Delay Time td(ON) Rise Time Turn−Off Delay Time tr td(OFF) Fall Time ns 12.2 VGS = 10 V, VDD = 25 V, ID = 500 mA, RG = 25 W tf 9.0 55.8 29 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 200 mA TJ = 25°C 0.8 TJ = 85°C 0.7 1.2 V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2% 6. Switching characteristics are independent of operating junction temperatures www.onsemi.com 2 2N7002K, 2V7002K TYPICAL CHARACTERISTICS 9.0 V 8.0 V 7.0 V 6.0 V 1.2 1.2 5.0 V 4.5 V VGS = 10 V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 1.6 4.0 V 3.5 V 0.8 3.0 V 0.4 0.8 TJ = 25°C 0.4 2.5 V 0 2 4 6 0 4 6 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics VGS = 4.5 V TJ = 125°C 2.4 TJ = 85°C TJ = 25°C 2.0 1.6 TJ = −55°C 1.2 0.8 0.4 0 0 2 VGS, GATE−TO−SOURCE VOLTAGE (V) 3.2 2.8 TJ = −55°C VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 3.2 VGS = 10 V 2.8 2.4 TJ = 125°C 2.0 TJ = 85°C 1.6 TJ = 25°C 1.2 TJ = −55°C 0.8 0.4 0 0 0.2 0.4 0.6 0.8 1.0 1.2 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Drain Current and Temperature Figure 4. On−Resistance vs. Drain Current and Temperature 2.4 2.2 ID = 0.2 A 2.0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) TJ = 125°C 0 ID = 500 mA 1.6 ID = 200 mA 1.2 0.8 4 6 8 VGS = 4.5 V 10 VGS = 10 V 1.4 1.0 0.6 −50 0.4 2 1.8 −25 0 25 50 75 100 125 VGS, GATE−TO−SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 5. On−Resistance vs. Gate−to−Source Voltage Figure 6. On−Resistance Variation with Temperature www.onsemi.com 3 150 2N7002K, 2V7002K TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) 30 C, CAPACITANCE (pF) Ciss 20 TJ = 25°C VGS = 0 V Coss 10 Crss 0 0 4 8 12 16 TJ = 25°C ID = 0.2 A 4 3 2 1 0 0 20 0.2 0.4 0.6 0.8 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge VGS(TH), THRESHOLD VOLTAGE (V) 10 VGS = 0 V IS, SOURCE CURRENT (A) 5 1 TJ = 85°C TJ = 25°C 0.1 0.01 0.4 0.6 0.8 1.0 1.2 2.5 2.4 ID = 250 mA 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 −50 −25 0 25 50 75 100 125 VSD, SOURCE−TO−DRAIN VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 9. Diode Forward Voltage vs. Current Figure 10. Threshold Voltage with Temperature www.onsemi.com 4 150 2N7002K, 2V7002K TYPICAL CHARACTERISTICS RqJC(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE 1000 Duty Cycle = 0.5 100 10 0.2 0.1 0.05 0.02 0.01 1 SINGLE PULSE 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 10 100 1000 t, PULSE TIME (s) Figure 11. Thermal Response − 1 sq in pad RqJC(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE 1000 Duty Cycle = 0.5 100 10 0.2 0.1 0.05 0.02 0.01 1 SINGLE PULSE 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 t, PULSE TIME (s) Figure 12. Thermal Response − minimum pad www.onsemi.com 5 2N7002K, 2V7002K PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AR D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 0.25 3 E 1 2 T HE DIM A A1 b c D E e L L1 HE T L 3X b L1 VIEW C e TOP VIEW A A1 SIDE VIEW c SEE VIEW C MIN 0.89 0.01 0.37 0.08 2.80 1.20 1.78 0.30 0.35 2.10 0° MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.14 0.20 2.90 3.04 1.30 1.40 1.90 2.04 0.43 0.55 0.54 0.69 2.40 2.64 −−− 10 ° MIN 0.035 0.000 0.015 0.003 0.110 0.047 0.070 0.012 0.014 0.083 0° INCHES NOM 0.039 0.002 0.017 0.006 0.114 0.051 0.075 0.017 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.008 0.120 0.055 0.080 0.022 0.027 0.104 10° STYLE 21: PIN 1. GATE 2. SOURCE 3. DRAIN END VIEW RECOMMENDED SOLDERING FOOTPRINT 3X 2.90 3X 0.90 0.95 PITCH 0.80 DIMENSIONS: MILLIMETERS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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