88-00151-00

SN820X Family Data Sheet Wi-Fi Network Controller Module Revision History Revision 0.1 0.5 0.6 0.7 1.0 1.1 Date 12/09/2012 02/03/2012 02/20/2012 04/20/2012 08/27/2012 01/23/2013 Author Y. Fang Y. Fang N. Nagayama J. Gregus Y. Fang Y. Fang 1.2 1.3 05/30/2013 09/20/2013 R. Willett R Willett Changed specs in Table 1 for Pin 2, 3, 4, and 30 1.4 11/07/13 R. Willett Added Acronyms list; Revised Fig. 1.1, 2.1; revised content and renumbered tables in Chap. 3: added Chapters 4 - 10 and reorganized information; amended regulatory information. 1.5 11/11/13 R Willett Revised Operating Temperature specification on page 6; revised Table 5.1 “Absolute Maximum Ratings,” page 38. 2.0 11/25/13 R Willett Removed references to SyChip; updated copyright, deleted Chap 11, “Disclaimer;” 2.1 12/17/13 R. Willett Added text describing module software download in Chapter 1, page 7. 2.2 3.0 02/28/14 07/25/14 R. Willett R. Willett Revised text on page 42, Table 9.2. 3.1 3.2 8/22/14 3/21/16 R. Willett R. Willett Revised Table 5.1 to include VDD, VBAT and VDD_WiFi. 3.3 3.4 5/24/17 1/31/18 R. Willett R. Willett Updated Copyright and version number on page footer. Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.3 1/31/18 Change Description Initial version Preliminary version Update performance data and adjusted table format Update CE compliance information Formal release Added Power Rail Current specification and Standby Mode Current specification Separated Data Sheet/User Manual and created new data sheet combining SN8200/8200 UFL and SN8205/8205 UFL Reformatted document to new Murata visual identity; Added Anatel certification, page 39 Deleted minimum values for Receive Sensitivity on Table 4.1.1 page 34, Table 4.2.1 page 35, and Table 4.3.1 page 36; updated Murata address on page 42. Updated Transmit Out Power in Table 4.3.1, page 36, and Table 4.1.1, page 34, Transmit Output Power.4 www.murata.com This page intentionally left blank. Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.3 1/31/18 Page 2 page Right www.murata.com Table of Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Model SN820X Module Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Model SN820X Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 6 7 7 7 2 Mechanical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Module Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Top and Side View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 PCB Footprint (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Typical Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 GPIO Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Output driving current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Output Voltage Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 I2C Interface Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 I2S SPI Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7 12-Bit ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 DAC Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 13 14 15 17 20 24 31 4 RF Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 DC/RF Characteristics for IEEE 802.11b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 DC/RF Characteristics for IEEE 802.11g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3 DC/RF Characteristics for IEEE 802.11n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 35 36 37 5 Environmental Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.1 Absolute Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.2 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 6 Regulatory Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 7 Packing and Marking Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 7.1 Carrier Tape Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 7.2 Module Marking Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 8 RoHS Declaration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 9 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 10 Technical Support Contact . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 3 of 42 www.murata.com List of Figures FIGURE 1.1: SN820X Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 FIGURE 2.1: SN820X and SN820XUFL Top and Side View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 FIGURE 2.2: Detailed Pad Dimensions (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 FIGURE 3.1: SN8200/8200UFL I2C bus AC Waveforms and Measurement Circuit . . . . . . . . . . . . . 18 FIGURE 3.2: SN8205/8205UFL I2C bus AC Waveforms and Measurement Circuit . . . . . . . . . . . . . 19 FIGURE 3.3: SPI Timing Diagram - Slave Mode and CPHA = 0, SN8200/8200UFL and SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 FIGURE 3.4: SPI Timing Diagram - Slave Mode and CPHA = 1(1)SPI Timing Diagram - Slave Mode and CPHA = 0, SN8200/8200UFL and SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . 23 FIGURE 3.5: SPI Timing Diagram - Master Mode SN8200/8200UFL and SN8205/8205UFL . . . . . 24 FIGURE 3.6: ADC Accuracy Characteristics, SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 FIGURE 3.7: ADC Accuracy Characteristics, SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 FIGURE 3.8: Typical Connection Diagram Using the ADC, SN8205/8205UFL . . . . . . . . . . . . . . . . 30 FIGURE 7.1 SN820X/820XUFL Carrier Tape Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 FIGURE 7.2 Typical SN820X/820XUFL module marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 4 of 42 www.murata.com List of Tables TABLE 1.1: SN820X WiFi Network Controller Module Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 TABLE 2.1: Module Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 TABLE 2.2: Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 TABLE 2.3: Signal Pinouts for SN820X/820XUFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 TABLE 3.1.1: TABLE 3.2.1: TABLE 3.2.2: TABLE 3.3.1: TABLE 3.3.2: TABLE 3.3.3: TABLE 3.4.1: TABLE 3.4.2: TABLE 3.5.1: TABLE 3.5.2: TABLE 3.5.3: TABLE 3.5.4: TABLE 3.6.1: TABLE 3.6.2: TABLE 3.7.1: TABLE 3.7.2: TABLE 3.7.3: TABLE 3.7.4: TABLE 3.7.5: TABLE 3.7.6: TABLE 3.8.1: TABLE 3.8.2: SN8200/SN8200UFL and SN8205/SN8205 UFL Typical Power Consumption . . . . . Digital I/O Characteristics SN8200/SN8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital I/O Characteristics, SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage Characteristics, SN820X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current Characteristics, SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current Characteristics, SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Voltage Characteristics, SN8200/SN8200UFL . . . . . . . . . . . . . . . . . . . . . . . . Output Voltage Characteristics, SN8205/SN8205UFL . . . . . . . . . . . . . . . . . . . . . . . . I2C Characteristics SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C Characteristics SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCL Frequency (fPCLK1= 36 MHz., VDD = 3.3 V)(1)(2) SN8200/8200UFL . . . . . . . SCL Frequency (fPCLK1= 30 MHz., VDD = 3.3 V)(1)(2) SN8205/8205UFL . . . . . . . SPI Characteristics SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SPI Characteristics SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC Characteristics, SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAIN max for fADC = 14 MHz(1), SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . ADC accuracy, SN8200/8200UFL - limited test conditions(1)(2) . . . . . . . . . . . . . . . . ADC Accuracy (1) (2) (3), SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC Characteristics, SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC Accuracy, SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DAC Characteristics, SN8200/8200UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DAC Characteristic, SN8205/8205UFL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 14 14 15 15 15 16 17 18 19 20 20 21 23 25 25 26 27 28 30 32 TABLE 4.1.1: RF Characteristics for IEEE 802.11b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 TABLE 4.2.1: RF Characteristics for IEEE 802.11g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 TABLE 4.3.1: RF Characteristics for IEEE 802.11n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 TABLE 5.1: Absolute Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 TABLE 5.2: Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 TABLE 6.1: Regulatory Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 TABLE 9.1: SN8200/8200UFL Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 TABLE 9.2: SN8205/8205UFL Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 5 of 42 www.murata.com 1 Introduction 1.1 Model SN820X Module Family The SN820X Module Family is a portfolio of low power, self-contained, embedded wireless module solutions that address the connectivity demands of M2M applications. These products integrate a micro-controller, a Wi-Fi BB/MAC/RF IC, an RF front end and two clocks into small form factor modules. The module family includes 2 different micro-controller options as shown below. The modules can also be purchased with either a standard on-board chip antenna or a U.FL connector where remote antenna flexibility is required. TABLE 1.1: SN820X WiFi Network Controller Module Family Model # P/N Built-in STM RAM Size Flash Size SN8200 88-00151-00 ARM Cortex M3 96KB 768KB SN8200UFL 88-00151-02 ARM Cortex M3 96KB 768KB SN8205 88-00158-00 ARM Cortex M3 128KB 1024KB SN8205UFL 88-00158-02 ARM Cortex M3 128KB 1024KB 1.2 Model SN820X Module Features • • • • • • • • • • • • • 2.4 GHz IEEE 802.11 b/g/n radio technology Dimensions: 30.5 × 19.4 × 2.8 mm Antenna configurations: On-board antenna or U.FL connector Transmitter power: +18 dBm @80211b Receiver sensitivity: -96 dBm MCU: ARM Cortex-M3 Serial Interface Options: UART, SPI Peripheral Interface Options: ADC, DAC, I2C, I2S, GPIO Operating temperature range: -40 ºC to +85 ºC RoHS2 compliant MSL Level 3 FCC/IC certified and CE compliant Compatible with Broadcom WICED™ SDK Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.3 1/31/18 Page 6 of 42 www.murata.com 1.3 Block Diagram VBAT VDD VDD_WIFI_IN 16 MHz UART SPI I2C 12S ADC DAC GPIO ARM Cortex M3 for on-board (antenna version) 26 MHz TCXO ANT Wi-Fi SoC (802.11b/g/n SPDT LPF for U.FL (connector version) 32 KHz (optional) WIFI_SLEEP _CLK_IN (optional) FIGURE 1.1: SN820X Block Diagram Murata offers Serial-to-WiFi and EZ Web Wizzard software for SN820x in the SN820x EVK+. The modules are also compatible with Broadcom WICED™ SDK. The customer can obtain the WICED™ SDK from Broadcom directly. The modules are delivered with no application firmware pre-installed. Finalize the firmware image, and then download the firmware to the module. For more details, please see reference [4]. 1.4 Acronyms - ADC Analog to Digital Converter DAC Digital to Analog Converter GPIO General-Purpose Input-Output I2C Intelligent Interface Controller I2S Integrated Interchip Sound ISM Industrial, Scientific and Medical MAC Medium Access Control MSL Moisture Sensitivity Level PER Packet Error Rate ROHS Restriction of Hazardous Substances SPI Serial Peripheral Interface UART Universal Asynchronous Receiver-Transmitter 1.5 References [1] STM32F103RF Data Sheet, ST Microelectronics [2] STM32F205RG, Data Sheet, ST Microelectronics [3] SN820X Wi-Fi Network Controller Module Family User Manual, Murata [4] AN_SN8200_002 SN820X Firmware Downloading Application Note, Murata Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.3 1/31/18 Page 7 of 42 www.murata.com 2 Mechanical Specifications 2.1 Module Dimensions TABLE 2.1: Module Dimensions Parameter Dimensions (LxWxH) Dimension tolerances (LxWxH) Typical Units 30.5 x 19.4 x 2.8 mm ±0.2 mm 2.2 Top and Side View SN820X Top and Side View SN820XUFL Top and Side View FIGURE 2.1: SN820X and SN820XUFL Top and Side View Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 8 of 42 www.murata.com 2.3 PCB Footprint (top view) FIGURE 2.2: Detailed Pad Dimensions (top view) Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 9 of 42 www.murata.com 2.4 Pinouts TABLE 2.2: Pinouts Pin # Pin Name I/O - Description 1 GND Ground 2 OSC32_IN I/O Optional precision 32.768 KHz slow clock input. No connect if not used 3 OSC32_OUT I/O No connect 4 WIFI_VDD_EN I/O No connect 5 ADC3 I/O General purpose I/O or ADC3 6 ADC4 I/O General purpose I/O or ADC4 7 ADC5 I/O General purpose I/O or ADC5 8 VDD PI DC supply for MCU and I/O 9 ADC6 I/O General purpose I/O or ADC6 10 DAC2 I/O General purpose I/O or DAC2 11 DAC1 I/O General purpose I/O or DAC1 12 ADC1 I/O General purpose I/O or ADC1 13 Reserved - No connect 14 Reserved - No connect 15 GND - Ground 16 GND - Ground 17 GND - Ground 18 GND - Ground 19 GND - Ground 20 GND - Ground 21 GND - Ground 22 GND - Ground 23 GND - Ground 24 GND - Ground 25 GND - Ground 26 VDD_WIFI_IN 27 Reserved - No connect 28 Reserved - No connect 29 Reserved - No connect 30 WIFI_SLEEP_CLK_IN I Optional precision 32.768 kHz Wi-Fi sleep clock input. Tie to GND if not used 31 GND - Ground 32 UART_TX I/O General purpose I/O or UART_TX 33 UART_RX I/O General purpose I/O or UART_RX 34 UART_CTS I/O General purpose I/O or UART_CTS 35 UART_RTS I/O General purpose I/O or UART_RTS 36 JTMS I/O General purpose I/O or JTMS Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 PI Page 10 of 42 Wi-Fi power supply www.murata.com TABLE 2.2: Pinouts (Continued) 37 JTDI/SPI_NSS Pin # Pin Name I/O General purpose I/O or JTDI or SPI_NSS I/O I/O Description 38 JTCK 39 Ground 40 JTDO/SPI_SCK I/O General purpose I/O or JTDO or SPI_SCK 41 JTRST/SPI_MISO I/O General purpose I/O or JTRST or SPI_MISO - General purpose I/O or JTCK Ground 42 SPI_MOSI I/O General purpose I/O or SPI_MOSI 43 I2C_SCL I/O General purpose I/O or I2C_SCL 44 I2C_SDA I/O General purpose I/O or I2C_SDA 45 BOOT - Normal operation if connected to ground at power up. 46 ADC2 I/O 47 MICRO_RST_N 48 VBAT PI 49 GND - Ground 50 GND - Ground 51 GND - Ground 52 GND - Ground 53 GND - Ground 54 GND - Ground 55 GND - Ground 56 GND - Ground 57 GND - Ground 58 GND - Ground 59 GND - Ground 60 GND - Ground 61 Reserved - No connect 62 GND - Ground Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 I Page 11 of 42 General purpose I/O or ADC2 Module reset Power supply for backup circuitry when VDD is not present www.murata.com TABLE 2.3: Signal Pinouts for SN820X/820XUFL Pin 5 ADC3 Pin name STM32F103RF/STM32F205RG pin PA0/WKUP/ADC123_0/USART2_CTS TIM2_CH1_ETR/ TIM5_CH1 / TIM8_ETR 6 ADC4 PA1/ADC123_1/USART2_RTS TIM2_CH2 / TIM5_CH2 7 ADC5 PA2/ADC123_2/USART2_TX TIM2_CH3 / TIM5_CH3 / TIM9_CH1 9 ADC6 PA3/ADC123_3/USART2_RX TIM2_CH4 / TIM5_CH4 / TIM9_CH2 10 DAC2 PA4/ADC12_4/DAC1/USART2_CK/SPI1_NSS 11 DAC1 PA5/ADC12_5/DAC2/SPI1_SCK 12 ADC1 PA7/ADC12_7/SPI1_MOSI 32 UART_TX PA9/UART1_TX 33 UART_RX PA10/UART1_RX 34 UART_CTS PA11/UART1_CTS/USB2_DM/CAN_RX 35 UART_RTS PA12/UART1_RTS/USB2_DP/CAN_TX 36 JTMS PA13/JTMS/SWIO 37 JTDI/SPI_NSS PA15/JTDI/SPI3_NSS/I2S3_WS 38 JTCK PA14/JTCK/SWCLK 40 JTDO/SPI_SCK PB3/JTDO/SPI3_SCK/I2S3_CK 41 JTRST/SPI_MISO PB4/JTRST/SPI3_MISO 42 SPI_MOSI PB5/I2C1_SMBA/SPI3_MOSI/ I2S3_SD 43 I2C_SCL PB6/I2C1_SCL TIM4_CH1 44 I2C_SDA PB7/I2C1_SDA TIM4_CH2 46 ADC2 PA6/ADC12_6/SPI1_MISO Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 12 of 42 www.murata.com 3 DC Electrical Specifications The I/O pins from SN820X are based on the built-in STM32 microcontroller. The information shown in sections 3.2 through 3.8 is derived from the ST Microelectronics Data Sheet for user convenience. For original information, see reference [1] and [2] on page of References. 3.1 Typical Power Consumption TABLE 3.1.1: SN8200/SN8200UFL and SN8205/SN8205 UFL Typical Power Consumption Values Item 11b Condition Receive mode Min 11 Mbps Transmit mode (18 dBm/ 100% Duty Cycle) 11g Receive mode 54 Mbps Transmit mode (14.5 dBm/100% Duty Cycle) 11n Receive mode MCS7 Transmit mode (13.5 dBm/ 100% Duty Cycle) Typ Max Units 110 mA 370 mA 110 mA 290 mA 110 mA 280 mA Standby Mode with IEEE802.11 Power Save DTIM 1, Telnet session established and idling 3.15 mA Standby Mode with IEEE802.11 Power Save DTIM 3, Telnet session established and idling 1.28 mA 3.2 GPIO Interface The general purpose I/O (GPIO) pins available on the SN820X will connect to various external devices. GPIOs are configured as input floating by default. Subsequently, they can be programmed to be either input or output pins via the GPIO control register. They can also be programmed to have internal pull-up or pull-down resistors. The MICRO_RST_N pin is connected to a permanent pull-up resistor, RPU. TABLE 3.2.1: Digital I/O Characteristics SN8200/SN8200UFL SYM min. Input Low Voltage1 VIL Input High Voltage1 typ. max. unit -0.3 0.28 (VDD-2) +0.8 V VIH 0.41 (VDD-2) +1.3 VDD+0.3 V Input Low Voltage2 VIL -0.3 0.32 (VDD2) +0.75 V Input High Voltage2 VIH 0.42 (VDD-2) +1 VDD +0.5 V Input Low Voltage (MICRO_RST_N) VIL -0.5 0.8 V Input High Voltage (MICRO_RST_N) VIH 2 VDD + 0.5 V 0.4 V Output Low Voltage VOL Output High Voltage VOH VDD - 0.4 Weak Pull-up Equivalent Resistor RPU 30 40 50 kΩ Weak Pull-down Equivalent resistor RPD 30 40 50 kΩ V 1 - for pins 5, 6, 7, 9, 10, 11, 12, 42, 46 2 - for pins 32 - 38, 40, 41, 43, 44 Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 13 of 42 www.murata.com TABLE 3.2.2: Digital I/O Characteristics, SN8205/8205UFL SYM min. Voltage1 max. unit VIL -0.3 0.3 VDD V Input High Voltage1 VIH 0.7 VDD 3.6 V Input Low Voltage2 VIL -0.3 0.3 VDD V Input High Voltage2 VIH 0.7 3.6 V Input Low Voltage (MICRO_RST_N) VIL -0.5 0.8 V Input High Voltage (MICRO_RST_N) VIH 2 VDD + 0.5 V 0.4 V Input Low Output Low Voltage VOL Output High Voltage VOH Weak Pull-up Equivalent Resistor R Weak Pull-down Equivalent resistor R typ. VDD - 0.4 PU PD V 30/8* 40/11* 50/15* kΩ 30/8* 40/11* 50/15* kΩ 1 - for pins 5, 6, 7, 9, 10, 11, 12, 42, 46 2 - for pins 32-38, 40, 41, 43, 44 (*) - Pin 33 3.3 Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with a relaxed VOL/VOH) except PC13, PC14 and PC15 which can sink or source up to ±3mA. When using the PC13 to PC15 GPIOs in output mode, the speed should not exceed 2 MHz with a maximum load of 30 pF. • In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Table 3.3.1. • The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating IVDD. TABLE 3.3.1: Voltage Characteristics, SN820X Symbol VDD–VSS Ratings Min Max U External main supply voltage (including VDDA, VDD)(1) –0.3 4.0 Input voltage on five-volt tolerant pin(2) VSS–0.3 VDD+4 VIN Input voltage on any other pin VSS–0.3 4.0 |∆VDDx| Variations between different VDD power pins - 50 |VSSX − VSS| Variations between all the different ground pins - 50 mV VESD(HBM) Electrostatic discharge voltage (human body model) 2000 V V 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. 2. VIN maximum value must always be respected. Copyright © Murata Manufacturing Co., Ltd. All rights reserved. 2012 SN820X (R) 3.4 1/31/18 Page 14 of 42 www.murata.com TABLE 3.3.2: Current Characteristics, SN8200/8200UFL Symbol Ratings Max. IVDD Total current into VDD/VDDA power lines (source)(1) 150 IVSS Total current out of VSS ground lines (sink) 150 Output current sunk by any I/O and control pin 25 Output current source by any I/Os and control pin 25 (1) IIO IINJ(PIN)(2) mA -5/+0 Injected current on five volt tolerant pins(3) ±5 Injected current on any other pin (4) ΣIINJ(PIN) Uni ± 25 Total injected current (sum of all I/O and control pins) (5) TABLE 3.3.3: Current Characteristics, SN8205/8205UFL Symbol Ratings Max. IVDD Total current into VDD power lines (source)(1) 120 IVSS Total current out of VSS ground lines (sink)(1) 120 Output current sunk by any I/O and control pin 25 Output current source by any I/Os and control pin 25 IIO Injected current on five-volt tolerant I/O(3) IINJ(PIN) (2) ΣIINJ(PIN)(4) Unit mA -5/+0 Injected current on any other pin(4) ±5 Total injected current (sum of all I/O and control pins)(5) ±25 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. 2. Negative injection disturbs the analog performance of the device. 3. Positive injection is not possible on these I/Os. A negative injection is induced by VINVDD while a negative injection is induced by VIN