ADS-119GC

® ® ADS-119 12-Bit, 10MHz, Low-Power Sampling A/D Converters FEATURES • • • • • • • • • • 12-bit resolution 10MHz minimum sampling rate Functionally complete Small 24-pin DDIP or SMT package Requires only ±5V supplies Low-power, 1.8 Watts Outstanding dynamic performance Edge-triggered No missing codes over temperature Ideal for both time and frequency-domain applications PIN 1 2 3 4 5 6 7 8 9 10 11 12 INPUT/OUTPUT CONNECTIONS FUNCTION BIT 12 (LSB) BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 PIN 24 23 22 21 20 19 18 17 16 15 14 13 FUNCTION NO CONNECT ANALOG GROUND NO CONNECT +5V ANALOG SUPPLY –5V SUPPLY ANALOG INPUT ANALOG GROUND OFFSET ADJUST START CONVERT DATA VALID DIGITAL GROUND +5V DIGITAL SUPPLY GENERAL DESCRIPTION The ADS-119 is a high-performance, 12-bit, 10MHz sampling A/D converter. The device samples input signals up to Nyquist frequencies with no missing codes. The ADS-119 features excellent dynamic performance including a typical SNR of 69dB. Packaged in a metal-sealed, ceramic, 24-pin DDIP, the functionally complete ADS-119 contains a fast-settling sample/ hold amplifier, a subranging (two-pass) A/D converter, a precise voltage reference, timing/control logic, and errorcorrection circuitry. All timing and control logic operates from the rising edge of a single start convert pulse. Digital input and output levels are TTL. Requiring only ±5V supplies, the ADS-119 typically dissipates 1.8 Watts. The unit offers a bipolar input range of ±1.5V. Models are available for use in either commercial (0 to +70°C) or military (–55 to +125°C) operating temperature ranges. Typical applications include signal analysis, medical/graphic imaging, process control, ATE, radar, and sonar. OFFSET ADJUST 17 BUFFER REGISTER ANALOG INPUT 19 – S/H + FLASH ADC 1 12 BIT 1 (MSB) 11 BIT 2 DIGITAL CORRECTION LOGIC 10 BIT 3 OUTPUT REGISTER 9 8 7 6 5 4 3 2 1 BIT 4 BIT 5 BIT 6 BIT 7 BIT 9 BIT 9 BIT 10 BIT 11 BIT 12 (LSB) REF Σ DAC AMP FLASH ADC 2 START CONVERT 16 DATA VALID 15 TIMING AND CONTROL LOGIC 21 +5V ANALOG SUPPLY 13 +5V DIGITAL SUPPLY 14 DIGITAL GROUND 20 –5V SUPPLY REGISTER 18, 23 ANALOG GROUND 22, 24 NO CONNECT Figure 1. ADS-119 Functional Block Diagram DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: (508) 339-3000 Fax: (508) 339-6356 • For immediate assistance: (800) 233-2765 ® ® ADS-119 ABSOLUTE MAXIMUM RATINGS PARAMETERS +5V Supply (Pin 13, 21) –5V Supply (Pin 20) Digital Input (Pin 16) Analog Input (Pin 19) Lead Temp (10 seconds) LIMITS 0 to +6 0 to –6 –0.3 to +VDD +0.3 ±5 +300 UNITS Volts Volts Volts Volts °C PHYSICAL/ENVIRONMENTAL PARAMETERS Operating Temp. Range, Case ADS-119MC/GC ADS-119MM/GM/883 Thermal Impedance θjc θca Storage Temperature Package Type Weight 0 to +70°C MAX. — — 15 MIN. — 300 — TYP. ±1.5 350 6 MAX. — — 15 MIN. — 300 — MIN. 0 –55 TYP. — — MAX. +70 +125 UNITS °C °C FUNCTIONAL SPECIFICATIONS (TA = +25°C, ±VDD = ±5V, 10mHz sampling rate, and a minimum 3 minute warmup Œ unless otherwise specified.) +25°C ANALOG INPUT Input Voltage Range  Input Resistance Input Capacitance DIGITAL INPUT Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Start Convert Positive Pulse Width Ž STATIC PERFORMANCE Resolution Integral Nonlinearity (fin = 10kHz) Differential Nonlinearity (fin = 10kHz) Full Scale Absolute Accuracy Bipolar Zero Error (Tech Note 2) Unipolar Offset Error (Tech Note 2) Gain Error (Tech Note 2) No Missing Codes (fin = 10kHz) DYNAMIC PERFORMANCE Peak Harmonics (–0.5dB) dc to 1MHz 1MHz to 2.5MHz 2.5MHz to 5MHz Total Harmonic Distortion (–0.5dB) dc to 1MHz 1MHz to 2.5MHz 2.5MHz to 5MHz Signal-to-Noise Ratio (w/o distortion, –0.5dB) dc to 1MHz 1MHz to 2.5MHz 2.5MHz to 5MHz Signal-to-Noise Ratio  (& distortion, –0.5dB) dc to 1MHz 1MHz to 2.5MHz 2.5MHz to 5MHz Two-tone Intermodulation Distortion (fin = 100kHz, 240kHz, fs = 1MHz, –0.5dB) Noise Input Bandwidth (–3dB) Small Signal (–20dB input) Large Signal (–0dB input) Feedthrough Rejection (fin = 5MHz) Slew Rate Aperture Delay Time Aperture Uncertainty S/H Aquisition Time (to ±0.01%FSR, 3V step) Overvoltage Recovery Time  A/D Conversion Rate — — — — — — 66 66 66 62 62 62 — — — — — — — — 30 — 10 –70 –70 –70 –69 –68 –68 69 69 69 66 66 66 –72 250 60 10 76 ±400 5 3 35 100 — –63 –63 –63 –63 –63 –63 — — — — — — — — — — — — — — 37 — — — — — — — — 66 66 66 62 62 62 — — — — — — — — — — — — — — — 12 12 ±0.75 ±0.5 ±0.2 ±0.2 ±0.1 ±0.1 — — — ±0.95 ±0.5 ±0.6 ±0.6 ±0.5 — +2.0 — — — — — — — — 50 — +0.8 +20 –20 — MIN. — 300 — TYP. ±1.5 350 6 6 °C/Watt 24 °C/Watt –65 — +150 °C 24-pin, metal-sealed, ceramic DDIP or SMIT 0.42 ounces (12 grams) –55 to +125°C TYP. ±1.5 350 6 MAX. — — 15 UNITS Volts Ω pF +2.0 — — — — — — — — 50 — +0.8 +20 –20 — +2.0 — — — — — — — — 50 — +0.8 +20 –20 — Volts Volts µA µA ns — — 0.95 — — — — 12 12 ±1.0 ±0.5 ±0.5 ±0.3 ±0.3 ±0.5 — — — +1 ±0.75 ±0.7 ±0.7 ±1.0 — — — –0.95 — — — — 12 12 ±1.5 ±0.75 ±0.75 ±0.6 ±0.7 ±1.0 — — — +1.25 ±1.5 ±1.0 ±1.5 ±2.5 — Bits LSB LSB %FSR %FSR % Bits –70 –70 –70 –69 –68 –67 69 69 69 66 66 66 –72 300 60 10 76 ±400 5 3 35 100 — –63 –63 –63 –63 –63 –63 — — — — — — — — — — — — — — 37 — — — — — — — — 63 63 63 60 60 60 — — — — — — — — 30 — 500 –69 –69 –67 –68 –67 –66 67 66 66 65 65 64 –72 400 60 10 76 ±400 5 3 35 100 — –61 –60 –60 –60 –60 –60 — — — — — — — — — — — — — — 37 — — dB dB dB dB dB dB dB dB dB dB dB dB µVrms MHz MHz dB V/µs ns ps rms ns ns MHz 30 — 500 2 ® ® ADS-119 +25°C DIGITAL OUTPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Output Coding POWER REQUIREMENTS Power Supply Ranges ‘ +5V Supply –5V Supply Power Supply Current +5V Supply –5V Supply Power Dissipation Power Supply Rejection +4.75 –4.75 — — — — +5.0 –5.0 +200 –180 1.8 — +5.25 –5.25 +215 –205 2.1 ±0.01 +4.75 –4.75 — — — — +5.0 –5.0 +200 –180 1.8 — +5.25 –5.25 +215 –205 2.1 ±0.01 +4.9 –4.9 — — — — +5.0 –5.0 +200 –180 1.8 — +5.25 –5.25 +215 –205 2.1 ±0.01 Volts Volts mA mA Watts %FSR/%V MIN. +2.4 — — — TYP. — — — — MAX. — +0.4 –4 +4 MIN. +2.4 — — — 0 to +70°C TYP. — — — — MAX. — +0.4 –4 +4 Offset Binary MIN. +2.4 — — — –55 to +125°C TYP. — — — — MAX. — +0.4 –4 +4 UNITS Volts Volts mA mA Footnotes: Œ All power supplies must be on before applying a start convert pulse. All supplies and the clock (START CONVERT) must be present during warmup periods. The device must be continuously converting during this time. There is slight degradation in performance when using ±12V supplies.  See ordering information for availability of ±5V input range. Contact DATEL for availability of other input voltage ranges. Ž A 200ns wide start convert pulse is used for all production testing. Only the rising edge of the start convert pulse is required for the device to operate (edge-triggered).  Effective bits is equal to: (SNR + Distortion) – 1.76 + 20 log 6.02 Full Scale Amplitude Actual Input Amplitude  This is the time required before the A/D output data is valid after the analog input is back within the specified range. TECHNICAL NOTES 1. Obtaining fully specified performance from the ADS-119 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (14, 18, and 23) directly to a large analog ground plane beneath the package. Bypass all power supplies to ground with 4.7µF tantalum capacitors in parallel with 0.1µF ceramic capacitors. Locate the bypass capacitors as close to the unit as possible. 2. The ADS-119 achieves its specified accuracies without the need for external calibration. If required, the device's small N START CONVERT 50ns typ. initial offset and gain errors can be reduced to zero using the adjustment circuitry shown in Figures 3 and 4. For operation without adjustment, tie pin 17 to analog ground. When using this circuitry, or any similar offset and gaincalibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. 3. Applying a start convert pulse while a conversion is in progress (EOC = logic "1") will initiate a new and inaccurate conversion cycle. 4. Data is valid only for the time period (55ns, typical) shown in Figure 2 even if the device is sampling at less than 10MHz. N+1 10ns typ. INTERNAL S/H Hold 65ns typ. Acquisition Time 30ns min. 35ns typ. 37ns max. 20ns typ. 72ns min. 80ns typ. 83ns max. Hold 15ns typ. INTERNAL EOC Conversion Time 35ns typ. DATA VALID 40ns typ. ±5ns 60ns typ. 40ns typ. ±5ns 10ns typ. DATA INVALID DATA DATA N-1 VALID 55ns typ. 45ns typ. DATA N VALID INVALID DATA INVALID DATA Scale is approximately 5ns per division. Figure 2. ADS-119 Timing Diagram 3 ® ® ADS-119 CALIBRATION PROCEDURE (Refer to Figures 3 and 4, Table 1) Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuits in Figure 3 and 4 are guaranteed to compensate for the ADS-119's initial accuracy errors and may not be able to compensate for additional system errors. A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be accomplished by connecting LED's to the digital outputs and adjusting until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. Offset adjusting for the ADS-119 is normally accomplished at the point where the MSB is a 1 and all other output bits are 0's and the LSB just changes from a 0 to a 1. This digital output transition ideally occurs when the applied analog input is +½ LSB (+366µV). Gain adjusting is accomplished when all bits are 1's and the LSB just changes from a 1 to a 0. This transition ideally occurs when the analog input is at +full scale minus 1 ½ LSB's (+1.4989V). Zero/Offset Adjust Procedure 1. Apply a train of pulses to the START CONVERT input (pin 16) so the converter is continuously converting. 2. Apply +366µV to the ANALOG INPUT (pin 19). 3. Adjust the offset potentiometer until the output bits are 1000 0000 0000 and the LSB flickers between 0 and 1. –15V SIGNAL INPUT 50Ω Gain Adjust Procedure 1. Apply +1.4989V to the ANALOG INPUT (pin 19). 2. Adjust the gain potentiometer until all output bits are 1's and the LSB flickers between 1 and 0. 3. To confirm proper operation of the device, vary the input signal to obtain the output coding listed in Table 1. Table 1. Output Coding for Bipolar Operation BIPOLAR SCALE +FS–1 LSB +3/4 FS +1/2 FS 0 –1/2 FS –3/4 FS –FS +1 LSB –FS ADS-119 INPUT VOLTAGE (±1.5V RANGE) +1.49927V +1.12500V +0.75000V 0.00000V –0.75000V –1.12500V –1.49927V –1.50000V OUTPUT CODING OFFSET BINARY MSB LSB 1111 1111 1110 0000 1100 0000 1000 0000 0100 0000 0010 0000 0000 0000 0000 0000 2kΩ 1111 0000 0000 0000 0000 0000 0001 0000 GAIN ADJUST +15V 1.98kΩ To Pin 19 of ADS-119 Figure 3. Optional Calibration Circuit, ADS-119 +5V Œ 4.7µF 0.1µF 13, 20 12 BIT 1 (MSB) 11 BIT 2 10 BIT 3 9 BIT 4 8 BIT 5 7 BIT 6 14 –5V 4.7µF + 0.1µF 20 ADS-119 18, 20 +5V 6 BIT 7 5 BIT 8 4 BIT 9 3 BIT 10 2 BIT 11 1 BIT 12 (LSB) 15 DATA VALID OFFSET ADJUST 17 20kΩ –5V 19 ANALOG INPUT 16 START CONVERT Œ A single +5V supply should be used for both the +5V analog and +5V digital. If separate supplies are used, the difference between the two cannot exceed 100mV. Figure 4. Typical Connection Diagram 4 +15V ® P3 NOTES: START CONVERT 1 C22 4.7MF + 19 34 32 30 B1 B2 B3 B4 B5 28 (MSB) 26 24 22 20 1 18 17 16 15 14 13 12 + C21 0.1MF 2Q 3Q 4Q 5Q 6Q 7Q 8Q OE 10 P1 +5VF C16 2.2MF + 1Q 2Q 3Q 4Q 5Q 6Q 7Q 9 3 74HCT86 7 +5VF 11 8D LE 10 8Q OE 19 18 17 16 15 14 13 12 1 JPR4 2 1 3 B6 B7 B8 B9 B10 B11 B12 18 16 14 12 10 8 6 (LSB) 4 2 17 15 13 11 9 7 5 3 1 JPR3 3 7 ADS-118/119 +5V 13 +5VD DGND TRIG ANAIN B5 U1 +5VA ENABLE -5V AGND AGND EOC B12 1 B11 2 B10 3 B9 4 B8 5 B7 6 B6 7 8 +5VF LE B4 9 11 B3 10 B2 11 B1 14 16 19 24 22 +5V 17 20 -5V 18 23 15 21 12 C18 R7 .1MF OPTION JPR5 1 2 3 +5VA 118A 119A JPR6 118A JPR1 119A 2 3 -5VA JPR2 1 2 3 4 118 119 +5V SEE NOTE 2 C19 50 118 119 1 2 X1 14 8 FOR ADS-118/118A 5MHZ FOR ADS-119 10MHZ +5VF 1Q 33 31 29 C17 2.2MF +5VF 2 1 R2 20K 2 R6 1.2M 1. UNLESS OTHERWISE SPECIFIED ALL CAPACITORS ARE 50V C1-C6 ARE 20V ALL RESISTORS ARE IN OHMS 2. AS AN OPTION, COXIAL CABLE BETWEEN THESE TWO POINTS. SG4 3 C20 -15V OPTIONAL R4 2K ® +15V +5VA 27 25 23 21 19 SG5 SG6 R5 1.98K 10 4 11 74HCT573 20 2 1D 3 2D 4 3D 5 4D 6 5D U3 7 6D 8 7D 9 8D 1 2 SG9 5 U4 6 R1 500 GAIN 3 1 R3 20K SEE NOTE 2 0.1MF OPTION 118A 119 OFFSET SG7 SG8 -15V -5VA 5 C7 2.2MF +5VF C15 0.1MF +5VA C14 .01MF +15V C13 0.01MF -15V C12 0.01MF +5V C10 0.01MF +5VF C8 0.01MF 9 10 74HCT86 U5 8 2 L3 U5 1 14 -5VA C11 0.01MF 20MHY C1 2.2MF L2 -5V C9 0.01MF 4 5 12 13 U5 74HCT86 U5 SPARE GATES 11 6 20MHY C3 2.2MF L1 C4 2.2MF SG1 SG2 SG3 20MHY C2 2.2MF P4 ANALOG INPUT P2 L7, 20MHY 2 1 4 3 L6 6 5 8 7 20MHY C6 L5 2.2MF 74HCT573 20 2 1D 3 2D 4 3D 5 4D 6 5D U2 7 6D 8 7D 10 9 12 11 14 13 20MHY C5 2.2MF L4 16 15 20MHY 18 17 20 19 22 21 24 23 26 25 ADS-119 Figure 5. ADS-119 Evaluation Board Schematic ® ® ADS-119 THERMAL REQUIREMENTS All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70°C and –55 to +125°C. All room-temperature (TA = +25°C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electricallyinsulating, thermally-conductive "pads" may be installed underneath the package. Devices should be soldered to boards rather than "socketed", and of course, minimal air flow over the surface can greatly help reduce the package temperature. In more severe ambient conditions, the package/junction temperature of a given device can be reduced dramatically (typically 35%) by using one of DATEL's HS Series heat sinks. See Ordering Information for the assigned part number. See page 1-183 of the DATEL Data Acquisition Components Catalog for more information on the HS Series. Request DATEL Application Note AN-8, "Heat Sinks for DIP Data Converters", or contact DATEL directly, for additional information. Occurrences 3000 2500 2000 1500 1000 500 0 Digital Output Code Figure 6. ADS-119 Grounded Input Histogram This histogram represents the typical peak-to-peak noise (including quantization noise) associated with the ADS-119. 4,096 conversions were processed with the input to the ADS-119 tied to analog ground. 0 –10 Amplitude Relative to Full Scale (dB) –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Frequency (MHz) (fs = 10MHz, fin = 4.9MHz, Vin = –0.5dB, 4,096-point FFT) Figure 7. ADS-119 FFT Analysis 6 ® ® ADS-119 +0.73 DNL (LSB's) Number of Occurences 0 –0.47 0 Digital Output Code 4096 0 Digital Output Code 4096 Figure 8. ADS-119 Histogram and Differential Nonlinearity PH vs. Input Frequency 80 70 80 70 60 THD vs. Input Frequency Peak Harmonic (–dB) 60 40 30 20 10 0 1 10 100 1000 10000 THD (–dB) 50 50 40 30 20 10 0 1 10 100 1000 10000 Frequency (kHz) Frequency (kHz) SNR vs. Input Frequency 80 70 60 80 70 60 SNR+D vs. Input Frequency 40 30 20 10 0 1 10 100 1000 10000 SNR+D (dB) SNR (dB) 50 50 40 30 20 10 0 1 10 100 1000 10000 Frequency (kHz) Frequency (kHz) Figure 9. ADS-119 Performance Curves 7 ® ® ADS-119 MECHANICAL DIMENSIONS INCHES (mm) 1.31 MAX. (33.27) 24-Pin DDIP Version 24 13 0.80 MAX. (20.32) 1 12 Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127) Lead Material: Kovar alloy Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating ADS-119MC ADS-119MM ADS-926MC ADS-119/883 0.100 TYP. (2.540) 1.100 (27.940) 0.235 MAX. (5.969) PIN 1 INDEX 0.200 MAX. (5.080) 0.010 (0.254) 0.190 MAX. (4.826) 0.018 ±0.002 (0.457) 0.100 (2.540) 0.040 (1.016) +0.002 –0.001 SEATING PLANE 0.025 (0.635) 0.600 ±0.010 (15.240) 0.100 (2.540) 24-Pin Surface Mount Versions 24 1.31 MAX. (33.02) 13 ADS-119GC ADS-119GM 1 12 Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127) 0.80 MAX. (20.32) Lead Material: Kovar alloy Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating 0.210 MAX. (5.334) 0.020 TYP. (0.508) PIN 1 INDEX 0.060 TYP. (1.524) 0.130 TYP. (3.302) 0.015 (0.381) MAX. radius for any pin 0.100 (2.540) 0.100 TYP. (2.540) 0.040 (1.016) 0.020 (0.508) 0.010 TYP. (0.254) ORDERING INFORMATION MODEL NUMBER ADS-119MC ADS-119MM ADS-119/883 ADS-119GC ADS-119GM OPERATING TEMP. RANGE 0 to +70°C –55 to +125°C –55 to +125°C 0 to +70°C –55 to +125°C ACCESSORIES ADS-B119 HS-24 Evaluation Board (without ADS-119) Heat Sinks for all ADS-119 DDIP models Receptacles for PC board mounting can be ordered through AMP Inc. Part # 3-331272-8 (Components Lead Socket), 24 required. For MIL-STD-883 product specification or availability of surface mounts package, contact DATEL. ® ® ISO 9001 R E G I S T E R E D DS-0289B 3/97 DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 Internet: www.datel.com E-mail:sales@datel.com Data Sheet Fax Back: (508) 261-2857 DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 1-34-60-01-01 DATEL GmbH München, Germany Tel: 89-544334-0 DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-354-2025 DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.