ADS-953MC

® ® ADS-953 18-Bit, 1MHz, Low-Distortion Sampling A/D Converters A SUBSIDIARY OF C&D TECHNOLOGIES FEATURES • • • • • • • • • 18-bit resolution 1MHz minimum sampling rate No missing codes over extended temperature range Very low power, 1.45 Watts Small, 32-pin, side-brazed, ceramic TDIP Edge-triggered Excellent performance, –95dB peak harmonics Ideal for both time and frequency-domain applications Low cost PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 INPUT/OUTPUT CONNECTIONS FUNCTION BIT 2 BIT 1 (MSB) ANALOG GROUND ANALOG INPUT +5V REFERENCE OUT GAIN ADJUST COMPENSATION –15V SUPPLY +15V SUPPLY +5V ANALOG SUPPLY –5V ANALOG SUPPLY ANALOG GROUND DIGITAL GROUND +5V DIGITAL SUPPLY EOC START CONVERT PIN 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 FUNCTION BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 BIT 9 BIT 10 BIT 11 BIT 12 BIT 13 BIT 14 BIT 15 BIT 16 BIT 17 BIT 18 (LSB) GENERAL DESCRIPTION The ADS-953 is an 18-bit, 1MHz sampling A/D converter. This device accurately samples full-scale input signals up to Nyquist frequencies with no missing codes. This feature, combined with excellent signal-to-noise ratio (SNR) and –95dB peak harmonic distortion (THD), makes the ADS-953 the ideal choice for both time-domain (medical imaging, scanners, process control) and frequency-domain (radar, telecommunications, spectrum analysis) applications. Packaged in a 32-pin, side-brazed, metal-sealed, ceramic TDIP, the functionally complete ADS-953 contains a fast-settling sample-hold amplifier, a subranging (two-pass) A/D converter, an internal reference, timing/control logic, and error-correction circuitry. Digital input and output levels are TTL, and the ADS-953 only requires the rising edge of the start convert pulse to operate. Requiring ±15V and ±5V supplies, the ADS-953 typically dissipates 1.45 Watts. The device is offered with a bipolar (±5V) analog input range. Models are available for use in either commercial (0 to +70°C) or extended (–40 to +110°C) operat- ing temperature ranges. A proprietary, auto-calibrating, errorcorrecting circuit enables the device to achieve specified performance over the full military temperature range. 2 1 BIT 1 (MSB) BIT 2 BUFFER ANALOG INPUT 4 32 BIT 3 – + S/H FLASH ADC 1 DIGITAL CORRECTION LOGIC 31 BIT 4 30 BIT 5 29 BIT 6 28 BIT 7 27 BIT 8 26 BIT 9 25 BIT 10 24 BIT 11 23 BIT 12 22 BIT 13 21 BIT 14 20 BIT 15 19 BIT 16 18 BIT 17 17 BIT 18 (LSB) GAIN ADJUST 6 GAIN CIRCUIT REF +5V REFERENCE OUT 5 COMPENSATION 7 Σ DAC AMP FLASH ADC 2 START CONVERT 16 EOC 15 TIMING AND CONTROL LOGIC 10 +5V ANALOG SUPPLY 11 –5V ANALOG SUPPLY 3, 12 ANALOG GROUND 14 +5V DIGITAL SUPPLY 9 +15V SUPPLY 8 –15V SUPPLY 13 DIGITAL GROUND Figure 1. ADS-953 Functional Block Diagram DATEL, Inc., Mansfield, MA 02048 (USA) • Tel: (508) 339-3000, (800) 233-2765 Fax: (508) 339-6356 • Email: sales@datel.com • Internet: www.datel.com ® ® ADS-953 ABSOLUTE MAXIMUM RATINGS PARAMETERS +15V Supply (Pin 9) –15V Supply (Pin 8) +5V Supply (Pins 10, 14) –5V Supply (Pin 11) Digital Input (Pin 16) Analog Input (Pin 4) Lead Temperature (10 seconds) LIMITS 0 to +16 0 to –16 0 to +6 0 to –6 –0.3 to +VDD +0.3 ±15 +300 UNITS Volts Volts Volts Volts Volts Volts °C PHYSICAL/ENVIRONMENTAL PARAMETERS Operating Temp. Range, Case ADS-953MC ADS-953ME Thermal Impedance θjc θca Storage Temperature Range Package Type Weight MIN. 0 –40 TYP. — — MAX. +70 +110 UNITS °C °C — 5 — °C/Watt — 22 — °C/Watt –65 — +150 °C 32-pin,side-brazed, metal-sealed, ceramic TDIP 0.46 ounces (13 grams) FUNCTIONAL SPECIFICATIONS (TA = +25°C, ±VCC = ±15V, ±VDD = ±5V, 1MHz sampling rate, and a minimum 1 minute warmup ➀ unless otherwise specified.) +25°C TYP. ±5 500 7 0 to +70°C TYP. ±5 500 7 –40 to +110°C TYP. MAX. ±5 500 7 — — 15 ANALOG INPUT Input Voltage Range ➁ Input Resistance Input Capacitance DIGITAL INPUT Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Start Convert Positive Pulse Width ➂ STATIC PERFORMANCE Resolution Integral Nonlinearity (fin = 10kHz) Differential Nonlinearity (fin = 10kHz) Full Scale Absolute Accuracy Bipolar Zero Error (Tech Note 2) Bipolar Offset Error (Tech Note 2) Gain Error (Tech Note 2) No Missing Codes (fin = 10kHz) Peak Harmonics (–0.5dB) dc to 1kHz Total Harmonic Distortion (–0.5dB) dc to 100kHz Signal-to-Noise Ratio (w/o distortion, –0.5dB) dc to 100kHz Signal-to-Noise Ratio ➃ (& distortion, –0.5dB) dc to 100kHz DC Noise Two-Tone Intermodulation Distortion (fin = 100kHz, 240kHz, fs = 500kHz, –0.5dB) Input Bandwidth (–3dB) Small Signal (–20dB input) Large Signal (–0.5dB input) Feedthrough Rejection (fin = 500kHz) Slew Rate Aperture Delay Time Aperture Uncertainty S/H Acquisition Time ( to ±0.003%FSR, 10V step) Overvoltage Recovery Time ➄ A/D Conversion Rate MIN. — — — MAX. — — 15 MIN. — — — MAX. — — 15 MIN. — — — UNITS Volts Ω pF +2.0 — — — 20 — — –0.95 — — — — 18 — — — — 500 18 ±10 ±0.5 ±0.1 ±0.1 ±0.1 ±0.1 — — +0.8 +20 –20 — — — +1 ±0.25 ±0.15 ±0.2 ±0.25 — +2.0 — — — 20 — — –0.95 — — — — 18 — — — — 500 18 ±10 ±0.5 ±0.25 ±0.15 ±0.2 ±0.25 — — +0.8 +20 –20 — — — +1 ±0.4 ±0.25 ±0.3 ±0.4 — +2.0 — — — 20 — — –0.95 — — — — 18 — — — — 500 18 ±15 ±0.50 ±0.4 ±0.25 ±0.3 ±0.4 — — +0.8 +20 –20 — — — +1.25 ±0.8 ±0.5 ±0.6 ±0.9 — Volts Volts µA µA ns Bits LSB LSB %FSR %FSR %FSR % Bits DYNAMIC PERFORMANCE (500kHz Sampling Rate) — — 91 76 — — — — — — — — — — 1 –95 –85 93 84 76 –85 TBD TBD 84 TBD +20 5 260 500 — –93 –80 — — — — — — — — — — — — — — — 91 76 — — — — — — — — — — 1 –95 –85 93 84 76 –85 TBD TBD 84 TBD +20 5 260 500 — –93 –80 — — — — — — — — — — — — — — — — — — — — — — — — — — — 1 –82 –81 92 80 76 –81 TBD TBD 84 TBD +20 5 260 500 — — — — — — — — — — — — — — — — dB dB dB dB µVrms dB MHz MHz dB V/µs ns ps rms ns ns MHz 2 ® ® ADS-953 +25°C ANALOG OUTPUT Internal Reference Voltage Drift External Current DIGITAL OUTPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Output Coding POWER REQUIREMENTS Power Supply Ranges +15V Supply –15V Supply +5V Supply –5V Supply Power Supply Currents +15V Supply –15V Supply +5V Supply –5V Supply Power Dissipation Power Supply Rejection +14.5 –14.5 +4.75 –4.75 — — — — — — +15.0 –15.0 +5.0 –5.0 +29 –15 +104 –54 1.45 — +15.5 –15.5 +5.25 –5.25 — — — — 1.65 ±0.05 +14.5 –14.5 +4.75 –4.75 — — — — — — +15.0 –15.0 +5.0 –5.0 +29 –15 +104 –54 1.45 — +15.5 –15.5 +5.25 –5.25 — — — — 1.65 ±0.05 +14.5 –14.5 +4.75 –4.75 — — — — — — +15.0 –15.0 +5.0 –5.0 +29 –15 +104 –54 1.45 — +15.5 –15.5 +5.25 –5.25 — — — — 1.65 ±0.05 Volts Volts Volts Volts mA mA mA mA Watts %FSR/%V +2.4 — — — — — — — — +0.4 –4 +4 +2.4 — — — — +0.4 — — –4 — — +4 Complementary Offset Binary +2.4 — — — — — — — — +0.4 –4 +4 Volts Volts mA mA MIN. +4.95 — — TYP. +5.0 ±30 1 MAX. +5.05 — — MIN. +4.95 — — 0 to +70°C TYP. +5.0 ±30 1 MAX. +5.05 — — MIN. +4.95 — — –40 to +110°C TYP. +5.0 ±30 1 MAX. +5.05 — — UNITS Volts ppm/°C mA Footnotes: ➀ All power supplies must be on before applying a start convert pulse. All supplies and the clock (START CONVERT) must be present during warmup periods. The device must be continuously converting during this time. ➁ Contact DATEL for other input voltage ranges. ➂ A 1MHz clock with a 500nsec positive pulse width (50% duty cycle) is used for all production testing. Any duty cycle may be used as long as a minimum positive pulse width of 20nsec is maintained. For applications requiring lower sampling rates, clock frequencies lower than 1MHz may be used. ➃ Effective bits is equal to: (SNR + Distortion) – 1.76 + 20 log 6.02 Full Scale Amplitude Actual Input Amplitude ➄ This is the time required before the A/D output data is valid once the analog input is back within the specified range. TECHNICAL NOTES 1. Obtaining fully specified performance from the ADS-953 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are not connected to each other internally. For optimal performance, tie all ground pins (3, 12 and 13) directly to a large analog ground plane beneath the package. Bypass all power supplies and the +5V REFERENCE OUTPUT (pin 5) to ground with 10µF tantalum capacitors in parallel with 0.1µF ceramic capacitors. Locate the bypass capacitors as close to the unit as possible. Tie a 47µF capacitor between COMPENSATION (pin 7) and ground. 2. The ADS-953 achieves its specified accuracies without the need for external calibration. If required, the device's small initial errors can be reduced to zero using the adjustment circuitry shown in Figure 2. When using this circuitry, or any similar offset and gain calibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. Float pin 6 if not using gain adjust circuits. 3. Applying a start convert pulse while a conversion is in progress (EOC = logic "1") will initiate a new and probably inaccurate conversion cycle. Data for the interrupted and subsequent conversions will be invalid. 3 ® ® ADS-953 THERMAL REQUIREMENTS All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70°C and –40 to +110°C. All room-temperature (TA = +25°C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electricallyinsulating, thermally-conductive "pads" may be installed underneath the package. Devices should be soldered to boards rather than "socketed", and of course, minimal air flow over the surface can greatly help reduce the package temperature. Zero/Offset Adjust Procedure 1. Apply a train of pulses to the START CONVERT input (pin 16) so that the converter is continuously converting. 2. For bipolar zero/offset adjust, apply –19µV to the ANALOG INPUT (pin 4). 3. Adjust the offset potentiometer until the output code flickers equally between 01 1111 1111 1111 1111 and 10 0000 0000 0000 0000. Gain Adjust Procedure 1. Apply –4.999943V to the ANALOG INPUT (pin 4). 2. Adjust the gain potentiometer until all output bits are 1's and the LSB flickers between 1 and 0. 3. To confirm proper operation of the device, vary the applied input voltage to obtain the output coding listed in Table 2. Table 1. Input Connections CALIBRATION PROCEDURE Connect the converter per Table 1 for the appropriate input voltage range. Any offset/gain calibration procedures should not be implemented until the device is fully warmed up. To avoid interaction, adjust offset before gain. The ranges of adjustment for the circuits in Figure 2 are guaranteed to compensate for the ADS-953's initial accuracy errors and may not be able to compensate for additional system errors. A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This is accomplished by connecting LED's to the digital outputs and performing adjustments until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. For the ADS-953, offset adjusting is normally accomplished when the analog input is 0 minus ½LSB (–19µV). See Table 2 for the proper bipolar output coding. Gain adjusting is accomplished when the analog input is at nominal full scale minus 1½LSB's (–4.999943V). INPUT VOLTAGE RANGE ±5V ZERO ADJUST (–½ LSB) –19µV GAIN ADJUST (–FS +1½ LSB) –4.999943 Table 2. Output Coding COMPLEMENTARY OFFSET BINARY BIPLOAR SCALE +FS –1 LSB +3/4 FS +1/2 FS 0 –1/2 FS –3/4 FS –FS +1 LSB –FS INPUT VOLTAGE ±5V +4.999962 +3.750000 +2.500000 +0.000000 –2.500000 –3.750000 –4.999962 –5.000000 OUTPUT CODING MSB 00 00 00 01 10 11 11 11 LSB 0000 0000 0000 0000 0111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 0111 1111 1111 1111 1111 1111 1111 1110 1111 1111 1111 1111 4 ® ® ADS-953 Pin 5 (ADS-953) 10kΩ 6 GAIN ADJUST 15 EOC 2 BIT 1 (MSB) 1 BIT 2 32 BIT 3 31 BIT 4 30 BIT 5 29 BIT 6 28 BIT 7 27 BIT 8 26 BIT 9 25 BIT 10 24 BIT 11 +5V DIGITAL 10µF 0.1µF 14 13 DIGITAL GROUND 8 10µF 10µF 0.1µF 0.1µF 12 ANALOG GROUND 9 –15V + +15V + ADS-953 23 BIT 12 22 BIT 13 21 BIT 14 20 BIT 15 19 BIT 16 18 BIT 17 17 BIT 18 (LSB) START CONVERT COMPENSATION 16 7 4 47µF + +5V ANALOG 10µF 10 + 0.1µF + 0.1µF 3 ANALOG GROUND 11 5 +5V REF. OUT 0.1µF 10µF –5V ANALOG 10µF ANALOG INPUT Figure 2. Typical ADS-953 Connection Diagram N START CONVERT 500ns typ. N+1 5ns typ. INTERNAL S/H 740ns typ. Hold Acquisition Time 260ns typ. 65ns typ. EOC Conversion Time 730ns typ. 20ns typ. OUTPUT DATA Data N-2 Valid Scale is approximately 50ns per division. Invalid Data Data N-1 Valid 980ns typ. 20ns N Figure 3. ADS-953 Timing Diagram 5 ® ® ADS-953 MECHANICAL DIMENSIONS INCHES (mm) 1.62 MAX. (41.15) Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127) 0.92 MAX. (23.37) Lead Material: Kovar Alloy Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating 1.50 TYP (38.10) SEATING PLANE 0.05 TYP. (1.27) PIN 1 INDEX 0.220 TYP. (6.86) 0.010 TYP. (0.254) 0.05 TYP. (1.27) 0.018 TYP. (0.46) 0.100 TYP. (2.54) 0.175 TYP (4.45) 0.05 TYP. (1.27) 0.90 TYP. (22.86) ORDERING INFORMATION MODEL NUMBER ADS-953MC ADS-953ME OPERATING TEMP. RANGE 0 to +70°C –40 to +110°C 32-PIN PACKAGE TDIP TDIP ACCESSORIES ADS-B951 * Evaluation Board (without ADS-951) Receptacles for PC board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead Socket), 32 required. For availability of MIL-STD-883 product, contact DATEL. * NOTE The ADS-951 evalution board is used for the AD-953, as the ADS-951 and ADS-953, share a common pinout ® ® DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 Internet: www.datel-europe.com E-mail: datel.ltd@datel.com DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 01-34-60-01-01 Internet: www.datel-europe.com E-mail: datel.sarl@datel.com DATEL GmbH München, Germany Tel: 89-544334-0 Internet: www.datel-europe.com E-mail: datel.gmbh@datel.com DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025 Internet: www.datel-co.jp E-mail: salestko@datel.co.jp, salesosa@datel.co.jp DATEL China Shanghai, China Tel: 011-86-51317131 E-mail: davidx@datel.com A SUBSIDIARY OF C&D TECHNOLOGIES DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 Internet: www.datel.com E-mail: sales@datel.com ISO 9001 REGISTERED DS-0541 3/05 DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.