CAT823RTDI-GT3

CAT823, CAT824, CAT825 System Supervisory Voltage Reset with Watchdog and Manual Reset Description The CAT823, CAT824, and CAT825 provide basic reset and monitoring functions for the electronic systems. Each device monitors the system voltage and maintains a reset output until that voltage reaches the device’s specified trip value and then maintains the reset output active condition until the device’s internal timer, after a minimum timer of 140 ms; to allow the systems power supply to stabilize. The CAT823 and CAT824 also have a watchdog input which can be used to monitor a system signal and cause a reset to be issued if the signal fails to change state prior to a timeout condition. The CAT823 and CAT825 also provide a manual reset input which can be used to initiate reset if pulled low. This input can be directly attached to a push−button or a processor signal. Features • • • • • • • • SC−70 SD SUFFIX CASE 419AC Automatically Restarts Microprocessor after Power Failure Monitors Pushbutton for External Override Accurate Under Voltage System Monitoring Brownout Detection System Reset for use with 3.0, 3.3, and 5.0 Volt Systems Pin and Function Compatible with the MAX823/24/25 Products Operating Range from −40°C to +85°C Available in TSOT−23 5−lead and SC−70 Packages These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant RESET RESET MR RESET 1 VCC CAT824 WDI RESET 1 VCC CAT825 MR (Top Views) MARKING DIAGRAM XXXMG G CMOS Push−Pull Active Low Reset Output Ground Manual Reset input – Pulled high Internally by a 52 kW resistor designed to be driven low by a mechanical pushbutton, open drain output or CMOS output. CMOS Push−Pull Active High Reset Output WDI Watchdog Timer Input – Designed to be driven by a processor output or can be disabled by tri−stating or leaving open. VCC Power Supply May, 2012 − Rev. 8 WDI RESET Function © Semiconductor Components Industries, LLC, 2012 CAT823 GND PIN FUNCTIONS GND VCC RESET Microprocessor and Microcontroller Based Systems Intelligent Instruments Control Systems Critical mP Monitors Portable Equipment RESET 1 MR GND Pin Name TSOT−23 TD SUFFIX CASE 419AE PIN CONNECTIONS GND Applications • • • • • http://onsemi.com 1 XXX M G = Specific Device Code = Date Code = Pb−Free Package* (*Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. Publication Order Number: CAT823/D CAT823, CAT824, CAT825 WDI* RESET VCC TOLERANCE BIAS VCC VCC VCC TIMEOUT COMPARATOR LEVEL SENSE & TIMER DIGITAL DELAY + VCC – VOLTAGE REFERENCE RESET* 52 kW LEVEL SENSE & DEBOUNCE MR* * Functions Available by Device Figure 1. Block Diagram Device RESET RESET CAT823 x CAT824 x x CAT825 x x MR WDI x x x x Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Supply Voltage Ratings Units 6 V −0.3 to (VCC + 0.3) V Input Current, VCC 20 mA Output Current RESET, RESET 20 mA Continuous Power Dissipations (TA = +70°C) SC−70 5−lead (derate 3.1 mW/°C above +70°C) TSOT−23 5−lead (derate 7.1 mW/°C above +70°C) 247 571 All other pins mW Storage Temperature −65 to 150 °C Operating Ambient Temperature −40 to +85 °C Lead Soldering (10 seconds max) +300 °C ESD Rating: Low Voltage Pins Human Body Model Machine Model 2000 200 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 2. RECOMMENDED OPERATING CONDITIONS Parameter VCC (TA = 0°C to +70°C) VCC (TA = −40°C to +85°C) All Other Pins Ambient Temperature http://onsemi.com 2 Range Units 1.0 to 5.5 V 1.2 to 5.5 V −0.1 to (VCC + 0.1) V −40 to +85 °C CAT823, CAT824, CAT825 Table 3. ELECTRICAL OPERATING CHARACTERISTICS (DC Characteristics: VCC = 3.0 V to 5.5 V for L/M versions; VCC = 2.0 V to 3.6 V for the R/S/T/U/Y/Z version, −40°C ≤ TA ≤ +85°C unless otherwise noted. Typical Values at TA = 25°C and VCC = 5 V for L/M versions; VCC = 3.3 V for the T/S versions; VCC = 3.0 V for the R version; and VCC = 2.5 V for the U/Y/Z versions.) (Note 1) Symbol Parameter ICC Supply Current VRST Reset Threshold Conditions Min Typ Max Units CAT823 (L/M Versions) CAT824 (L/M Versions) 6 17 mA CAT823 (R/S/T/Y/Z Versions) CAT824 (R/S/T/U/Y/Z Versions) 4 12 CAT825 (L/M Versions) 3 8 CAT825 (R/S/T/Y/Z Versions) 2 6 CAT82_L at −40°C ≤ TA ≤ +85°C 4.50 4.63 4.75 CAT82_M at −40°C ≤ TA ≤ +85°C 4.25 4.38 4.50 CAT82_T at −40°C ≤ TA ≤ +85°C 3.00 3.08 3.15 CAT82_S at −40°C ≤ TA ≤ +85°C 2.85 2.93 3.00 CAT82_R at −40°C ≤ TA ≤ +85°C 2.55 2.63 2.70 CAT82_Z at −40°C ≤ TA ≤ +85°C 2.25 2.32 2.38 CAT82_Y at −40°C ≤ TA ≤ +85°C 2.13 2.19 2.25 CAT824U at −40°C ≤ TA ≤ +85°C 1.95 2.00 2.05 Reset Threshold Tempco Reset Threshold Hysteresis tRD VCC to Reset Delay (Note 2) tRP Reset Active Timeout Period VOH RESET Output High Voltage 40 ppm/°C CAT82_L/M 10 mV CAT82_R/S/T/Y/Z, CAT824U 5 VCC = VTH to (VTH − 100 mV) 20 140 CAT82_L/M, VCC = VRST max, ISOURCE = −120 mA CAT82_T/S/R/Z/Y, CAT824U, VCC = VRST max, ISOURCE = −30 mA VOL ISOURCE VOH VOL 1. 2. 3. 4. RESET Output Low Voltage RESET Output Short−Circuit Current Reset Output Voltage V 200 ms 400 V VCC − 1.5 V 0.8 x VCC CAT82_L/M, VCC = VRST min, ISINK = 3.2 mA 0.4 CAT82_T/S/R/Z/Y, CAT824U, VCC = VRST min, ISINK = 1.2 mA 0.3 TA = 0°C to +70°C, VCC = 1 V, VCC falling, ISINK = 50 mA 0.3 TA = TMIN to TMAX, VCC = 1.2 V, VCC falling, ISINK = 100 mA 0.3 CAT82_L/M, Reset = 0 V, VCC = 5.5 V 1.5 CAT82_L/M, Reset = 0 V, VCC = 3.6 V 0.8 VCC > 1.8 V, ISOURCE = −150 mA ms V mA V 0.8 x VCC CAT824L/M & CAT825L/M, VCC = VRST max, ISINK = 3.2 mA 0.4 CAT824R/S/T/U/Y/Z & CAT825R/S/T/Y/Z, VCC = VRST max, ISINK = 1.2 mA 0.3 Over−temperature limits are guaranteed by design and not production tested. The RESET short−circuit current is the maximum pull−up current when reset is driven low by a bidirectional output. WDI is internally serviced within the watchdog period if WDI is left open. The WDI input current is specified as an average input current when the WDI input is driven high or low. The WDI input if connected to a three−stated output device can be disabled in the tristate mode as long as the leakage current is less than 10 mA and a maximum capacitance of less than 200 pF. To clock the WDI input in the active mode the drive device must be able to source or sink at least 200 mA when active. http://onsemi.com 3 CAT823, CAT824, CAT825 Table 3. ELECTRICAL OPERATING CHARACTERISTICS (DC Characteristics: VCC = 3.0 V to 5.5 V for L/M versions; VCC = 2.0 V to 3.6 V for the R/S/T/U/Y/Z version, −40°C ≤ TA ≤ +85°C unless otherwise noted. Typical Values at TA = 25°C and VCC = 5 V for L/M versions; VCC = 3.3 V for the T/S versions; VCC = 3.0 V for the R version; and VCC = 2.5 V for the U/Y/Z versions.) (Note 1) Symbol Parameter Conditions Min Typ Max 1.12 1.60 3.20 Units WATCHDOG INPUT (CAT823 & CAT824) tWD Watchdog Timeout Period tWDI WDI Pulse Width VIL WDI Input Voltage (Note 3) VIL = 0.4 V, VIH = 0.8 x VCC s 50 VIH ns 0.3 x VCC V 160 mA 0.3 x VCC V 0.7 x VCC WDI Input Current (Note 4) 120 WDI = VCC, Time Average WDI = 0 V, Time Average −20 −15 MANUAL RESET INPUT (CAT823 & CAT825) MR Input Voltage VIL VIH 0.7 x VCC tPB MR Pulse Width tPDLY MR low to Reset Delay 1 5 MR Noise Immunity Pulse Width with No Reset ms 100 MR Pullup Resistance (internal) 1. 2. 3. 4. ms 35 52 ns 75 kW Over−temperature limits are guaranteed by design and not production tested. The RESET short−circuit current is the maximum pull−up current when reset is driven low by a bidirectional output. WDI is internally serviced within the watchdog period if WDI is left open. The WDI input current is specified as an average input current when the WDI input is driven high or low. The WDI input if connected to a three−stated output device can be disabled in the tristate mode as long as the leakage current is less than 10 mA and a maximum capacitance of less than 200 pF. To clock the WDI input in the active mode the drive device must be able to source or sink at least 200 mA when active. TYPICAL ELECTRICAL OPERATING CHARACTERISTICS NORMALIZED RESET THRESHOLD (V) 9 SUPPLY CURRENT (mA) 8 7 6 5 4 3 2 1 −40 −20 0 20 40 60 80 100 120 1.06 1.04 1.02 1.00 0.98 0.96 0.94 −40 −20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 2. VCC Supply Current vs. Temperature Figure 3. Normalized Reset Threshold Voltage vs. Temperature http://onsemi.com 4 CAT823, CAT824, CAT825 FUNCTIONAL DESCRIPTION Processor RESET Manual RESET The CAT823−825 detect supply voltage (VCC) conditions that are below the specified voltage trip value (VRST) and provide a reset output to maintain correct system operation. On power−up, RESET (and RESET if available) are kept active for a minimum delay tRP of 140 ms after the supply voltage (VCC) rises above VRST to allow the power supply and processor to stabilize. When VCC drops below the voltage trip value (VRST), the reset output signals RESET (and RESET) are pulled active. RESET (and RESET if available) is specifically designed to provide the reset input signals for processors. This provides reliable and consistent operation as power is turned on, off or during brownout conditions by maintaining the processor operation in known conditions. The CAT823 and CAT825 each have a Manual Reset (MR) input to allow for alternative control of the reset outputs. The MR input is designed for direct connection to a pushbutton (see Figure 4). The MR input is internally pulled up by 52 kW resistor and must be pulled low to cause the reset outputs to go active. Internally, this input is debounced and timed such that RESET (and RESET) signals of at least 140 ms minimum will be generated. The min 140 ms tRP delay commences as the Manual Reset input is released from the low level. (see Figure 5) RESET MR Supply Voltage CAT825 VCC GND RESET Figure 4. Pushbutton RESET tPB MR tPDLY VIH VIL tRP RESET VOH VOL RESET Figure 5. Timing Diagram – Pushbutton RESET http://onsemi.com 5 CAT823, CAT824, CAT825 Watchdog Timer used to strobe the watchdog input. The most reliable is a dedicated I/O output transitioned by a specific software instruction. The watchdog can be disabled by floating (or tri−stating) the WDI input (see Figure 7). If the watchdog is disabled the WDI pin will be pulled low for the first 7/8th’s of the watchdog period (tWD) and pulled high for the last 1/8th of the watchdog period. This pulling low of the WDI input and then high is used to detect an open or tri−state condition and will continue to repeat until the WDI input is driven high or low. For most efficient operation of devices with the watchdog function the WDI input should be held low the majority of the time and only strobed high as required to reset the watchdog timer. The CAT823 and CAT824 provide a Watchdog input (WDI). The watchdog timer function forces RESET (and RESET in the CAT824) signals active when the WDI input does not have a transition from low−to−high or high−to−low within 1.12 seconds. Timeout of the watchdog starts when RESET (RESET on the CAT824) becomes inactive. If a transition occurs on the WDI input pin prior to the watchdog time−out, the watchdog timer is reset and begins to time−out again. If the watchdog timer is allowed to time−out, then the reset output(s) will go active for tRP and once released will repeat the watchdog timeout process. Figure 6 below shows a typical implementation of a watchdog function. Any processor signal that repeats dependant on the normal operation of the processor or directed by the software operating on the processor can be WDI MR Supply Voltage PIC μC GND CAT823 VCC RESET DECODER ADDRESS MCLR Figure 6. Watchdog Timer VCC Tristate VCC RESET GND mC 150 kW CAT823 OUTPUT MR WDI 110 kW Figure 7. Watchdog Disable Circuit INVALID STROBE VALID STROBE INDETERMINATE STROBE WDI tWD MIN. RESET Figure 8. Timing Diagram – Strobe Input http://onsemi.com 6 MAX. CAT823, CAT824, CAT825 VCC VRST (MAX) VRST VRST (MIN) tRD RESET VOH RESET Slews with VCC VOL RESET (CAT824 & CAT825) Figure 9. Timing Diagram – Power Down VRST (MAX) VRST VRST (MIN) VCC tRP RESET VOH RESET VOL RESET (CAT824 & CAT825) Figure 10. Timing Diagram – Power Up http://onsemi.com 7 CAT823, CAT824, CAT825 Output Valid Conditions The RESET output uses a push−pull output which can maintain a valid output down to a VCC of 1.0 volts. To sink current below 0.8 V a resistor can be connected from RESET to Ground (see Figure 11.) This arrangement will maintain a valid value on the RESET output during both power up and down but will draw current when the RESET output is in the high state. A resistor value of about 100 kW should be adequate in most situations to maintain a low condition valid output down to VCC equal to 0 V. Application Notes mP’s with Bidirectional Reset Pins The RESET output can be pulled low by processors like the 68HC11 allowing for a system reset issued by the processor. The maximum pullup current that can be sourced by the CAT82_L/M is 1.5 mA (and by the CAT82_T/R/S/Z/Y is 800 mA) allowing the processor to pull the output low even when the CAT82x is pulling it high. Power Transients Generally short duration negative−going transients of less than 2 ms on the power supply at VRST minimum will not cause a reset condition. However the lower the voltage of the transient the shorter the required time to cause a reset output. These issues can usually be remedied by the proper location of bypass capacitance on the circuit board. MR WDI CAT823 VCC 100 kW GND RESET mC RESET Figure 11. RESET Valid to 0 Volts VCC http://onsemi.com 8 CAT823, CAT824, CAT825 PACKAGE DIMENSIONS SC−70, 5 Lead, 1.25x2 CASE 419AC−01 ISSUE O SYMBOL D e e E1 E MIN MAX A 0.80 1.10 A1 0.00 0.10 A2 0.80 1.00 b 0.15 0.30 c 0.10 0.18 D 1.80 2.00 2.20 E 1.80 2.10 2.40 E1 1.15 1.25 1.35 0.65 BSC e 0.26 L TOP VIEW NOM 0.36 L1 0.42 REF L2 0.15 BSC 0.46 θ 0º 8º θ1 4º 10º q1 A2 A q q1 b L L1 A1 SIDE VIEW c END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-203. http://onsemi.com 9 L2 CAT823, CAT824, CAT825 PACKAGE DIMENSIONS TSOT−23, 5 LEAD CASE 419AE−01 ISSUE O SYMBOL D MIN NOM A e E1 MAX 1.00 A1 0.01 0.05 0.10 A2 0.80 0.87 0.90 b 0.30 c 0.12 E 0.45 0.15 D 2.90 BSC E 2.80 BSC E1 1.60 BSC e 0.95 TYP L 0.30 L1 0.40 0.20 0.50 0.60 REF L2 0.25 BSC 0º θ 8º TOP VIEW A2 A b q L A1 c L1 SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-193. http://onsemi.com 10 L2 CAT823, CAT824, CAT825 ORDERING INFORMATION Order Number NiPdAu Top Mark Inputs Outputs Voltage NiPdAu MR WDI RESET CAT823LTDI−GT3 4.63 V ETA * * * CAT823MTDI−GT3 4.38 V ETA * * * CAT823TTDI−GT3 3.08 V ETA * * * CAT823STDI−GT3 2.93 V ETA * * * CAT823RTDI−GT3 2.63 V ETA * * * CAT823ZTDI−GT3 2.32 V ETA * * * CAT823YTDI−GT3 2.19 V ETA * * * CAT823LSDI−GT3 4.63 V ETA * * * CAT823MSDI−GT3 4.38 V ETA * * * CAT823TSDI−GT3 3.08 V ETA * * * CAT823SSDI−GT3 2.93 V ETA * * * CAT823RSDI−GT3 2.63 V ETA * * * CAT823ZSDI−GT3 2.32 V ETA * * * CAT823YSDI−GT3 2.19 V ETA * * * CAT824LTDI−GT3 4.63 V EFA * * * CAT824MTDI−GT3 4.38 V EFA * * * CAT824TTDI−GT3 3.08 V EFA * * * CAT824STDI−GT3 2.93 V EFA * * * CAT824RTDI−GT3 2.63 V EFA * * * CAT824ZTDI−GT3 2.32 V EFA * * * CAT824YTDI−GT3 2.19 V EFA * * * CAT824UTDI−GT3 2.00 V EFA * * * CAT824LSDI−GT3 4.63 V EFA * * * CAT824MSDI−GT3 4.38 V EFA * * * CAT824TSDI−GT3 3.08 V EFA * * * CAT824SSDI−GT3 2.93 V EFA * * * CAT824RSDI−GT3 2.63 V EFA * * * CAT824ZSDI−GT3 2.32 V EFA * * * CAT824YSDI−GT3 2.19 V EFA * * * 5. 6. 7. 8. RESET Package Quantity per Reel TSOT−23−5 3,000 SC−70−5 TOST−23−5 3,000 SC−70−5 All packages are RoHS−compliant (Lead−free, Halogen−free). The standard lead finish is NiPdAu. Contact factory for package availability. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 9. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device Nomenclature document, TND310/D, available at www.onsemi.com http://onsemi.com 11 CAT823, CAT824, CAT825 ORDERING INFORMATION Order Number NiPdAu Top Mark Inputs Voltage NiPdAu MR CAT825LTDI−GT3 4.63 V ECA CAT825MTDI−GT3 4.38 V CAT825TTDI−GT3 WDI Outputs RESET RESET * * * ECA * * * 3.08 V ECA * * * CAT825STDI−GT3 2.93 V ECA * * * CAT825RTDI−GT3 2.63 V ECA * * * CAT825ZTDI−GT3 2.32 V ECA * * * CAT825YTDI−GT3 2.19 V ECA * * * CAT825LSDI−GT3 4.63 V ECA * * * CAT825MSDI−GT3 4.38 V ECA * * * CAT825TSDI−GT3 3.08 V ECA * * * CAT825SSDI−GT3 2.93 V ECA * * * CAT825RSDI−GT3 2.63 V ECA * * * CAT825ZSDI−GT3 2.32 V ECA * * * CAT825YSDI−GT3 2.19 V ECA * * * Package Quantity per Reel TSOT−23−5 3,000 SC−70−5 5. 6. 7. 8. All packages are RoHS−compliant (Lead−free, Halogen−free). The standard lead finish is NiPdAu. Contact factory for package availability. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 9. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device Nomenclature document, TND310/D, available at www.onsemi.com ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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