Specification Number : BP-ABZ-C
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Sub-G Module Data Sheet
Sample Part Number: CMWX1ZZABZ-TEMP
CMWX1ZZABZ-TEMP-1
MP Part Number: CMWX1ZZABZ-078
CMWX1ZZABZ-091
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Murata (China) Investment Co., Ltd.
Specification Number : BP-ABZ-C
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Revision History
Revision
Code
A
B
Dec 1, 2016
Jan 19, 2017
C
Oct 16, 2018
Date
Description
Initial Draft
Revise template
Updated the RF performance, Electrical Characteristics
and power up sequence.
Added weight info.
Updated P/N
Revised label info
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Comments
Specification Number : BP-ABZ-C
3/16
TABLE OF CONTENTS
1. Features ······················································································································· 4
2. Part Number ················································································································· 4
3. Block Diagram ··············································································································· 4
4. Label Information ·········································································································· 5
5. Absolute Maximum Ratings ····························································································· 5
6. Operating Condition ······································································································· 5
7. Electrical Characteristics ································································································ 6
7.1. FSK/OOK Transceiver Specification ············································································ 6
7.2. LoRa Transceiver Specification ··················································································· 6
7.3. SIGFOX Transceiver Specification ·············································································· 7
7.4. Low power mode current ···························································································· 7
8. Power Sequences ············································································································ 8
9. Reference circuit ············································································································ 9
10. Tape and Reel packing ·································································································· 11
11. Notice ························································································································ 14
CAUTION ················································································································ 16
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Specification Number : BP-ABZ-C
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1. Features
Interfaces
Main ICs
Reference Clocks
Supported Frequencies
Module Size
Weight
Package
RoHS
: I2C, UART, USB, SPI
: STM32L, SX1276
: Integrated 32MHz clock (TCXO with frequency error=±2 ppm)
and 32.768KHz clock (frequency error=±20 ppm)
: 868 MHz, 915 MHz
: 12.5 mm x 11.6 mm x 1.76 mm (Max)
: 0.48g (Typ)
: Metal Shield can
: This module is compliant with the RoHS directive
2. Part Number
Ordering Part Number
CMWX1ZZABZ-TEMP
CMWX1ZZABZ-EVK
CMWX1ZZABZ-078
CMWX1ZZABZ-TEMP-1
CMWX1ZZABZ-EVK-1
CMWX1ZZABZ-091
MCU
STM32L082
STM32L082
STM32L082
STM32L072
STM32L072
STM32L072
Secure element
NA
NA
NA
NA
NA
NA
Description
Engineering sample
Evaluation board
MP P/N
Engineering sample
Evaluation board
MP P/N
3. Block Diagram
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Specification Number : BP-ABZ-C
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4. Label Information
1 pin mark
Product name
FCC ID number
IC ID number
Inspection number
TELEC logo
KCC logo
Murata Logo
5. Absolute Maximum Ratings
Table 3 Maximum ratings
Parameters
Storage Temperature
Input RF Level
VDD_USB
VDD_MCU, VDD_RF, VDD_TCXO
Supply Voltage
VREF+
Min
-40
-0.3
-0.3
-0.3
Typ
25
-
Max
+90
10
3.9
3.9
VDD_MCU+0.4
Unit
degC
dBm
V
V
V
6. Operating Condition
Table 4 Operating specification
Parameters
Operating Temperature
VDD_USB (USB peripheral used) (1)
VDD_USB(USB peripheral not used) (1)
Supply Voltage
VDD_MCU,VDD_RF,VDD_TCXO
VREF+(2)
Min
-40
3.0
Typ
25
-
Max
+85
3.6
VDD_MCU_min
2.2(3)
1.8
VDD_MCU
-
VDD_MCU_max
3.6
VDD_MCU
Unit
degC
V
V
V
V
(1) VDD_USB must respect the following conditions:
- When VDD_MCU is powered on (VDD_MCU < VDD_MCU_min), VDD_USB should be always lower than VDD_MCU.
- When VDD_MCU is powered down (VDD_MCU < VDD_MCU_min), VDD_USB should be always lower than
VDD_MCU.
- In operating mode, VDD_USB could be lower or higher than VDD_MCU.
- If the USB is not used, VDD_USB must be tied to VDD_MCU to be able to use PA11 and PA12 as standard I/Os.
(2) VREF+ is used to ensure a better accuracy on low-voltage inputs and outputs of ADC and DAC. Detailed information is
on the STM32L082*** datasheet and user guider.
(3) When module is on +20dBm operation, the supply of the voltage should be set from 2.4V to 3.6V.
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7. Electrical Characteristics
7.1. FSK/OOK Transceiver Specification
Conditions:
Supply voltage VDD=3.3 V, temperature = 25 °C, FXOSC = 32 MHz, FRF =868/915 MHz , 2-level FSK modulation
without pre-filtering, FDA = 5 kHz, Bit Rate = 4.8 kb/s and terminated in a matched 50 Ohm impedance, shared Rx
and Tx path matching, unless otherwise specified.
FSK/OOK Receiver Specification
Symbol
RFS_F_HF
IDDR (*)
Description
LnaBoost is turned on
Supply current in Receive
mode
Conditions
FDA = 5 kHz, BR = 4.8 kb/s
LnaBoost Off, band 1
LnaBoost On, band 1
Min.
Typ
-117.5
22
23
Max
Unit
dBm
mA
mA
Conditions
Min.
Typ
14
Max
Max
Unit
dBm
Min
-5
dBm
Max
18.5
dBm
Min
2
dBm
VDD = 2.2 V to 3.6 V
+/-1
dB
From T = -40 °C to +85 °C
+/-1.5
dB
FSK/OOK Transmitter Specification
Symbol
RF_OP
RF_OPH
ΔRF_
OPH_V
ΔRF_T
IDDT (*)
Description
RF output power in 50 ohms
on RFO pin ( High efficiency
PA)
RF output power in 50 ohms
on PA_BOOST pin( Regulated
PA)
RF output power stability on
PA_BOOST pin versus voltage
supply.
RF output power stability
versus temperature on
PA_BOOST pin.
Supply current in Transmit
mode with impedance
matching
Programmable with
steps
Programmable with
1dB steps
RFOP = +20 dBm, on
PA_BOOST
RFOP = +17 dBm, on
PA_BOOST
RFOP = +14 dBm, on
RFO_HF pin
RFOP = + 7 dBm, on
RFO_HF pin
128
mA
106
mA
47
mA
34
mA
(*) IDDR and IDDT are total current consumption including MCU in active.
7.2. LoRa Transceiver Specification
Conditions:
The table below gives the electrical specifications for the transceiver operating with LoRaTM modulation. Following
conditions apply unless otherwise specified: Supply voltage = 3.3 V, Temperature = 25° C, FXOSC = 32 MHz, Error
Correction Code (EC) = 4/5, Packet Error Rate (PER)= 1%, CRC on payload enabled, Payload length = 10 bytes.
With matched impedances
LoRa Receiver Specification
Symbol
Description
IDDR_L (*)
Supply current in receiver
LoRa mode, LnaBoost off
RFS_L125_HF
RF sensitivity, Long-Range
Mode, highest LNA gain,
LnaBoost for Band1, using
split Rx/Tx path
125 kHz bandwidth
RFS_L250_HF
RF sensitivity, Long-Range
Mode, highest LNA gain,
LnaBoost for Band1, using
split Rx/Tx path
Conditions
Band 1, BW = 125 kHz
Band 1, BW = 250 kHz
Band 1, BW = 500 kHz
SF = 6
SF = 7
SF = 8
SF = 9
SF = 10
SF = 11
SF = 12
SF = 6
SF = 7
SF = 8
SF = 9
Min.
< Specification may be changed by Murata without notice >
Murata (China) Investment Co., Ltd.
Typ
21.5
22.2
23.6
-117.5
-122.5
-125.5
-128.5
-131.0
-133.5
-135.5
-114.0
-119.0
-122.0
-125.0
Max
Unit
mA
mA
mA
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
Specification Number : BP-ABZ-C
7/16
250 kHz bandwidth
SF = 10
SF = 11
SF = 12
-127.5
-130.0
-133.0
dBm
dBm
dBm
LoRa Transmitter Specification
Symbol
IDDT_L (*)
IDDT_H_L (*)
Description
Supply current in transmitter
mode
Supply current in transmitter
mode
Conditions
RFOP setting = 14 dBm
RFOP setting = 10 dBm
Using PA_BOOST pin
RFOP setting = 20 dBm
Min.
Typ
47
36
Max
128
Unit
mA
mA
mA
(*) IDDR_L, IDDT_L and IDDT_H_L are total current consumption including MCU in active.
7.3. SIGFOX Transceiver Specification
Conditions:
The table below gives the electrical specifications for the transceiver operating with SIGFOX modulation. Following
conditions apply unless otherwise specified: Supply voltage = 3.3 V, Temperature = 25° C. With matched
impedances.
Notes: To operate as SIGFOX mode, the following configuration is required.
- TCXO_OUT (Pin 47) must be connected to PH0-OSC_IN (Pin46).
- PA12 (Pin 1) must be connected to TXCO_VCC (Pin48).
- SX1276_DIO4 (Pin10) must be connected to PA5 (Pin21).
SIGFOX Receiver Specification
Symbol
Description
Conditions
AT$SB=x,1,
AT$SF=x,1,
AT$SR PER
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Specification Number : BP-ABZ-C
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IWDG reset, a rising edge on one of the three WKUP pins, RTC alarm (Alarm A or Alarm B), RTC tamper event, RTC
timestamp event or RTC Wakeup event occurs.
(*3) STM SigFox Firmware is always in stop mode by default, it wakes up automatically when receiving one
character. Else it wakes up automatically when an interrupt is to be processed and returns in stop mode when
finished.
8. Power Sequences
8.1 Power Up Sequence
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Specification Number : BP-ABZ-C
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9. Reference circuit
In case of using the module as LoRa
VDD
J1
1
2
3
4
5
6
SWCLK
SWDIO
For VDD_TCXO connection
Option1:Connect VDD_TCXO to VDD
Option2:Connect VDD_TCXO to PA12 so
that MCU can control TCXO on/off
Optional
10K
Module reset do not need
external pull up resistor.
Because there is an about
45K permanent pull up
resistor inside of module.
1
2
3
4
5
6
7
8
9
10
11
12
VDD
C3
10uF
C4
1uF
C5
0.1uF
U1
CMWX1ZZABZ-078/091
48
47
46
45
44
43
42
41
40
39
38
37
PA12/USB_DP
PA11/USB_DM
GND
VDD_USB
VDD_MCU
VDD_RF
GND
DBG_SX1276_DIO2
DBG_SX1276_DIO3
SX1276_DIO4
DBG_SX1276_DIO5
DBG_SX1276_DIO1
DBG_SX1276_DIO0
PB15/SPI2_MOSI
VDD_TCXO
PB14/SPI2_MISO
TCXO_OUT
PB13/SPI2_SCK
PH0-OSC_IN
PB12/SPI2_NSS
PH1-OSC_OUT
PA10/USART1_RX
GND
PA9/USART1_TX
BOOT0
PA8/MCO
PA14/SWCLK/LPUART1_TX
PA5/ADC5/DAC2
PA13/SWDIO/LPUART1_RX
PA4/ADC4/DAC1
PB5/LPTIM1_IN1
PA3/ADC3/USART2_RX/LPUART1_RX
PB6/LPTIM1_ETR
PA2/ADC2/USART2_TX/LPUART1_TX
PB7/LPTIM1_IN2
PB2/LPTIM1_OUT
C2
0.1uF
GND
GND
GND
GND
Button1
1
Notes for VREF+:
1. VREF+ can be grounded or floating
when DAC and ADC function are not active.
2. VREF+ should be connected to VDD
if module is battery powered and need to
monitor the battery voltage
2
C6 0.1uF
PB9/I2C1_SDA
PB8/I2C1_SCL
MCU_nRST
PA0/WKUP1
VREF+
STSAFE_nRST
DBG_CRF2
DBG_CRF3
DBG_CRF1
GND
ANT
GND
36
35
34
33
32
31
30
29
28
27
26
25
module reset
VREF+
VDD
C7
1uF
J2
L1
C8
2
1
3
5
4
C9
SMA connector
13
14
15
16
17
18
19
20
21
22
23
24
54
55
56
57
GND
GND
GND
GND
GND
53
52
51
50
49
The VDD_USB is the power supply for
PA11 and PA12.
C1
10uF
SWD connector
R1
VDD_TCXO
VDD_USB
1
2
3
4
5
6
USART2_TX
USART2_RX
USART1_TX
USART1_RX
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Specification Number : BP-ABZ-C
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In case of using the module as SigFox modem with STM SigFox firmware
VDD
J1
1
2
3
4
5
6
SWCLK
SWDIO
1
2
3
4
5
6
SWD connector
R1
10K
Module reset do not need
external pull up resistor.
Because there is an about
45K permanent pull up
resistor inside of module.
1
2
3
4
5
6
7
8
9
10
11
12
VDD
C3
10uF
C4
1uF
C5
0.1uF
48
47
46
45
44
43
42
41
40
39
38
37
PA12/USB_DP
PA11/USB_DM
GND
VDD_USB
VDD_MCU
VDD_RF
GND
DBG_SX1276_DIO2
DBG_SX1276_DIO3
SX1276_DIO4
DBG_SX1276_DIO5
DBG_SX1276_DIO1
U1
CMWX1ZZABZ-099
DBG_SX1276_DIO0
PB15/SPI2_MOSI
VDD_TCXO
PB14/SPI2_MISO
TCXO_OUT
PB13/SPI2_SCK
PH0-OSC_IN
PB12/SPI2_NSS
PH1-OSC_OUT
PA10/USART1_RX
GND
PA9/USART1_TX
BOOT0
PA8/MCO
PA14/SWCLK/LPUART1_TX
PA5/ADC5/DAC2
PA13/SWDIO/LPUART1_RX
PA4/ADC4/DAC1
PB5/LPTIM1_IN1
PA3/ADC3/USART2_RX/LPUART1_RX
PB6/LPTIM1_ETR
PA2/ADC2/USART2_TX/LPUART1_TX
PB7/LPTIM1_IN2
PB2/LPTIM1_OUT
The VDD_USB is must.
Because it is the power
supply for PA11 and PA12.
GND
GND
GND
GND
Button1
1
PB9/I2C1_SDA
PB8/I2C1_SCL
MCU_nRST
PA0/WKUP1
VREF+
STSAFE_nRST
DBG_CRF2
DBG_CRF3
DBG_CRF1
GND
ANT
GND
36
35
34
33
32
31
30
29
28
27
26
25
2
C1 0.1uF
module reset
VREF+
VDD
C6
1uF
J2
2
L1
C8
1
3
5
4
C9
SMA connector
13
14
15
16
17
18
19
20
21
22
23
24
54
55
56
57
GND
GND
GND
GND
GND
53
52
51
50
49
VDD_TCXO
Host Interf ace USART_TX
Host Interf ace USART_RX
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Specification Number : BP-ABZ-C
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10. Tape and Reel packing
2.0±0.1
4.0±0.1 *1
1.5+0.1/-0.0
0.30±0.05
11.5±0.1
13±0.1
24.0±0.3
1.75±0.10
10.1 Dimension of Tape (Plastic tape)
1.5+0.1/-0
12.1±0.1
24.0±0.1
2±0.15
feeding direction
(unit : mm)
10.2 Dimensions of Reel
Label
5
120
φ13±0.2
R5
10
22
φ 80±1
R135
φ
φ330±2
R80
°
W1
W2
Reel inside width W1: 25.5±1.0
Reel outside width W2: 29.5±1.0
Unit: mm
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Specification Number : BP-ABZ-C
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10.3 Taping Diagrams
[1] Feeding Hole : As specified in (1)
[2] Hole for chip : As specified in (1)
[3] Cover tape
: 62μm in thickness
[4] Base tape
: As specified in (1)
[3]
[1]
[2]
[3]
[4]
Feeding Hole
Feeding Direction
Chip
10.4 Leader and Tail tape
Tail tape
(No components) Components
No components
Leader tape
(Cover tape alone)
40 to 200mm
150mm min.
250mm min.
Feeding direction
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-
-
The tape for chips are wound clockwise, the feeding holes to the right side as the tape is pulled
toward the user.
The cover tape and base tape are not adhered at no components area for 250mm min.
Tear off strength against pulling of cover tape : 5N min.
Packaging unit : 1000 pcs/ reel
Material
Base tape : Plastic
Reel
: Plastic
Cover tape, cavity tape and reel are made the anti-static processing.
Peeling of force: 1.3N max. in the direction of peeling as shown below.
1.3 N max.
0.7 N max.
165 to 180 °
Cover tape
Base tape
-
Packaging (Humidity proof Packing)
Label べル
表示ラ
Desiccant
乾燥剤
Humidity
湿度
Indicator
イ ン ジ ケ－タ
表示ラ
Labelベル
防湿梱包袋
Anti-humidity
Plastic Bag
Tape and reel must be sealed with the anti-humidity plastic bag. The bag contains the desiccant
and the humidity indicator.
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11. Notice
11.1 Storage Conditions
Please use this product within 6month after receipt.
- The product shall be stored without opening the packing under the ambient temperature from 5 to
35 °C and humidity from 20 ~ 70 %RH.
(Packing materials, in particular, may be deformed at the temperature over 40 °C)
- The product left more than 6months after reception, it needs to be confirmed the solderbility before
used.
- The product shall be stored in non corrosive gas (Cl2, NH3, SO2, Nox, etc.).
- Any excess mechanical shock including, but not limited to, sticking the packing materials by sharp
object and dropping the product, shall not be applied in order not to damage the packing materials.
This product is applicable to MSL3 (Based on IPC/JEDEC J-STD-020)
- After the packing opened, the product shall be stored at
Murata (China) Investment Co., Ltd.
工商网监
湘ICP备2023018690号
