ESD7108
ESD Protection Diode
Low Capacitance Array for High Speed
Data Lines
The ESD7108 transient voltage suppressor is designed specifically
to protect four high speed differential pairs. Ultra−low capacitance and
low ESD clamping voltage make this device an ideal solution for
protecting voltage sensitive high speed data lines. The flow−through
style package allows for easy PCB layout and matched trace lengths
necessary to maintain consistent impedance for the high speed lines.
•
•
MARKING
DIAGRAM
18
1
7108M
G
UDFN18
CASE 517BV
Features
•
•
•
•
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Integrated 4 Pairs (8 Lines) High Speed Data
Single Connect, Flow through Routing
Low Capacitance (0.25 pF Max, I/O to GND)
Protection for the Following IEC Standards:
IEC 61000−4−2 Level 4
UL Flammability Rating of 94 V−0
This is a Pb−Free Device
7108
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
ORDERING INFORMATION
Device
Typical Applications
Package
Shipping
• V−by−One HS
• LVDS
ESD7108MUTAG
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Rating
Symbol
Value
Unit
Operating Junction Temperature Range
TJ
−55 to +125
°C
Storage Temperature Range
Tstg
−55 to +150
°C
Lead Solder Temperature −
Maximum (10 Seconds)
TL
260
°C
ESD
ESD
±15
±15
kV
kV
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
UDFN18 3000 / Tape & Reel
(Pb−Free)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
See Application Note AND8308/D for further description of
survivability specs.
© Semiconductor Components Industries, LLC, 2014
June, 2014 − Rev. 0
1
Publication Order Number:
ESD7108/D
ESD7108
I/O
Pin 1
I/O
Pin 2
GND
Pin 3
I/O
Pin 4
GND
Pin 6
I/O
Pin 5
I/O
Pin 7
GND
Pin 9
I/O
Pin 8
GND
Pin 13
I/O
Pin 10
GND
Pin 15
Note: Only Minimum of 1 GND connection required
=
Figure 1. Pin Schematic
I/O
1
I/O
2
GND
3
I/O
4
I/O
5
GND
6
I/O
7
I/O
8
GND
9
I/O
10
I/O
11
18
N/C
17 GND
16
N/C
N/C
15 GND
14
N/C
N/C
N/C
13 GND
12
N/C
Figure 2. Pin Configuration
Note: Only minimum of one pin needs to be connected to ground for functionality of all pins. All pins labeled “N/C” should have no electrical connection.
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2
I/O
Pin 11
GND
Pin 17
ESD7108
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter
Reverse Working Voltage
Breakdown Voltage
Symbol
VRWM
VBR
Conditions
Min
Typ
Max
Unit
5.0
V
8.5
V
1.0
mA
0.25
pF
I/O Pin to GND
IT = 1 mA, I/O Pin to GND
5.5
Reverse Leakage Current
IR
VRWM = 5 V, I/O Pin to GND
Clamping Voltage
TLP (Note 1)
VC
IPP = ±8 A
IPP = ±16 A
Junction Capacitance
CJ
VR = 0 V, f = 1 MHz between I/O Pins and GND
Junction Capacitance
Difference
DCJ
VR = 0 V, f = 1 MHz between I/O Pins and GND
14.5
19.5
0.02
pF
1. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
Transmission Line Pulse (TLP) Measurement
L
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 3. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 4 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
S Attenuator
÷
50 W Coax
Cable
10 MW
IM
50 W Coax
Cable
VM
DUT
VC
Oscilloscope
Figure 3. Simplified Schematic of a Typical TLP
System
Figure 4. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
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3
ESD7108
Figure 5. ESD7108 Insertion Loss
Interface
V−by−One HS
Full HD (1920 x 1080p)
240 Hz, 36bit color depth
Data Rate
(Gbps)
Fundamental
Frequency (GHz)
3rd Harmonic
Frequency (GHz)
ESD7108 Insertion
Loss (−dB)
3.71
1.854 (m1)
5.562 (m2)
M1 = 0.058
M2 = 0.175
TCON Board
Connector
Timing Controller
ESD7108
Figure 6. V−by−One HS Layout Diagram (for LCD Panel)
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN18, 5.5x1.5, 0.5P
CASE 517BV
ISSUE A
18
1
SCALE 2:1
L2
2X
0.10 C
2X
ÉÉ
0.10 C
L1
E
DETAIL A
OPTIONAL
CONSTRUCTIONS
TOP VIEW
(A3)
DETAIL B
0.05 C
EXPOSED Cu
A
0.10 C
NOTE 4
A1
SIDE VIEW
DETAIL A
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.10 AND 0.20 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. EXPOSED ENDS OF TERMINALS ARE
ELECTRICALLY ACTIVE.
ÉÉ
ÇÇ
DIM
A
A1
A3
b
D
D2
E
E2
eA
eB
L
L1
L2
MOLD CMPD
DETAIL B
SEATING
PLANE
OPTIONAL
CONSTRUCTION
D2
eA
1
18
11
NOTE 5
E2
12
eB
18X
BOTTOM VIEW
L
b
0.10
M
C A B
0.05
M
C
END VIEW
XXXXM
G
XXXX
M
G
1.50
PITCH
0.75
PITCH
0.60
3X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.15
0.25
5.50 BSC
0.45
0.55
1.50 BSC
0.35
0.45
0.50 BSC
0.75 BSC
0.20
0.40
0.00
0.05
0.10 REF
GENERIC
MARKING DIAGRAM*
NOTE 3
RECOMMENDED
SOLDERING FOOTPRINT*
3X
L
A B
D
PIN ONE
REFERENCE
L
DATE 11 DEC 2012
= Specific Device Code
= Date Code
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
18X
0.50
0.50
1.80
0.50
PITCH
18X
0.30
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON55750E
UDFN18, 5.5X1.5, 0.5P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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