FCPF250N65S3R0L
MOSFET – Power, N-Channel,
SUPERFET III, Easy Drive
650 V, 12 A, 250 mW
Description
SUPERFET III MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provides superior switching performance, and
withstand extreme dv/dt rate. Consequently, SUPERFET III MOSFET
Easy drive series helps manage EMI issues and allows for easier
design implementation.
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VDSS
RDS(ON) MAX
ID MAX
650 V
250 m V
12 A
D
Features
•
•
•
•
•
•
700 V @ TJ = 150°C
Typ. RDS(on) = 210 m
Ultra Low Gate Charge (Typ. Qg = 24 nC)
Low Effective Output Capacitance (Typ. Coss(eff.) = 248 pF)
100% Avalanche Tested
These Devices are Pb−Free and are RoHS Compliant
G
S
POWER MOSFET
Applications
•
•
•
•
Computing / Display Power Supplies
Telecom / Server Power Supplies
Industrial Power Supplies
Lighting / Charger / Adapter
G
D
S
TO−220F
CASE 340BF
MARKING DIAGRAM
$Y&Z&3&K
FCPF250
N65S3R0
$Y
&Z
&3
&K
FCPF250N65S3R0
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
August, 2019 − Rev 4
1
Publication Order Number:
FCPF250N65S3R0L/D
FCPF250N65S3R0L
ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted)
Symbol
Parameter
VDSS
Drain to Source Voltage
VGSS
Gate to Source Voltage
ID
Drain Current
Value
Unit
650
V
− DC
±30
V
− AC (f > 1 Hz)
±30
− Continuous (TC = 25°C)
12*
− Continuous (TC = 100°C)
7.6*
− Pulsed (Note 1)
A
IDM
Drain Current
30*
A
EAS
Single Pulsed Avalanche Energy (Note 2)
57
mJ
IAS
Avalanche Current (Note 2)
2.3
A
EAR
Repetitive Avalanche Energy (Note 1)
0.31
mJ
dv/dt
MOSFET dv/dt
100
V/ns
Peak Diode Recovery dv/dt (Note 3)
20
PD
Power Dissipation
(TC = 25°C)
31
W
0.25
W/°C
−55 to +150
°C
300
°C
− Derate Above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*Drain current limited by maximum junction temperature.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. IAS = 2.3 A, RG = 25 , starting TJ = 25°C.
3. ISD ≤ 6 A, di/dt ≤ 200 A/s, VDD ≤ 400 V, starting TJ = 25°C.
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
Unit
RJC
Thermal Resistance, Junction to Case, Max.
4.07
_C/W
RJA
Thermal Resistance, Junction to Ambient, Max.
62.5
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
Packing Method
Reel Size
Tape Width
Quantity
FCPF250N65S3R0L
FCPF250N65S3R0
TO−220F
Tube
N/A
N/A
50 Units
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2
FCPF250N65S3R0L
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
VGS = 0 V, ID = 1 mA, TJ = 25_C
650
V
VGS = 0 V, ID = 1 mA, TJ = 150_C
700
V
BVDSS / TJ
Breakdown Voltage Temperature
Coefficient
ID = 1 mA, Referenced to 25_C
IDSS
Zero Gate Voltage Drain Current
VDS = 650 V, VGS = 0 V
IGSS
Gate to Body Leakage Current
0.67
V/_C
1
A
±100
nA
4.5
V
250
m
0.77
VDS = 520 V, TC = 125_C
VGS = ±30 V, VDS = 0 V
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
VGS = VDS, ID = 0.29 mA
RDS(on)
Static Drain to Source On Resistance
VGS = 10 V, ID = 6 A
210
Forward Transconductance
VDS = 20 V, ID = 6 A
7.4
S
1010
pF
25
pF
gFS
2.5
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
VDS = 400 V, VGS = 0 V, f = 1 MHz
Coss(eff.)
Effective Output Capacitance
VDS = 0 V to 400 V, VGS = 0 V
248
pF
Coss(er.)
Energy Related Output Capacitance
VDS = 0 V to 400 V, VGS = 0 V
33
pF
Total Gate Charge at 10 V
VDS = 400 V, ID = 6 A, VGS = 10 V
(Note 4)
24
nC
6.1
nC
Qg(tot)
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
ESR
Equivalent Series Resistance
9.7
nC
f = 1 MHz
1.1
VDD = 400 V, ID = 6 A, VGS = 10 V,
Rg = 4.7
(Note 4)
15
ns
13
ns
SWITCHING CHARACTERISTICS
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
40
ns
Turn-Off Fall Time
7.2
ns
tf
SOURCE-DRAIN DIODE CHARACTERISTICS
Maximum Continuous Source to Drain Diode Forward Current
12
A
ISM
Maximum Pulsed Source to Drain Diode Forward Current
30
A
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, ISD = 6 A
1.2
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VDD = 400 V, ISD = 6 A,
dIF/dt = 100 A/s
IS
251
ns
3.4
C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
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3
FCPF250N65S3R0L
TYPICAL PERFORMANCE CHARACTERISTICS
30
VGS = 10.0 V
8.0 V
7.0 V
10
6.5 V
6.0 V
5.5 V
ID, Drain Current (A)
ID, Drain Current (A)
40
1
10
150°C
25°C
−55°C
250 s Pulse Test
TC = 25°C
0.1
0.2
1
10
VDS, Drain−Source Voltage (V)
VDS = 20 V
250 s Pulse Test
1
20
3
Figure 1. On−Region Characteristics
100
TC = 25°C
0.6
0.4
VGS = 10 V
VGS = 20 V
0.2
0.0
0
10
30
20
ID, Drain Current (A)
10
4
10
3
10
2
10
1
10
0
10
10
−55°C
0.01
Ciss
−1
0
1
Crss
2
10
10
10
VDS, Drain−Source Voltage (V)
10
0.5
1.0
1.5
VSD, Body Diode Forward Voltage (V)
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
10
VGS = 0 V
f = 1 MHz
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
25°C
0.1
0.001
0.0
40
Coss
−1
150°C
1
VGS, Gate−Source Voltage (V)
Capacitances (pF)
5
VGS = 0 V
250 s Pulse Test
10
Figure 3. On−Resistance Variation vs.
Drain Current and Gate Voltage
10
9
Figure 2. Transfer Characteristics
IS, Reverse Drain Current (A)
RDS(ON), Drain−Source
On−Resistance (W)
0.8
6
4
5
7
8
VGS, Gate−Source Voltage (V)
Figure 5. Capacitance Characteristics
VDS = 130 V
8
VDS = 400 V
6
4
2
0
3
ID = 6 A
0
6
12
18
24
Qg, Total Gate Charge (nC)
30
Figure 6. Gate Charge Characteristics
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4
FCPF250N65S3R0L
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
3.0
VGS = 0 V
ID = 10 mA
RDS(on), Drain−Source
On−Resistance (Normalized)
BVDSS, Drain−Source
Breakdown Voltage (Normalized)
1.2
1.1
1.0
0.9
0.8
−50
2.5
2.0
1.5
1.0
0.5
0.0
50
100
150
0
TJ, Junction Temperature (5C)
VGS = 10 V
ID = 6 A
−50
0
50
100
150
TJ, Junction Temperature (5C)
Figure 8. On−Resistance Variation
vs. Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
15
100
10
ID, Drain Current (A)
ID, Drain Current (A)
10 s
100 s
1 ms
10 ms
1
DC
Operation in this Area
is Limited by RDS(on)
TC = 25°C
TJ = 150°C
Single Pulse
0.1
0.01
1
10
100
VDS, Drain−Source Voltage (V)
EOSS, (mJ)
4
2
130
260
390
520
VDS, Drain to Source Voltage (V)
50
75
100
125
TC, Case Temperature (5C)
150
Figure 10. Maximum Drain Current
vs. Case Temperature
6
0
5
0
25
1000
Figure 9. Maximum Safe Operating Area
0
10
650
Figure 11. EOSS vs. Drain to Source Voltage
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5
FCPF250N65S3R0L
r(t), Normalized Effective Transient
Thermal Resistance
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
2
1
0.1
DUTY CYCLE − DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
0.001
−5
10
ZJC(t) = r(t) x RJC
RJC = 4.07°C/W
Peak TJ = PDM x ZJC(t) + TC
Duty Cycle, D = t1 / t2
SINGLE PULSE
−4
10
t2
−3
10
−2
−1
10
10
t, Rectangular Pulse Duration (sec)
0
10
Figure 12. Transient Thermal Response Curve
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6
1
10
2
10
FCPF250N65S3R0L
VGS
RL
Qg
VDS
VGS
Qgs
Qgd
DUT
IG = Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
RL
VDS
VDS
90%
90%
90%
VDD
VGS
RG
VGS
DUT
VGS
10%
td(on)
10%
tr
td(off)
ton
tf
toff
Figure 14. Resistive Switching Test Circuit & Waveforms
L
E AS + 1 @ LI AS
2
VDS
BVDSS
ID
IAS
RG
VDD
DUT
VGS
2
ID(t)
VDD
VDS(t)
tp
tp
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
Time
FCPF250N65S3R0L
+
DUT
VDS
−
ISD
L
Driver
RG
Same Type
as DUT
VGS
− dv/dt controlled by RG
− ISD controlled by pulse period
D+
VGS
(Driver)
VDD
Gate Pulse Width
Gate Pulse Period
10 V
IFM, Body Diode Forward Current
ISD
(DUT)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(DUT)
VDD
VSD
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220 FULLPAK 3LD
CASE 340BF
ISSUE O
DATE 31 AUG 2016
10.30
9.80
A
2.90
2.50
3.40
3.00
3.00
2.60
B 19.00
17.70
6.60
6.20
1 X 45°
B 15.70
15.00
3.30 B
2.70
3
1
2.14
10.70
10.30
NOTES:
2.74 (2X)
2.34
4.60
4.30
DESCRIPTION:
B 0.60
0.40
0.90 (3X)
0.50
0.50 M A
1.20
1.00
DOCUMENT NUMBER:
2.70
2.30
1.20(2X)
0.90
98AON13839G
TO−220 FULLPAK 3LD
A. EXCEPT WHERE NOTED CONFORMS TO
EIAJ SC91A.
B DOES NOT COMPLY EIAJ STD. VALUE.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. DIMENSION AND TOLERANCE AS PER ASME
Y14.5−2009.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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