FDB86363-F085

MOSFET - POWERTRENCH), N-Channel 80 V, 110 A, 2.4 mW FDB86363-F085 Features • • • • • Typical RDS(on) = 2.0 mW at VGS = 10 V, ID = 80 A Typical Qg(tot) = 131 nC at VGS = 10 V, ID = 80 A UIS Capability AEC−Q101 Qualified and PPAP Capable This Device is Pb−Free, Halide Free and is RoHS Compliant www.onsemi.com N−Channel (Pin 2) D Applications • • • • • Automotive Engine Control Power Train Management Solenoid and Motor Drivers Integrated Starter/Alternator Primary Switch for 12 V Systems G (Pin 1) S (Pin 3) D2 2 1 G S 3 D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ PIN CONFIGURATION Position Designation Pin 1 Gate Pin 2 / Tab Drain Pin 3 Source MARKING DIAGRAM $Y&Z&3&K FDB86363 $Y &Z &3 &K FDB86363 = ON Semiconductor Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2020 January, 2020 − Rev. 4 1 Publication Order Number: FDB86363−F085/D FDB86363−F085 MOSFET MAXIMUM RATINGS (TJ = 25°C, Unless otherwise noted) Symbol Ratings Units VDSS Drain−to−Source Voltage 80 V VGS Gate−to−Source Voltage ±20 V A ID Parameter Drain Current −Continuous (VGS = 10 V) (Note 1) TC = 25°C 110 −Pulsed TC = 25°C See Figure 4 EAS Single Pulse Avalanche Energy PD Power Dissipation (Note 2) Derate Above 25°C TJ, TSTG Operating and Storage Temperature RθJC Thermal Resistance, Junction to Case RθJA Maximum Thermal Resistance, Junction to Ambient (Note 3) 512 mJ 300 W 2.0 W/°C −55 to +175 °C 0.5 °C/W 43 °C/W Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. 2. Starting TJ = 25°C, L = 0.25 mH, IAS = 64 A, VDD = 80 V during inductor charging and VDD = 0 V during time in avalanche. 3. RθJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2 oz copper. PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Package Shipping† FDB86363 FDB86363−F085 D2PAK (TO−263) (Pb−Free/Halide Free) 800 units / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D www.onsemi.com 2 FDB86363−F085 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min. Typ. Max. Units OFF CHARACTERISTICS BVDSS IDSS IGSS Drain−to−Source Breakdown Voltage ID = 250 mA, VGS = 0 V Drain−to−Source Leakage Current VDS = 80 V, VGS = 0 V, TJ = 25°C 1 mA VDS = 80 V, VGS = 0 V, TJ = 175°C (Note 4) 1 mA Gate−to−Source Leakage Current VGS = ±20 V ±100 nA 3.0 4.0 V mW 80 V ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA RDS(on) Drain−to−Source On−Resistance ID = 80 A, VGS = 10 V, TJ = 25°C 2.0 2.4 ID = 80 A, VGS = 10 V, TJ = 175°C (Note 4) 3.8 4.3 2.0 DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Qg(TOT) Qg(th) VDS = 40 V, VGS = 0 V, f = 1 MHz Gate Resistance f = 1 MHz Total Gate Charge VGS = 0 V to 10 V Threshold Gate Charge VGS = 0 V to 2 V VDD = 64 V, ID = 80 A 10000 pF 1400 pF 95 pF 3.3 W 131 150 nC 18 21 nC Qgs Gate−to−Source Gate Charge 47 nC Qgd Gate−to−Drain “Miller” Charge 24 nC SWITCHING CHARACTERISTICS VDD = 40 V, ID = 80 A, VGS = 10V, RGEN = 6 W ton Turn−On Time td(on) Turn−On Delay 38 ns Rise Time 129 ns Turn−Off Delay 64 ns Fall Time 40 tr td(off) tf toff 231 Turn−Off Time ns ns 135 ns 1.25 1.2 V 88 101 ns 129 157 nC DRAIN−SOURCE DIODE CHARACTERISTICS VSD Source−to−Drain Diode Voltage VGS = 0 V, ISD = 80 A VGS = 0 V, ISD = 40 A trr Reverse−Recovery Time IF = 80 A, DISD/Dt = 100 A/ms, VDD = 64 V Qrr Reverse−Recovery Charge Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production. www.onsemi.com 3 FDB86363−F085 1.2 300 1.0 250 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS 0.8 0.6 0.4 0.2 0 25 50 75 100 125 150 TC, CASE TEMPERATURE(oC) 200 150 100 50 0 25 0.0 175 Figure 1. Normalized Power Dissipation vs. Case Temperature CURRENT LIMITED VGS = 10V BY PACKAGE CURRENT LIMITED BY SILICON 50 75 100 125 150 175 TC, CASE TEMPERATURE(oC) Figure 2. Maximum Continuous Drain Current vs. Case Temperature 2 NORMALIZED THERMAL IMPEDANCE, Z qJC DUTY CYCLE − DESCENDING ORDER 1 0.1 D = 0.50 0.20 0.10 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x Z qJA x RqJA + TC SINGLE PULSE 0.01 −5 10 −4 10 −3 −2 −1 0 10 10 10 t, RECTANGULAR PULSE DURATION(s) 1 10 10 Figure 3. Normalized Maximum Transient Thermal Impedance 10000 IDM, PEAK CURRENT (A) VGS = 10V 1000 100 T C = 25 o C FOR TEMPERATURES ABOVE 25 o C DERATE PEAK CURRENT AS FOLLOWS: 10 I = I2 175 − T C 150 SINGLE PULSE 1 −5 10 −4 10 200 −3 −2 −1 10 10 10 t, RECTANGULAR PULSE DURATION(s) Figure 4. Peak Current Capability www.onsemi.com 4 0 10 1 10 FDB86363−F085 TYPICAL CHARACTERISTICS 1000 100 100us 10 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) 1 1ms SINGLE PULSE TJ = MAX RATED TC = 25oC If R = 0 tAV = (L)(IAS)/(1.3*RATED BV DSS − VDD) If R 00 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS − VDD) +1] IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 2000 1000 10ms 100ms 100 STARTING TJ = 25oC 10 STARTING TJ = 150oC 1 0.001 0.1 1 10 100 200 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 1000 300 PULSE DURATION = 80m s DUTY CYCLE = 0.5% MAX IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 Figure 6. Unclamped Inductive Switching Capability VDD = 5V 200 TJ = 175oC 150 TJ = 25oC 100 TJ = −55oC 50 3 4 5 6 VGS, GATE TO SOURCE VOLTAGE (V) 100 VGS = 0 V 10 TJ = 175 oC 7 TJ = 25 oC 1 0.1 0.01 0.0 0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics 300 300 250 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 1 NOTE: Refer to ON Semiconductor Application Notes AN7514 and AN7515 300 2 0.1 tAV, TIME IN AVALANCHE (ms) Figure 5. Forward Bias Safe Operating Area 250 0.01 VGS 15V Top 10V 8V 7V 6V 5.5V 5V Bottom 200 150 100 5V 50 250 200 150 0 50 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 5V 15V Top 10V 8V 5.5V 7V 6V 5.5V 5V Bottom 100 80m s PULSE WIDTH Tj=25oC 0 VGS 5 Figure 9. Saturation Characteristics 80m s PULSE WIDTH Tj=175oC 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 5 Figure 10. Saturation Characteristics www.onsemi.com 5 FDB86363−F085 rDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) 30 ID = 80A NORMALIZED DRAIN TO SOURCE ON−RESISTANCE TYPICAL CHARACTERISTICS PULSE DURATION = 80m s DUTY CYCLE = 0.5% MAX 25 20 TJ = 175 oC TJ = 25oC 15 10 5 0 2 4 6 8 10 2.0 PULSE DURATION = 80m s DUTY CYCLE = 0.5% MAX 1.6 1.2 0.8 ID = 80A VGS = 10V 0.4 −80 VGS, GATE TO SOURCE VOLTAGE (V) Figure 11. RDSON vs. Gate Voltage 1.10 VGS = VDS ID = 250m A 1.2 0.9 0.6 0.3 0.0 −80 −40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE(oC) 200 CAPACITANCE (pF) 1.05 1.00 0.95 0.90 −80 −40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) 200 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature 100000 Ciss 10000 Coss 1000 Crss f = 1MHz VGS = 0V 10 0.1 ID = 5mA VGS, GATE TO SOURCE VOLTAGE(V) Figure 13. Normalized Gate Threshold Voltage vs. Temperature 100 200 Figure 12. Normalized RDSON vs. Junction Temperature NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 1.5 −40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE( oC) 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE ( V) 10 ID = 80A VDD = 32V 8 VDD = 40V 4 2 0 0 Figure 15. Capacitance vs. Drain to Source Voltage VDD = 48V 6 30 60 90 120 Qg, GATE CHARGE(nC) 150 Figure 16. Gate Charge vs. Gate to Source Voltage POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ ISSUE F SCALE 1:1 GENERIC MARKING DIAGRAMS* XX XXXXXXXXX AWLYWWG IC DOCUMENT NUMBER: DESCRIPTION: XXXXXXXXG AYWW Standard 98AON56370E AYWW XXXXXXXXG AKA Rectifier XXXXXX XXYMW SSG DATE 11 MAR 2021 XXXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week W = Week Code (SSG) M = Month Code (SSG) G = Pb−Free Package AKA = Polarity Indicator *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. D2PAK−3 (TO−263, 3−LEAD) PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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