FDMS007N08LC
N-Channel Shielded Gate
POWERTRENCH) MOSFET
80 V, 84 A, 6.7 mW
Description
T h i s N −C h a n n e l M V M O S F E T i s p r o d u c e d u s i n g
ON Semiconductor’s advanced POWERTRENCH process that
incorporates Shielded Gate technology. This process has been
optimized to minimize on−state resistance and yet maintain superior
switching performance with best in class soft body diode.
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VDS
rDS(on) MAX
ID MAX
80 V
6.7 mW @ 10 V
84 A
Features
•
•
•
•
•
•
•
•
Shielded Gate MOSFET Technology
Max rDS(on) = 6.7 mW at VGS = 10 V, ID = 21 A
Max rDS(on) = 9.9 mW at VGS = 4.5 V, ID = 17 A
50% Lower Qrr than Other MOSFET Suppliers
Lowers Switching Noise/EMI
MSL1 Robust Package Design
100% UIL Tested
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
N−Channel
D
5
4
G
D
6
3
S
D
7
2
S
D
8
1
S
D
Typical Applications
•
•
•
•
Primary DC−DC MOSFET
Synchronous Rectifier in DC−DC and AC−DC
Motor Drive
Solar
G
S
Top
S
S
D
D
D
Pin 1
Bottom
PQFN8 5y6, 1.27P
(Power 56)
CASE 483AE
MARKING DIAGRAM
$Y&Z&3&K
FDMS
007N08LC
$Y
&Z
&3
&K
FDMS007N08LC
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
April, 2018 − Rev. 1
1
Publication Order Number:
FDMS007N08LC/D
FDMS007N08LC
MOSFET MAXIMUM RATINGS (TA = 25°C, Unless otherwise specified)
Parameter
Symbol
Ratings
Unit
VDS
Drain to Source Voltage
80
V
VGS
Gate to Source Voltage
±20
V
A
ID
Drain Current
− Continuous
TC = 25°C (Note 5)
84
− Continuous
TC = 100°C (Note 5)
53
− Continuous
TA = 25°C (Note 1a)
14
345
− Pulsed (Note 4)
EAS
Single Pulse Avalanche Energy (Note 3)
PD
Power Dissipation
Power Dissipation
TJ, TSTG
181.5
mJ
TC = 25°C
92.6
W
TA = 25°C (Note 1a)
2.5
°C
−55 to +150
Operating and Storage Junction Temperature Range
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
RqJC
Thermal Resistance, Junction to Case
RqJA
Thermal Resistance, Junction to Ambient (Note 1a)
Ratings
Unit
1.35
°C/W
50
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Device
Package
Reel Size
Tape Width
Shipping (Qty / Packing)†
FDMS007N08LC
FDMS007N08LC
PQFN8 5×6
(Power 56)
(Pb−Free/Halogen Free)
13″
12 mm
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
ID = 250 mA, VGS = 0 V
80
−
−
V
DBV DSS
DT J
Breakdown Voltage
Temperature Coefficient
ID = 250 mA, referenced to 25°C
−
32
−
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 64 V, VGS = 0 V
−
−
1
mA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
−
−
±100
mA
1.0
1.4
2.5
V
ON CHARACTERISTICS
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 120 mA
DV GS(th)
DT J
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 120 mA, referenced to 25°C
−
−5.6
−
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS = 10 V, ID = 21 A
−
4.9
6.7
mW
VGS = 4.5 V, ID = 17 A
−
6.7
9.9
VGS = 10 V, ID = 21 A, TJ = 125°C
−
8.5
11.6
VDD = 5 V, ID = 21 A
−
84
−
gFS
Forward Transconductance
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2
S
FDMS007N08LC
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
VDS = 40 V, VGS = 0 V, f = 1 MHz
−
2227
3100
pF
Output Capacitance
−
520
760
pF
Crss
Reverse Transfer Capacitance
−
27
40
pF
RG
Gate Resistance
0.1
0.4
0.8
W
−
10
21
ns
−
3
10
Turn−off Delay Time
−
38
61
Fall Time
−
8
16
SWITCHING CHARACTERISTICS
td(on)
tr
td(off)
tf
Turn−on Delay Time
Rise Time
VDD = 40 V, ID = 21 A, VGS = 10 V,
RGEN = 6 W
Qg
Total Gate Charge
VGS = 0V to 10 V, VDD = 40 V, ID = 21 A
−
33
46
nC
Qg
Total Gate Charge
VGS = 0V to 4.5 V, VDD = 40 V, ID = 21 A
−
16
22
nC
Qgs
Gate to Source Charge
VDD = 40 V, ID = 21 A
−
5
−
nC
Qgd
Gate to Drain ”Miller” Charge
VDD = 40 V, ID = 21 A
−
4
−
nC
Qoss
Output Charge
VDD = 40 V, VGS = 0 V
−
30
−
nC
Qsync
Total Gate Charge Sync
VDS = 0 V, ID = 21 A
−
35
−
nC
VGS = 0 V, IS = 2.1 A (Note 2)
−
0.7
1.2
V
VGS = 0 V, IS = 21 A (Note 2)
−
0.8
1.3
V
IF = 10 A, di/dt = 300 A/ms
−
18
32
ns
−
24
28
nC
−
13
23
ns
−
58
92
nC
DRAIN−SOURCE DIODE CHARACTERISTICS
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IF = 10 A, di/dt = 1000 A/ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. RqCA is determined
by the user’s board design.
a) 50°C/W when mounted on
a 1 in2 pad of 2 oz copper.
2.
3.
4.
5.
b) 125°C/W when mounted on
a minimum pad of 2 oz copper.
Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
EAS of 181 mJ is based on starting TJ = 25_C; L = 3 mH, IAS = 11 A, VDD = 80 V, VGS = 10 V. 100% tested at L = 0.1 mH, IAS = 35 A.
Pulsed ID please refer to Fig. 11 SOA graph for more details.
Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by
thermal & electro−mechanical application board design.
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FDMS007N08LC
ID, DRAIN CURRENT (A)
200
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
VGS = 8 V
VGS = 6 V
VGS = 4.5 V
150
VGS = 3.5 V
100
VGS = 3 V
50
PULSE DURATION = 80 m s
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
VDS, DRAIN TO SOURCE VOLTAGE (V)
5
4
VGS = 3.5 V
3
VGS = 4.5 V
2
1
0
5
VGS = 6 V
0
rDS(on), DRAIN TO
SOURCE ON−RESISTANCE(mW)
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
ID = 21 A
VGS= 10 V
1.6
1.4
1.2
1.0
0.8
0
25
50
50
PULSE DURATION = 80m s
DUTY CYCLE = 0.5% MAX
40
ID = 20 A
30
20
TJ = 125 oC
10
0
75 100 125 150
TJ = 25 oC
1
TJ, JUNCTION TEMPERATURE ( oC)
ID, DRAIN CURRENT (A)
PULSE DURATION = 80m s
DUTY CYCLE = 0.5% MAX
VDS = 5 V
150
100
50
0
TJ = 150 oC
TJ = 25 oC
TJ =
0
−55oC
1
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
2
3
4
5
6
7
8
9
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 4. On-Resistance
vs. Gate to Source Voltage
I , SREVERSE DRAIN CURRENT (A)
Figure 3. Normalized On Resistance
vs. Junction Temperature
200
200
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
2.0
0.6
−75 −50 −25
VGS = 10 V
VGS = 8 V
50
100
150
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
1.8
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 3 V
200
100
10
1
0.1
0.01
0.001
0.0
6
VGS = 0 V
Figure 5. Transfer Characteristics
TJ = 150 oC
TJ = 25 oC
TJ = −55oC
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
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FDMS007N08LC
10
10000
ID = 21 A
Ciss
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS (continued)
VDD = 30 V
6
VDD = 40 V
4
VDD = 50 V
1000
Coss
100
Crss
10
2
0
f = 1 MHz
VGS = 0 V
0
10
20
30
Qg, GATE CHARGE (nC)
1
0.1
40
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance
vs. Drain to Source Voltage
90
o
ID DRAIN CURRENT (A)
,
IAS, AVALANCHE CURRENT (A)
100
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
1
0.001
0.01
0.1
1
10
tAV, TIME IN AVALANCHE (ms)
RqJC = 1.35 C/W
72
VGS = 10 V
54
VGS = 4.5 V
36
18
0
25
100
1
10 m s
THIS AREA IS
LIMITED BY rDS(on)
RqJC = 1.35 oC/W
0.1
0.1
100 m s
SINGLE PULSE
TJ = MAX RATED
TC = 25 oC
1 ms
CURVE BENT TO
MEASURED DATA
10 ms
100 ms/DC
1
10
100
VDS, DRAIN to SOURCE VOLTAGE (V)
100
125
150
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
P(PK), PEAK TRANSIENT POWER (W)
10
75
o
500
100
50
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
ID, DRAIN CURRENT (A)
80
500
100000
SINGLE PULSE
RqJC = 1.35 oC/W
TC = 25 oC
10000
1000
100
10
−5
10
Figure 11. Forward Bias Safe Operating Area
−4
10
−3
−2
10
10
t, PULSE WIDTH (sec)
−1
10
Figure 12. Single Pulse Maximum
Power Dissipation
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1
FDMS007N08LC
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
TYPICAL CHARACTERISTICS (continued)
2
1
0.1
0.01
0.001
−5
10
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
SINGLE PULSE
ZqJC(t) = r(t) x RqJC
RqJC = 1.35 oC/W
Peak TJ = PDM x ZqJC(t) + TC
Duty Cycle, D = t1 / t2
−4
10
−3
−2
10
10
−1
10
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United
States and/or other countries.
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE B
DOCUMENT NUMBER:
DESCRIPTION:
98AON13655G
PQFN8 5X6, 1.27P
DATE 06 JUL 2021
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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