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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
FDMS6673BZ
P-Channel PowerTrench® MOSFET
-30 V, -82 A, 6.8 m:
Features
General Description
The FDMS6673BZ has been designed to minimize losses in load
switch applications. Advancements in both silicon and package
technologies have been combined to offer the lowest rDS(on) and
ESD protection.
Max rDS(on) = 6.8 m: at VGS = -10 V, ID = -15.2 A
Max rDS(on) = 12.5 m: at VGS = -4.5 V, ID = -11.2 A
Advanced Package and Silicon Combination
for Low r DS(on)
Applications
HBM ESD Protection Level of 8 kV Typical(Note 3)
Load Switch in Notebook and Server
MSL1 Robust Package Design
Notebook Battery Pack Power Management
RoHS Compliant
D
D
D
D
G
S
S
Pin 1
S
Top
D
55
44
G
D
66
33
S
D
7
22
S
D
88
11
S
Bottom
Power 56
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted.
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
ID
TJ, TSTG
Units
V
±25
V
TC = 25 °C
(Note 5)
-82
-Continuous
TC = 100 °C
-Continuous
TA = 25 °C
(Note 5)
(Note 1a)
-15.2
(Note 4)
-422
-Pulsed
PD
Ratings
-30
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
-52
73
(Note 1a)
Operating and Storage Junction Temperature Range
2.5
-55 to +150
A
W
°C
Thermal Characteristics
RTJC
Thermal Resistance, Junction to Case
RTJA
Thermal Resistance, Junction to Ambient
1.7
(Note 1a)
50
°C/W
Package Marking and Ordering Information
Device Marking
FDMS6673BZ
Device
FDMS6673BZ
©2009 Fairchild Semiconductor Corporation
FDMS6673BZ Rev1.7
Package
Power 56
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMS6673BZ P-Channel PowerTrench® MOSFET
May 2016
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 PA, VGS = 0 V
'BVDSS
'TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 PA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = -24 V, VGS = 0 V
-1
PA
IGSS
Gate to Source Leakage Current
VGS = ±25 V, VDS = 0 V
±10
PA
-3.0
V
-30
V
-18
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 PA
'VGS(th)
'TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 PA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
-1.0
-1.8
7
mV/°C
VGS = -10 V, ID = -15.2 A
5.2
6.8
VGS = -4.5 V, ID = -11.2 A
7.8
12.5
VGS = -10 V, ID = -15.2 A, TJ = 125 °C
7.5
9.8
VDS = -5 V, ID = -15.2 A
76
m:
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = -15 V, VGS = 0 V,
f = 1 MHz
4444
5915
pF
781
1040
pF
695
1045
pF
:
4.5
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
VGS = 0 V to -10 V
Qg
Total Gate Charge
VGS = 0 V to -5 V
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = -15 V, ID = -15.2 A,
VGS = -10 V, RGEN = 6 :
VDD = -15 V,
ID = -15.2 A
14
26
ns
28
45
ns
97
156
ns
79
127
ns
93
130
nC
52
73
nC
13
nC
26
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -2.1 A
(Note 2)
VGS = 0 V, IS = -15.2 A
IF = -15.2 A, di/dt = 100 A/Ps
(Note 2)
0.7
1.20
0.8
1.25
V
33
53
ns
20
32
nC
Notes:
1: RTJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RTJC is guaranteed by design while RTCA is determined by
the user's board design.
a. 50 °C/W when mounted on a
1 in2 pad of 2 oz copper.
2:
3:
4:
5:
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
Pulse Test: Pulse Width < 300 Ps, Duty cycle < 2.0%.
The diode connected between the gate and source servers only as protection against ESD. No gate overvoltage rating is implied.
Pulsed Id please refer to Fig 11 SOA graph for more details.
Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal electro-mechanical application board design.
©2009 Fairchild Semiconductor Corporation
FDMS6673BZ Rev1.7
2
www.fairchildsemi.com
FDMS6673BZ P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted.
120
100
-ID, DRAIN CURRENT (A)
VGS = -4.5 V
80
VGS = -4 V
60
PULSE DURATION = 80 Ps
DUTY CYCLE = 0.5% MAX
VGS = -3.5 V
40
20
VGS = -3 V
0
0
1
2
3
4.0
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = -10 V
VGS = -6 V
VGS = -3 V
3.5
3.0
VGS = -4.5 V
2.0
VGS = -6 V
1.5
1.0
VGS = -10 V
0.5
4
0
20
40
60
80
100
120
-ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance
vs. Drain Current and Gate Voltage
1.6
25
ID = -15.2 A
VGS = -10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
-50
SOURCE ON-RESISTANCE (m:)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = -4 V
VGS = -3.5 V
2.5
-VDS, DRAIN TO SOURCE VOLTAGE (V)
15
5
TJ = 25 oC
2
-IS, REVERSE DRAIN CURRENT (A)
VDS = -5 V
60
40
= 150 oC
20
TJ = -55 oC
0
0
1
2
3
4
200
100
8
10
VGS = 0 V
10
1
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
5
-VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2009 Fairchild Semiconductor Corporation
FDMS6673BZ Rev1.7
6
Figure 4. On-Resistance vs. Gate to
Source Voltage
80
TJ = 25 oC
4
-VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 Ps
DUTY CYCLE = 0.5% MAX
TJ
TJ = 125 oC
10
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
120
100
PULSE DURATION = 80 Ps
ID = -15.2 A DUTY CYCLE = 0.5% MAX
20
Figure 3. Normalized On Resistance
vs. Junction Temperature
-ID, DRAIN CURRENT (A)
PULSE DURATION = 80 Ps
DUTY CYCLE = 0.5% MAX
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
3
www.fairchildsemi.com
FDMS6673BZ P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
ID = -15.2 A
8
CAPACITANCE (pF)
-VGS, GATE TO SOURCE VOLTAGE (V)
10000
10
VDD = 10 V
6
VDD = 15 V
VDD = 20 V
4
Ciss
Coss
1000
2
0
0
20
40
60
80
300
0.1
100
1
Figure 7. Gate Charge Characteristics
30
Figure 8. Capacitance vs. Drain
to Source Voltage
100
-ID, DRAIN CURRENT (A)
50
10
TJ
= 100 oC
TJ =
TJ
= 25 oC
125 oC
80
60
VGS = 10 V
VGS = 4.5 V
40
20
Limited by Package
o
1
0.01
0.1
1
0
25
100 200
10
RTJC = 1.7 C/W
50
150
-4
10
-Ig, GATE LEAKAGE CURRENT (A)
100 us
1 ms
10
10 ms
100 ms
THIS AREA IS
LIMITED BY rDS(on)
1s
SINGLE PULSE
TJ = MAX RATED
10 s
RTJA = 125 oC/W
DC
TA = 25 oC
0.01
0.01
125
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
200
100
0.1
100
o
Figure 9. Unclamped Inductive
Switching Capability
1
75
TC, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
-ID, DRAIN CURRENT (A)
10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
-IAS, AVALANCHE CURRENT (A)
Crss
f = 1 MHz
VGS = 0 V
0.1
VGS = 0 V
-5
10
TJ = 125 oC
-6
10
TJ = 25 oC
-7
10
-8
10
-9
10
1
10
100 200
5
10
15
20
25
30
-VGS, GATE TO SOURCE VOLTAGE (V)
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
©2009 Fairchild Semiconductor Corporation
FDMS6673BZ Rev1.7
0
Figure 12. Igss vs. Vgss
4
www.fairchildsemi.com
FDMS6673BZ P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
P(PK), PEAK TRANSIENT POWER (W)
2000
VGS = -10 V
1000
SINGLE PULSE
RTJA = 125 oC/W
100
TA = 25 oC
10
1
0.5
-4
10
-3
-2
10
-1
10
1
10
100
10
1000
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
NORMALIZED THERMAL
IMPEDANCE, ZTJA
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZTJA x RTJA + TA
SINGLE PULSE
o
0.001
0.0004
-4
10
RTJA = 125 C/W
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Case Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FDMS6673BZ Rev1.7
5
www.fairchildsemi.com
FDMS6673BZ P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE A
5.10
PKG
CL
8
5.10
3.91
A
SEE
DETAIL B
B
5
1.27
8
7
6
5
0.77
4.52
PKG CL
5.85
5.65
6.15
3.75
6.61
KEEP OUT
AREA
1.27
1
4
1
TOP VIEW
2
3
4
0.61
1.27
3.81
OPTIONAL DRAFT
ANGLE MAY APPEAR
ON FOUR SIDES
OF THE PACKAGE
SEE
DETAIL C
5.00
4.80
LAND PATTERN
RECOMMENDATION
0.35
0.15
0.10 C
0.05
0.00
SIDE VIEW
8X
0.08 C
5.20
4.80
1.10
0.90
3.81
0.35
0.15
DETAIL C
SCALE: 2:1
1.27
0.51 (8X)
0.31
(0.34)
0.10
1
2
3
C A B
4
0.76
0.51
(0.52)
6.25
5.90
3.48+0.30
-0.10
(0.50)
(0.30)
(2X)
8
0.20+0.10
-0.15 (8X)
7
6
3.96
3.61
BOTTOM VIEW
0.30
0.05
5
C
SEATING
PLANE
DETAIL B
SCALE: 2:1
NOTES: UNLESS OTHERWISE SPECIFIED
A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,
ISSUE A, VAR. AA,.
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.
E. IT IS RECOMMENDED TO HAVE NO TRACES OR
VIAS WITHIN THE KEEP OUT AREA.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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