FDWS9511L-F085

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Other names and brands may be claimed as the property of others. FDWS9511L-F085 Power MOSFET −40 V, 20.5 mW, −30 A, Single P−Channel Features • • • • • • Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses Wettable Flank Option for Enhanced Optical Inspection AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Symbol Value Unit Drain−to−Source Voltage VDSS −40 V Gate−to−Source Voltage VGS ±20 V ID −30 A Continuous Drain Current RqJC (Notes 1, 3) Steady State Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) TC = 100°C TC = 25°C Power Dissipation RqJA (Notes 1, 2) TC = 25°C PD ID W 68.2 PD D (5,6,7,8) G (4) S (1,2,3) W 3.0 1.5 −298 A TJ, TSTG −55 to +175 °C IS −100 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = −25) EAS 25 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Source Current (Body Diode) −30 A P−CHANNEL MOSFET IDM Operating Junction and Storage Temperature Range 32.0 mW @ −4.5 V A −9.1 −6.5 TC = 100°C TC = 25°C, tp = 10 ms 20.5 mW @ −10 V ID MAX 34.1 TC = 100°C TC = 25°C RDS(ON) MAX −30 TC = 100°C Steady State Pulsed Drain Current TC = 25°C V(BR)DSS −40 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter www.onsemi.com Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1 DFN8 Power 56 CASE 506DW ORDERING INFORMATION See detailed ordering, marking and shipping information on page 2 of this data sheet. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction−to−Case − Steady State RqJC 2.2 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 50 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. Current is limited by wirebond configuration 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2018 June, 2019 − Rev. 1 1 Publication Order Number: FDWS9511L−F085/D FDWS9511L−F085 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = −250 mA −40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Zero Gate Voltage Drain Current V 20 IDSS VGS = 0 V, VDS = −40 V mV/°C TJ = 25°C −1 mA TJ = 175°C −1 mA ±100 nA IGSS VDS = 0 V, VGS = ±16 V VGS(TH) VGS = VDS, ID = −250 mA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient Drain−to−Source On Resistance −1 VGS(TH)/TJ −1.8 −3 V −5.1 RDS(on) mV/°C VGS = −10 V ID = −30 A 17 20.5 VGS = −4.5 V ID = −15 A 26 34 mW CHARGES, CAPACITANCES & GATE RESISTANCE VGS = 0 V, f = 100 KHz, VDS = −20 V Input Capacitance CISS Output Capacitance COSS 470 Reverse Transfer Capacitance CRSS 26 Gate Resistance pF 1200 RG VGS = 0.5 V, f = 1 MHz 37 W QG(TOT) VGS = −4.5 V, VDS = −20 V; ID = −30 A 8 nC VGS = −10 V, VDS = −20 V; ID = −30 A 18 QG(TH) VGS = 0 to −1 V 1 Gate−to−Source Gate Charge QGS VDD = −20 V, ID = −30 A 4 Gate−to−Drain “Miller” Charge QGD 3 Plateau Voltage VGP −3.8 V 8 ns Total Gate Charge Threshold Gate Charge SWITCHING CHARACTERISTICS VDD = −20 V, ID = −30 A, VGS = −10 V, RGEN = 6 W Turn−On Delay Time td(ON) Turn−On Rise Time tr Turn−Off Delay Time td(OFF) 112 tf 40 Turn−Off Fall Time 28 DRAIN−SOURCE DIODE CHARACTERISTICS Source−to−Drain Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD tRR ta ISD = −30 A, VGS = 0 V −0.9 −1.3 ISD = −15 A, VGS = 0 V −0.85 −1.2 VGS = 0 V, dISD/dt = 100 A/ms, IS = −30 A 36 V ns 18 tb 18 QRR 24 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperatures. PACKAGE MARKING AND ORDERING INFORMATION Device FDWS9511L−F085 Device Marking Package Reel Size Tape Width Quantity FDWS9511L Power 56 13″ 12 mm 3000 units www.onsemi.com 2 FDWS9511L−F085 TYPICAL CHARACTERISTICS 1.0 0.8 0.6 0.4 0.2 0 ZqJC, NORMALIZED THERMAL IMPEDANCE 50 Current Limited by Package 45 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 40 35 30 VGS = 10 V 25 20 15 10 5 0 25 50 75 100 125 150 0 175 25 50 75 100 125 150 175 TC, CASE TEMPERATURE (°C) TC, CASE TEMPERATURE (°C) Figure 1. Normalized Power Dissipation vs. Case Temperature Figure 2. Maximum Continuous Drain Current vs. Case Temperature 2 1 50% Duty Cycle 20% PDM 10% 5% 0.1 2% t1 t2 DUTY CYCLE, D = t1/t2 Peak TJ = PDM X ZqJC X RqJC + TC 1% Single Pulse 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance 1000 IDM, PEAK CURRENT (A) VGS = −10 V TC = 25°C For temperatures above 25°C derate peak current as follows: ƪǸ I + I 25 100 ƫ 175 * T C 150 Single Pulse 10 0.00001 0.0001 0.001 0.01 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 3 0.1 1 10 FDWS9511L−F085 TYPICAL CHARACTERISTICS 100 Operation in this area may be limited by package IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 1K 100 100 ms 10 TC = 25°C TJ = Max Rated Single Pulse 1 1 ms Operation in this area may be limited by RDS(on) 0.1 0.1 10 ms 100 ms 1 10 120 −ID, DRAIN CURRENT (A) −IS, REVERSE DRAIN CURRENT (A) TJ = 175°C 2 TJ = −55°C 3 4 6 5 7 8 10 1 100 VGS = 0 V 10 1 0.1 TJ = 175°C 0.01 TJ = −55°C TJ = 25°C 0 0.2 0.6 0.4 0.8 1.2 1.0 −VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics 250 ms Pulse Width TJ = 25°C 120 VGS = 10 V 4.5 V 40 4.0 V 3.5 V 2 3 4 5 VGS = 10 V 7.0 V 80 5.0 V 4.5 V 40 4.0 V 3.5 V 0 1 250 ms Pulse Width TJ = 175°C 7.0 V 5.0 V 0 0.1 VGS, GATE−TO−SOURCE VOLTAGE (V) 80 0 100 0.001 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) TJ = 25°C 1 0.01 Figure 6. Unclamped Inductive Switching Capability 20 0 0.001 Figure 5. Forward Bias Safe Operating Area VDS = −5 V 40 NOTE: Refer to ON Semiconductor Application Notes AN7514 and AN7515 tAV, TIME IN AVALANCHE (mS) Pulse Duration = 250 ms Duty Cycle = 0.5% Max 60 Starting TJ = 150°C −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 80 Starting TJ = 25°C 10 1 100 If R = 0, tAV=(L)(IAS)/(1.3*Rated BVDSS− VDD) If R ≠ 0, tAV=(L/R)In[(IAS*R)/(1.3*Rated BVDSS− VDD)+1] 0 1 2 3 4 −VDS, DRAIN−SOURCE VOLTAGE (V) VDS, DRAIN−SOURCE VOLTAGE (V) Figure 9. Saturation Characteristics Figure 10. Saturation Characteristics www.onsemi.com 4 5 FDWS9511L−F085 TYPICAL CHARACTERISTICS RDS(on), NORMALIZED DRAIN−SOURCE ON−RESISTANCE RDS(on), ON−RESISTANCE (mW) 140 Pulse Duration = 250 ms Duty Cycle = 0.5% Max 105 ID = −30 A 70 TJ = 175°C 35 TJ = 25°C 0 5 4 6 7 9 8 10 1.2 1.0 0.8 0.6 −80 −40 0 40 80 120 160 Figure 11. RDS(on) vs. Gate Voltage Figure 12. Normalized RDS(on) vs. Junction Temperature 200 1.10 VGS = VDS ID = −250 mA 1.0 0.8 0.6 0.4 −80 −40 40 0 80 120 160 200 ID = −1 mA 1.05 1.00 0.95 0.90 −80 −40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 13. Normalized Gate Threshold Voltage vs. Temperature Figure 14. Normalized Drain−to−Source Breakdown Voltage vs. Junction Temperature VGS, GATE−TO−SOURCE VOLTAGE (V) 10K CAPACITANCE (pF) 1.4 TJ, JUNCTION TEMPERATURE (°C) 1.2 CISS 1K COSS 100 CRSS 10 1 ID = 30 A VGS = 10 V 1.6 VGS, GATE−TO−SOURCE VOLTAGE (V) NORMALIZED DRAIN−TO−SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 3 1.8 f = 1 MHz VGS = 0 V 0.1 1 10 40 10 VDD = 16 V VDD = 24 V 8 6 VDD = 20 V 4 2 0 0 4 8 12 16 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 15. Capacitance vs. Drain−to−Source Voltage Figure 16. Gate Charge vs. Gate−to−Source Voltage www.onsemi.com 5 20 FDWS9511L−F085 PACKAGE DIMENSIONS DFN8 5.1x6.3, 1.27P CASE 506DW ISSUE O www.onsemi.com 6 FDWS9511L−F085 POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ◊ N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 www.onsemi.com 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative FDWS9511L−F085/D