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Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
FDWS9520L-F085
Power MOSFET, Dual
P-Channel
−40 V, −20 A, 12.5 mW
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
Wettable Flanks for Enhanced Optical Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
−40 V
12.5 mW @ −10 V
−20 A
19.5 mW @ −4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−40
V
Gate−to−Source Voltage
VGS
±16
V
Continuous Drain
Current RqJC
(Notes 1, 3)
TC = 25_C
G1 (2)
−60.8
ID
Steady
State
TC = 100_C
Power Dissipation
RqJC (Note 1)
TC = 25_C
Continuous Drain
Current RqJA (Notes
1, 2, 3)
TC = 25_C
TC = 100_C
Power Dissipation
RqJA (Notes 1 & 2)
Pulsed Drain Current
S1 (1)
Operating Junction and Storage Temperature
Source Current (Body Diode)
S2 (3)
W
37.5
−12.2
A
−8.6
TC = 25_C
TC = 25_C, tp = 10 ms
G2 (4)
A
75
PD
TC = 100_C
TC = 100_C
D2 (5,6)
−43.0
ID
Steady
State
D1 (7,8)
3.0
PD
1
W
1.5
IDM
−281
A
TJ, Tstg
−55 to
+175
°C
IS
−20
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = −19)
EAS
90
mJ
Lead Temperature for Soldering Purposes
(1/83 from case for 10 s)
TL
260
°C
PQFN8 5x6, 1.27P
CASE 483BL
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 3 of this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
2
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
50
°C/W
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2018
August, 2018 − Rev. 0
1
Publication Order Number:
FDWS9520L−F085/D
FDWS9520L−F085
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Condition
Min
Drain to Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
−40
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/ TJ
Typ
Max
Unit
Off Characteristics
IDSS
Zero Gate Voltage Drain Current
mV/_C
21
VGS = 0 V, VDS = −40 V
TJ = 25°C
−1
mA
TJ = 175°C
−1
mA
±100
nA
−3
V
IGSS
VDS = 0 V, VGS = ±16 V
VGS(TH)
VGS = VDS, ID = −250 mA
Zero Gate Voltage Drain Current
V
On Characteristics (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
Drain−to−Source On Resistance
−1.8
mV/_C
−5.5
VGS(TH)/TJ
RDS(on)
−1
VGS = −10 V
ID = −20 A
10.4
12.5
VGS = −4.5 V
ID = −10 A
14.6
19.5
mW
Charges, Capacitances & Gate Resistance
Input Capacitance
Ciss
Output Capacitance
Reverse Transfer Capacitance
VGS = 0 V, f = 1 MHz, VDS = −20 V
2370
pF
Coss
940
pF
Crss
40
pF
17
W
VGS = −10 V, VDS = −32 V; ID = −20 A
33
nC
VGS = −4.5V, VDS = −32 V; ID = −20 A
13
Qg(th)
VGS = 0 to −1 V
2
Gate to Source Gate Charge
Qgs
VDD = −20 V, ID = −20 A
7
Gate to Drain “Miller” Charge
Qgd
4
Plateau Voltage
VGP
−4
V
8
ns
Gate Resistance
Total Gate Charge
Threshold Gate Charge
Rg
QG(TOT)
VGS = 0.5 V, f = 1 MHz
Switching Characteristics
VDD = −20 V, ID = −20 A, VGS = −10 V,
RGEN = 6 W
Turn−On Delay Time
td(ON)
Turn−On Rise Time
tr
21
ns
Turn−Off Delay Time
td(OFF)
120
ns
tf
34
ns
Turn−Off Fall Time
Drain−Source Diode Characteristics
Source to Drain Diode Voltage
Reverse Recovery Time
VSD
TRR
ISD = −20 A, VGS = 0 V
−0.9
−1.25
V
ISD = −10 A, VGS = 0 V
−0.83
−1.2
V
VGS = 0 V, dISD/dt = 100 A/us, IS = −20 A
46
Charge Time
ta
22
Discharge Time
tb
24
QRR
37
Reverse Recovery Charge
ns
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
5. Switching characteristics are independent of operating junction temperatures.
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2
FDWS9520L−F085
ORDERING INFORMATION
Device
FDWS9520L−F085
Device Marking
Package
Shipping†
FDWS9520L
PQFN8 5x6, 12.7P
(Pb−Free, Halogen Free)
3,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
www.onsemi.com
3
FDWS9520L−F085
1.2
70
1.0
60
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
TYPICAL CHARACTERISTICS
0.8
0.6
0.4
0.2
50
40
VGS = −10 V
30
20
10
0
0
0
ZqJA, NORMALIZED THERMAL IMPEDANCE
CURRENT LIMITED BY
PACKAGE
25
50
75
100
125
150
175
25
50
75
125
100
150
175
TC, CASE TEMPERATURE (°C)
TC, CASE TEMPERATURE (°C)
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
1
50% Duty Cycle
20%
PDM
10%
5%
0.1
2%
t1
t2
DUTY CYCLE, D = t1/t2
Peak TJ = PDM X ZqJA X RqJA + TC
1%
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
1000
IDM, PEAK CURRENT (A)
VGS = −10 V
TC = 25°C
For temperatures above 25°C
derate peak current as follows:
ƪǸ
I + I 25
100
ƫ
175 * T C
150
Single Pulse
10
0.00001
0.0001
0.001
0.01
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
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4
0.1
1
10
FDWS9520L−F085
TYPICAL CHARACTERISTICS
100
IAS, AVALANCHE CURRENT (A)
ID, DRAIN CURRENT (A)
100
10
100 ms
OPERATION IN
THIS AREA MAY
BE LIMITED BY
PACKAGE
OPERATION IN
THIS AREA MAY
SINGLE PULSE
BE LIMITED BY
TJ = max rated
rDS(on)
TC = 25°C
1
1 ms
10 ms
100 ms
If R = 0
tAV=(L)(IAS)/(1.3*Rated BVDSS− VDD)
If R ≠ 0
tAV=(L/R)In[(IAS*R)/(1.3*Rated BVDSS− VDD)+1]
10
0.1
0.1
1
10
Starting TJ = 25°C
Starting TJ = 150°C
1
0.01
100
0.1
10
1
100
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
tAV, TIME IN AVALANCHE (mS)
Figure 5. Forward Bias Safe Operating Area
Note: Refer to ON Semiconductor Application Notes AN7514
and AN7515
Figure 6. Unclamped Inductive Switching
Capability
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
80
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
100
VDS = −5 V
60
TJ = 175°C
TJ = 25°C
40
20
TJ = −55°C
0
2
3
4
1
0.1
TJ = 175°C
0.01
0.001
6
TJ = −55°C
TJ = 25°C
0
0.2
0.6
0.4
0.8
1.0
VGS, GATE−TO−SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
150
ID, DRAIN CURRENT (A)
5
VGS = 0 V
10
7.0 V
6
250 ms Pulse Width
TJ = 25°C
5.0 V
RDS(ON), NORMALIZED DRAIN−
SOURCE ON−RESISTANCE
1
100
VGS = 10 V
100
4.5 V
4.0 V
50
3.5 V
1.2
3.5 V
= =3.5V
250 ms Pulse Width VVGS
GS
4.0 V
4.0V
TJ = 25°C
4.5VV
4.5
5.0VV
5.0
7.0VV
7.0
10VV
10
5
4
3
2
1
0
0
0
1
2
3
0
5
4
30
60
90
120
150
VDS, DRAIN−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 9. Saturation Characteristics
Figure 10. Normalized RDS(ON) vs. Drain Current
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5
FDWS9520L−F085
TYPICAL CHARACTERISTICS
1.8
ID = −20 A
RDS(ON), NORMALIZED DRAIN−
SOURCE ON−RESISTANCE
RDS(on), ON−RESISTANCE (mW)
100
75
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
50
TJ = 175°C
25
TJ = 25°C
0
4
3
5
6
8
7
1.2
1.0
0.8
0
−40
40
80
160
120
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. RDS(on) vs. Gate Voltage
Figure 12. Normalized RDS(on) vs. Junction
Temperature
1.3
200
1.10
VGS = VDS
ID = −250 mA
1.1
0.9
0.7
0.5
0.3
−80
40
0
−40
80
120
160
200
ID = −1 mA
1.05
1.00
0.95
0.90
−80
−40
0
40
80
120
160
200
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain−to−Source
Breakdown Voltage vs. Junction Temperature
VGS, GATE−TO−SOURCE VOLTAGE (V)
10K
CISS
CAPACITANCE (pF)
1.4
0.6
−80
9
NORMALIZED DRAIN−TO−SOURCE
BREAKDOWN VOLTAGE
NORMALIZED GATE THRESHOLD VOLTAGE
2
ID = −20 A
VGS = −10 V
1.6
1K
COSS
100
10
CRSS
f = 1 MHz
VGS = 0 V
1
0.1
1
10
10
VDD = −20 V
8
VDD = −16 V
6
VDD = −24 V
4
2
0
0
40
8
16
24
32
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 15. Capacitance vs. Drain−to−Source
Voltage
Figure 16. Gate Charge vs. Gate−to−Source
Voltage
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6
40
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5X6, 1.27P
CASE 483BL
ISSUE A
DOCUMENT NUMBER:
DESCRIPTION:
98AON13690G
PQFN8 5X6, 1.27P
DATE 23 APR 2021
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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