FOD073LR2

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This device is specified to operate at a 3.3V supply voltage. ■ Low input current: 0.5mA ■ Dual channel 8-pin SOIC package ■ High CTR: 400% minimum ■ High CMR: 10kV/µs ■ Guaranteed performance over temperature 0°C to 70°C An integrated emitter – base resistor provides superior stability over temperature. The combination of a very low input current of 0.5mA and a high current transfer ratio of 2000% (typical) makes this device particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to LVCMOS as well as high fan-out LVTTL requirements. ■ U.L. recognized (File # E90700) ■ LVTTL/LVCMOS Compatible output Applications ■ Digital logic ground isolation – LVTTL/LVCMOS ■ Telephone ring detector ■ EIA-RS-232C line receiver An internal noise shield provides exceptional common mode rejection of 10kV/µs. ■ High common mode noise line receiver ■ µP bus isolation ■ Current loop receiver Schematic Package Outline + 1 8 VCC VF1 _ 2 _ 3 7 V01 6 V02 VF2 + 4 ©2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 5 GND Truth Table LED VO ON LOW OFF HIGH www.fairchildsemi.com FOD073L — LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler April 2009 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Value Units TSTG Storage Temperature -40 to +125 °C TOPR Operating Temperature -40 to +85 °C TSOL Lead Solder Temperature (Wave solder only. See reflow profile for surface mount devices) 260 for 10 sec °C EMITTER IF (avg) DC/Average Forward Input Current Each Channel 20 mA IF (pk) Peak Forward Input Current (50% duty cycle, 1ms P.W.) Each Channel 40 mA Peak Transient Input Current (≤1µs P. W., 300 pps) Each Channel 1.0 A VR Reverse Input Voltage Each Channel 5 V PD Input Power Dissipation Each Channel 35 mW Average Output Current Each Channel 60 mA Emitter-Base Reverse Voltage (FOD070L, FOD270L) Each Channel 0.5 V Supply Voltage, Output Voltage Each Channel -0.5 to 7 V Output power dissipation Each Channel 100 mW IF (trans) DETECTOR IO (avg) VEB VCC, VO PD ©2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 www.fairchildsemi.com 2 FOD073L — LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Absolute Maximum Ratings (No derating required up to 85°C) Individual Component Characteristics Symbol Parameter Test Conditions Min. Typ.* Max. Unit 1.35 1.7 V EMITTER VF Input Forward Voltage TA =25°C IF = 1.6mA (Each Channel) BVR Input Reverse Breakdown Voltage TA =25°C, IR = 10µA (Each Channel) 1.75 5.0 V DETECTOR IOH Logic High Output Current IF = 0 mA, VO = VCC = 3.3V (Each Channel) 0.05 25 µA ICCL Logic Low Supply Current IF1 = IF2 = 1.6mA, VO1 = VO2 = Open, VCC = 3.3V 0.8 3 mA ICCH Logic High Supply Current IF1 = IF2 = 0mA, VO1 = VO2 = Open, VCC = 3.3V 0.01 2 µA Transfer Characteristics Symbol Parameter CTR COUPLED Current Transfer Ratio (Note 1) VOL Logic Low Output Voltage Test Conditions Min. IF = 0.5mA, VO = 0.4V, VCC = 3.3V 400 Typ.* Max. Unit 7000 % V IF = 1.6mA, IO = 8mA, VCC = 3.3V 0.07 0.3 IF = 5mA, IO = 15mA, VCC = 3.3V 0.07 0.4 Switching Characteristics (VCC = 3.3 V) Symbol Parameter Typ.* Max. Unit TPHL Propagation Delay Time to Logic LOW RL = 4.7kΩ, IF = 0.5mA (Fig. 9) 5 30 µs TPLH Propagation Delay Time to Logic HIGH RL = 4.7kΩ, IF = 0.5mA (Fig. 9) 25 90 µs |CMH| Common Mode Transient IF = 0 mA, |VCM| = 10 VP-P, TA = 25°C, Immunity at Logic HIGH RL = 2.2kΩ (Note 2) (Fig. 10) Common Mode Transient IF = 1.6mA, |VCM| = 10 VP-P, RL = 2.2kΩ, Immunity at Logic LOW TA = 25°C (Note 2) (Fig. 10) |CML| Test Conditions Min. 1,000 10,000 V/µs 1,000 10,000 V/µs *All typicals at TA = 25°C ©2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 www.fairchildsemi.com 3 FOD073L — LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Electrical Characteristics (TA = 0 to 70°C unless otherwise specified) Isolation Characteristics Symbol II-O Characteristics Test Conditions Input-Output Insulation Leakage Current Relative humidity = 45%, TA = 25°C, t = 5 s, VI-O = 3000 VDC (Note 3) VISO Withstand Insulation Test Voltage RH ≤ 50%, TA = 25°C, II-O ≤ 2µA, t = 1 min. (Note 3) RI-O Resistance (Input to Output) VI-O = 500 VDC (Note 3) CI-O Capacitance (Input to Output) f = 1 MHz (Notes 3, 4) Min. Typ.* Max. Unit 1.0 µA 2500 VRMS 1012 Ω 0.7 pF II-I Input-Input Insulation Leakage Current RH ≤ 45%, VI-I = 500 VDC (Note 5) RI-I Input-Input Resistance VI-I = 500 VDC (Note 5) 1011 Ω CI-I Input-Input Capacitance f = 1 MHz (Note 5) 0.03 pF 0.005 µA *All typicals at TA = 25°C Notes: 1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO > 2.0V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO