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FOD8163, FOD8163T
3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in
Stretched Body SOP 6-Pin
Features
Description
• 8 mm Creepage and Clearance Distance, and
0.4 mm Insulation Distance to Achieve Reliable and
High Voltage Insulation
• High Noise Immunity Characterized by Common
Mode Transient Immunity (CMTI)
– 20 kV/s Minimum CMTI
• Specifications Guaranteed Over 3 V to 5.5 V Supply
Voltage and -40°C to 100°C Extended Industrial
Temperature Range
• High-Speed, 10 Mbit/s Data Rate (NRZ)
• Safety and Regulatory Approvals
– UL1577, 5,000 VACRMS for 1 Minute
– DIN-EN/IEC60747-5-5, 1,140 V Peak Working
Immunity Insulation Voltage
The FOD8163 series is a 3.3 V / 5 V high-speed logic
gate optocoupler with open-collector output, which
supports isolated communications allowing digital
signals to communicate between systems without
conducting ground loops or hazardous voltages.
Applications
• Isolating Intelligent Power Module
• Isolating Industrial Communication Interface
The FOD8163 series utilizes stretched body package to
achieve 8 mm creepage and clearance distances
(FOD8163T), and optimized IC design to achieve reliably
high-insulation voltage and high-noise immunity.
The FOD8163 series consists of an aluminium gallium
arsenide (AlGaAs) light emitting diode and an integrated
high-speed photodetector. The output of the detector IC
is an open collector schottky-clamped transistor. The
electrical and switching characteristics are guaranteed
over the extended industrial temperature range of -40°C to
100°C and a VCC range of 3 V to 5.5 V.
Functional Schematic
Related Resources
•
•
•
•
www.fairchildsemi.com/products/optoelectronics/
www.fairchildsemi.com/pf/FO/FOD8160.html
www.fairchildsemi.com/pf/FO/FODM8061.html
www.fairchildsemi.com/pf/FO/FODM611.html
6 VCC
ANODE 1
NC 2
5 VO
CATHODE 3
4 GND
Figure 1. Functional Schematic
Figure 2. Package Outline
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
March 2016
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Truth Table
LED
VO
Off
HIGH
On
LOW
Pin Definitions
Pin #
Name
1
ANODE
Description
Anode
2
NC
3
CATHODE
Not Connected
4
GND
Output Ground
5
VO
Output Voltage
6
VCC
Output Supply Voltage
Cathode
Pin Configuration
ANODE
NC
1
6
2
5
3
4
CATHODE
VCC
VO
GND
Figure 3. Pin Configuration
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
2
As per DIN EN/IEC60747-5-5, this optocoupler is suitable for “safe electrical insulation” only within the safety limit data.
Compliance with the safety ratings shall be ensured by means of protective circuits.
Characteristics
Parameter
Installation Classifications per DIN VDE 0110/1.89 Table 1,
For Rated Mains Voltage
FOD8163
FOD8163T
< 150 VRMS
I–IV
I–IV
< 300 VRMS
I–IV
I–IV
< 450 VRMS
I–III
I–IV
< 600 VRMS
I–III
I–III
40/100/21
40/100/21
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Comparative Tracking Index
Symbol
VPR
2
2
175
175
Value
Parameter
Unit
FOD8163
FOD8163T
Input-to-Output Test Voltage, Method B, VIORM x 1.875 = VPR,
100% Production Test with tm = 1 s, Partial Discharge < 5 pC
1,671
2,137
Vpeak
Input-to-Output Test Voltage, Method A, VIORM x 1.6 = VPR,
Type and Sample Test with tm = 10 s, Partial Discharge < 5 pC
1,426
1,824
Vpeak
891
1,140
Vpeak
VIORM
Maximum Working Insulation Voltage
VIOTM
Highest Allowable Over-Voltage
6,000
8,000
Vpeak
External Creepage
8.0
8.0
mm
External Clearance
7.0
8.0
mm
Distance Through Insulation (Insulation Thickness)
≥ 0.4
≥ 0.4
mm
DTI
Safety Limit Values – Maximum Values Allowed in the
Event of a Failure,
Case Temperature
150
150
°C
IS,INPUT
Input Current
200
200
mA
PS,OUTPUT
Output Power
600
600
mW
109
109
TS
RIO
Insulation Resistance at TS, VIO = 500 V
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
3
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Safety and Insulation Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified.
Symbol
Value
Unit
TSTG
Storage Temperature
-40 to +125
°C
TOPR
Operating Temperature
-40 to +100
°C
Junction Temperature
-40 to +125
°C
260 for 10 sec
°C
TJ
TSOL
Parameter
Lead Solder Temperature
(Refer to Reflow Temperature Profile)
Input Characteristics
IF
Average Forward Input Current
25
mA
VR
Reverse Input Voltage
5.0
V
45
mW
PDI
(1)
Input Power Dissipation
Output Characteristics
VCC
Supply Voltage
0 to 7.0
V
VO
Output Voltage
-0.5 to VCC + 0.5
V
IO
Average Output Current
50
mA
Output Power Dissipation(1)
85
mW
PDO
Note:
1. No derating required up to 100°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
TA
Parameter
Min.
Max.
Unit
Ambient Operating Temperature
-40
+100
ºC
VCC
Supply Voltages(2)
3.0
5.5
V
VFL
Logic Low Input Voltage
0
0.8
V
IFL
Logic Low Input Current
250
A
IFH
Logic High Input Current
N
Fan Out (at RL = 1 k)
RL
Output Pull-up Resistor
6.0
330
15
mA
5
TTL loads
4000
Note:
2. 0.1 F bypass capacitor must be connected between pins 4 and 6.
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
4
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Absolute Maximum Ratings
Apply over all recommended conditions, typical value is measured at TA = 25°C.
Symbol
Parameter
Conditions
Min.
VISO
Input-Output Isolation
Voltage
TA = 25°C, R.H. < 50%, t = 1.0 min,
II-O 20 A(3)(4)
5,000
RISO
Isolation Resistance
VI-O = 500 V(3)
CISO
Isolation Capacitance
(3)
VI-O = 0 V, frequency = 1.0 MHz
Typ.
Max.
Unit
VACRMS
1011
1.0
pF
Notes:
3. Device is considered a two-terminal device: pins 1, 2 and 3 are shorted together and pins 4, 5, and 6 are shorted
together.
4. 5,000 VACRMS for 1-minute duration is equivalent to 6,000 VACRMS for 1-second duration.
Electrical Characteristics
Apply over all recommended conditions; TA = -40°C to +100°C, 3.0 V VCC 5.5 V; unless otherwise specified.
Typical value is measured at TA = 25°C and VCC = 3.3 V or VCC = 5 V.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Figure
1.05
1.45
1.80
V
4
Input Characteristics
VF
Forward Voltage
Temperature Coefficient
of Forward Voltage
IF = 10 mA
BVR
Input Reverse
Breakdown Voltage
IR = 10 A
IFHL
Threshold Input Current
VO = 0.6 V,
IOL(sink) = 13 mA
2.0
6.0
mA
5
IF = rated IFHL,
IOL(sink) = 13 mA
0.4
0.6
V
6
(VF / TA)
-1.8
mV/°C
5.0
V
Output Characteristics
VOL
Logic Low Output
Voltage
IOH
Logic High Output
Current
IF = 250 A, VO = 3.3 V
8.0
50.0
A
7
IF = 250 A, VO = 5.0 V
3.0
40.0
A
7
ICCL
Logic Low Output
Supply Current
IF = 10 mA, VCC = 3.3 V
5.3
8.5
mA
8, 10
IF = 10 mA, VCC = 5.0 V
7.1
10.0
mA
8, 10
ICCH
Logic High Output
Supply Current
IF = 0 mA, VCC = 3.3 V
3.5
7.0
mA
9, 10
IF = 0 mA, VCC = 5.0 V
5.3
9.0
mA
9, 10
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
5
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Isolation Characteristics
Apply over all recommended conditions; TA = -40°C to +100°C, 3.3 V VCC 5 V, IF = 6.0 mA; unless otherwise specified. Typical value is measured at TA = 25°C and VCC = 3.3 V.
Symbol
Parameter
Conditions
Min.
Typ.
RL = 350
Data Rate
Max.
Unit
10
Mbit/sec
Figure
tPHL
Propagation Delay to
Logic Low Output
RL = 350 , CL = 15 pF
42
80
ns
11, 13,
16
tPLH
Propagation Delay to
Logic High Output
RL = 350 , CL = 15 pF
53
90
ns
11, 13,
16
PWD
Pulse Width Distortion,
| tPHL – tPLH|
RL = 350 , CL = 15 pF
11
35
ns
12, 14,
16
40
ns
tR
Propagation Delay Skew RL = 350 , CL = 15 pF (5)
Output Rise Time
RL = 350 , CL = 15 pF
(10% to 90%)
tF
Output Fall Time
(90% to 10%)
RL = 350 , CL = 15 pF
| CMH |
Common-Mode
Transient Immunity at
Output High
IF = 0 mA, VO > 2 V,
VCM = 1500 V(6)
| CML |
Common-Mode
Transient Immunity at
Output Low
tPSK
IF = 6.0 mA, VO < 0.8 V,
VCM = 1500 V(6)
20
ns
15, 16
10
ns
15, 16
20
40
kV/s
17
20
40
kV/s
17
Notes:
5. tPSK is equal to the magnitude of the worst-case difference in tPHL and/or tPLH between any two units from the same
manufacturing date code that are operated at same case temperature (±5°C), at same operating conditions, with
equal loads (RL = 350 , CL = 15 pF), and with an input rise time less than 5 ns.
6. Common-mode transient immunity at output HIGH is the maximum tolerable positive dVcm/dt on the leading edge
of the common-mode impulse signal, VCM, to assure that the output remains HIGH. Common-mode transient
immunity at output LOW is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal,
VCM, to assure that the output remains LOW.
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
6
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Switching Characteristics
IFHL - THRESHOLD INPUT CURRENT (mA)
IF - INPUT LED CURRENT (mA)
10
1
0.1
o
o
TA = 100 C
0.01
1E-3
0.6
25 C
0.8
1.0
o
-40 C
1.2
1.4
1.6
1.8
2.5
IOL = 13 mA
2.0
VCC = 3.3 V
VCC = 5.0 V
1.5
1.0
0.5
-40
-20
IOH - LOGIC HIGH OUTPUT CURRENT (A)
VOL - LOGIC LOW OUTPUT VOLTAGE (V)
IOL = 13 mA
IF = 6 mA
0.40
VCC = 3.3 V
0.35
VCC = 5.0 V
0.30
0.25
-20
0
20
40
60
80
100
VO = 3.3 V / 5.0 V
20
15
VCC = 3.3 V
10
5
0
-40
VCC = 5.0 V
-20
ICCH - LOGIC HIGH OUTPUT SUPPLY CURRENT (mA)
ICCL - LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
VCC = 5.0 V
6
VCC = 3.3 V
4
2
40
60
80
100
o
TA - AMBIENT TEMPERATURE ( C)
Figure 8. Logic Low Output Supply Current vs.
Ambient Temperature
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
20
40
60
80
100
Figure 7. Logic High Output Current vs.
Ambient Temperature
IF = 10 mA
20
0
o
10
0
100
TA - AMBIENT TEMPERATURE ( C)
Figure 6. Logic Low Output Voltage vs.
Ambient Temperature
-20
80
IF = 250 A
25
TA - AMBIENT TEMPERATURE ( C)
0
-40
60
30
o
8
40
Figure 5. Threshold Input Current vs.
Ambient Temperature
0.50
0.20
-40
20
TA - AMBIENT TEMPERATURE ( C)
Figure 4. Input LED Current vs.
Forward Voltage
0.45
0
o
VF - FORWARD VOLTAGE (V)
10
IF = 0 A
8
6
VCC = 5.0 V
4
VCC = 3.3 V
2
0
-40
-20
0
20
40
60
80
100
o
TA - AMBIENT TEMPERATURE ( C)
Figure 9. Logic High Output Supply Current vs.
Ambient Temperature
www.fairchildsemi.com
7
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Typical Performance Characteristics
80
IF = 0 A (for ICCH)
IF = 10 mA (for ICCL)
tP - PROPAGATION DELAY (ns)
ICC - OUTPUT SUPPLY CURRENT (mA)
10
o
TA = 25 C
8
ICCL
6
ICCH
4
2
0
3.0
3.5
4.0
4.5
5.0
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
70
60
tPLH @ VCC = 3.3V
50
tPLH @ VCC = 5.0V
40
tPHL @ VCC = 5.0V
30
20
-40
5.5
-20
20
40
60
80
100
TA - AMBIENT TEMPERATURE ( C)
Figure 10. Output Supply Current vs.
Output Supply Voltage
Figure 11. Propagation Delay vs.
Ambient Temperature
30
80
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
25
tP - PROPAGATION DELAY (ns)
(l tPHL - tPLH l) - PULSE WIDTH DISTORTION (ns)
0
o
VCC - OUTPUT SUPPLY VOLTAGE (V)
20
VCC = 3.3V
15
10
VCC = 5.0V
5
0
-40
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
70
60
tPLH @ VCC = 3.3V
50
tPLH @ VCC = 5.0V
40
tPHL @ VCC = 3.3V
30
tPHL @ VCC = 5.0V
20
-20
0
20
40
60
80
100
5
6
o
7
8
9
10
IF - INPUT LED CURRENT (mA)
TA - AMBIENT TEMPERATURE ( C)
Figure 12. Pulse Width Distortion vs.
Ambient Temperature
Figure 13. Propagation Delay vs.
Input LED Current
30
40
f = 5 MHz, 50% Duty Cycle
o
TA = 25 C, RL = 350
25
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
tR, tF - RISE, FALL TIME (ns)
(l tPHL - tPLH l) - PULSE WIDTH DISTORTION (ns)
tPHL @ VCC = 3.3V
20
VCC = 3.3V
15
10
VCC = 5.0V
5
0
5
6
7
8
9
tR @ VCC = 5.0V
tR @ VCC = 3.3V
20
tF @ VCC = 3.3V
10
tF @ VCC = 5.0V
0
-40
10
-20
0
20
40
60
80
100
o
IF - INPUT LED CURRENT (mA)
TA - AMBIENT TEMPERATURE ( C)
Figure 14. Pulse Width Distortion vs.
Input LED Current
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
30
Figure 15. Rise Time and Fall Time vs.
Ambient Temperature
www.fairchildsemi.com
8
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Typical Performance Characteristics (Continued)
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Test Circuit
IF
Pulse Gen.
5 MHz
tf = tr = 5 ns
DC = 50%
0.1 μF
Bypass
350 Ω
2
CL
Input
Monitoring
Mode
VO Monitoring
Node
RM
(IF = 6 mA)
Input
50%
tf
tr
90%
1.5 V
10%
VOL
Output
tPHL
tPLH
Figure 16. Test Circuit for Propagation Delay, Rise Time, and Fall Time
IF
VCC
0.1 μF
Bypass
350 Ω
2
SW
CL
VO Monitoring
Node
RM
VCM
Pulse Gen
1 kV
VCM 90%
10%
0V
tr
tf
VOH
VO (IF = 0 mA)
2V
0.8 V
VO (IF = 6 mA)
VOL
Figure 17. Test Circuit for Instantaneous Common-Mode Rejection Voltage
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
9
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Reflow Profile
Temperature (°C)
TP
260
240
TL
220
200
180
160
140
120
100
80
60
40
20
0
Maximum Ramp-up Rate = 3°C/s
Maximum Ramp-down Rate = 6°C/s
tP
Tsmax
tL
Preheat Area
Tsmin
ts
120
240
360
Time 25°C to Peak
Time (seconds)
Profile Freature
Pb-Free Assembly Profile
Temperature Minimum (Tsmin)
150°C
Temperature Maximum (Tsmax)
200°C
Time (tS) from (Tsmin to Tsmax)
60 s to 120 s
Ramp-up Rate (tL to tP)
3°C/second maximum
Liquidous Temperature (TL)
217°C
Time (tL) Maintained Above (TL)
60 s to 150 s
Peak Body Package Temperature
260°C +0°C / –5°C
Time (tP) within 5°C of 260°C
30 s
Ramp-Down Rate (TP to TL)
6°C/s maximum
Time 25°C to Peak Temperature
8 minutes maximum
Figure 18. Reflow Profile
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
10
Part Number
Package
Packing Method
FOD8163
Stretched Body SOP 6-Pin
Tube (100 units per tube)
FOD8163R2
Stretched Body SOP 6-Pin
Tape and Reel (1,000 units per reel)
FOD8163V
Stretched Body SOP 6-Pin, DIN EN/IEC60747-5-5 Option
Tube (100 units per tube)
FOD8163R2V
Stretched Body SOP 6-Pin, DIN EN/IEC60747-5-5 Option
Tape and Reel (1,000 units per reel)
FOD8163T
Stretched Body SOP 6-Pin, Wide Lead
Tube (100 units per tube)
FOD8163TR2
Stretched Body SOP 6-Pin, Wide Lead
Tape and Reel (1,000 units per reel)
FOD8163TV
Stretched Body SOP 6-Pin, Wide Lead,
DIN EN/IEC60747-5-5 Option
Tube (100 units per tube)
FOD8163TR2V
Stretched Body SOP 6-Pin, Wide Lead,
DIN EN/IEC60747-5-5 Option
Tape and Reel (1,000 units per reel)
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
1
8163
V
3
P
XX YY
4
2
6
5
Definitions
1
Fairchild Logo
2
Device Number, e.g. 8163
3
DIN EN/IEC60747-5-5 Option (only appears on component
ordered with this option)
4
One Digit Year Code, e.g. ‘5’
5
Two Digit Work Week Ranging from ‘01’ to ‘53’
6
Assembly Package Code
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
11
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Ordering Information
1.27
(0.78)
1.27
3
2
3
1
1
A
PIN 1
INDICATOR
7.45
6.81±0.30
10.45
0.80
1.50
4
5
4.50±0.30
6
4
B
RECOMMENDED LAND PATTERN
10°
3.18±0.30
(1.59)
0.20±0.10
C
0.40±0.10
6X
6X
0.20
C A B
6
0.10 C
NOTES: UNLESS OTHERWISE SPECIFIED
A) NO STANDARD APPLIES TO THIS PACKAGE
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH, AND TIE BAR EXTRUSION.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: MKT-M06BREV1
(2.54)
1.27
(0.78)
1.27
3
2
3
1
1
A
PIN 1
INDICATOR
9.25
6.81±0.30
12.25
0.80
1.50
4
5
6
4.50±0.30
4
B
6
RECOMMENDED LAND PATTERN
10°
R0.15
R0.15
3.18±0.30
(1.59)
0.20±0.10
C
0.40±0.10
6X
0.20
0.204~0.304
0.75±0.30
11.50±0.30
6X
C A B
0°~8°
0.10 C
NOTES: UNLESS OTHERWISE SPECIFIED
A) NO STANDARD APPLIES TO THIS PACKAGE
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH, AND TIE BAR EXTRUSION.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: MKT-M06CREV1
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