DATA SHEET
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Micropower Voltage
Reference Diodes
MARKING
DIAGRAMS
8
LM285, LM385B
The LM285/LM385 series are micropower two−terminal bandgap
voltage regulator diodes. Designed to operate over a wide current
range of 10 mA to 20 mA, these devices feature exceptionally low
dynamic impedance, low noise and stable operation over time and
temperature. Tight voltage tolerances are achieved by on−chip
trimming. The large dynamic operating range enables these devices to
be used in applications with widely varying supplies with excellent
regulation. Extremely low operating current make these devices ideal
for micropower circuitry like portable instrumentation, regulators and
other analog circuitry where extended battery life is required.
The LM285/LM385 series are packaged in a low cost TO−226
plastic case and are available in two voltage versions of 1.235 V and
2.500 V as denoted by the device suffix (see Ordering Information
table). The LM285 is specified over a −40°C to +85°C temperature
range while the LM385 is rated from 0°C to +70°C.
The LM385 is also available in a surface mount plastic package in
voltages of 1.235 V and 2.500 V.
1
Operating Current from 10 mA to 20 mA
1.0%, 1.5%, 2.0% and 3.0% Initial Tolerance Grades
Low Temperature Coefficient
1.0 W Dynamic Impedance
Surface Mount Package Available
These Devices are Pb−Free and are RoHS Compliant
1
TO−92
CASE 29−10
1
12
3
STRAIGHT LEAD
2
Pin: 1. N.C.
2. Cathode
3. Anode
3
BENT LEAD
xxx
= 1.2 or 2.5
y
= 2 or 3
z
= 1 or 2
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
Features
•
•
•
•
•
•
y85−z
ALYW
G
SOIC−8
D SUFFIX
CASE 751
8
(Bottom View)
1
2
3
N.C.
1
8
Cathode
N.C.
2
7
N.C.
N.C.
3
6
N.C.
Anode
4
5
N.C.
Cathode
Standard Application
10 k
360 k
Open
for 1.235 V
600 k
1.5 V
Battery
-
3.3 k
1.235 V
LM385−1.2
8.45 k
74.3 k
Open
for 2.5 V
+
ORDERING INFORMATION
600 k
See detailed ordering and shipping information on page 6 of
this data sheet.
425 k
500 W
600 k
100 k
Anode
Figure 1. Representative Schematic Diagram
© Semiconductor Components Industries, LLC, 2016
April, 2022 − Rev. 11
1
Publication Order Number:
LM285/D
LM285, LM385B
MAXIMUM RATINGS (TA = 25°C, unless otherwise noted)
Rating
Symbol
Value
Unit
Reverse Current
IR
30
mA
Forward Current
IF
10
mA
Operating Ambient Temperature Range
TA
LM285
LM385
−40 to +85
0 to +70
°C
Operating Junction Temperature
TJ
+150
°C
Storage Temperature Range
Tstg
−65 to + 150
°C
Electrostatic Discharge Sensitivity (ESD)
Human Body Model (HBM)
Machine Model (MM)
Charged Device Model (CDM)
ESD
V
4000
400
2000
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted)
LM285−1.2
Characteristic
Symbol
Reverse Breakdown Voltage (IRmin v IR v 20 mA)
LM285−1.2/LM385B−1.2
TA = Tlow to Thigh (Note 1)
LM385−1.2
TA = Tlow to Thigh (Note 1)
V(BR)R
Minimum Operating Current
TA = 25°C
TA = Tlow to Thigh (Note 1)
Reverse Breakdown Voltage Change with Current
IRmin v IR v 1.0 mA, TA = +25°C
TA = Tlow to Thigh (Note 1)
1.0 mA v IR v 20 mA, TA = +25°C
TA = Tlow to Thigh (Note 1)
Reverse Dynamic Impedance
IR = 100 mA, TA = +25°C
Average Temperature Coefficient
10 mA v IR v 20 mA, TA = Tlow to Thigh (Note 1)
Max
Min
Typ
Max
1.223
1.200
−
−
1.235
−
−
−
1.247
1.270
−
−
1.223
1.210
1.205
1.192
1.235
−
1.235
−
1.247
1.260
1.260
1.273
−
−
8.0
−
10
20
−
8.0
−
15
20
−
−
−
−
−
−
−
−
1.0
1.5
10
20
−
−
−
−
−
−
−
−
1.0
1.5
20
25
−
0.6
−
−
0.6
−
−
80
−
−
80
−
−
60
−
−
60
−
−
20
−
−
20
−
2.462
2.415
−
−
2.5
−
−
−
2.538
2.585
−
−
2.462
2.436
2.425
2.400
2.5
−
2.5
−
2.538
2.564
2.575
2.600
−
−
13
−
20
30
−
−
13
−
20
30
mA
mV
DV(BR)/DT
S
Unit
V
Z
Long Term Stability
IR = 100 mA, TA = +25°C ± 0.1°C
1. Tlow
Thigh
Tlow
Thigh
Typ
DV(BR)R
n
Minimum Operating Current
TA = 25°C
TA = Tlow to Thigh (Note 1)
Min
IRmin
Wideband Noise (RMS)
IR = 100 mA, 10 Hz v f v 10 kHz
Reverse Breakdown Voltage (IRmin v IR v 20 mA)
LM285−2.5/LM385B−2.5
TA = Tlow to Thigh (Note 1)
LM385−2.5
TA = Tlow to Thigh (Note 1)
LM385−1.2/LM385B−1.2
W
ppm/°C
mV
ppm/kHR
V(BR)R
V
IRmin
= −40°C for LM285−1.2, LM285−2.5
= +85°C for LM285−1.2, LM285−2.5
= 0°C for LM385−1.2, LM385B−1.2, LM385−2.5, LM385B−2.5
= +70°C for LM385−1.2, LM385B−1.2, LM385−2.5, LM385B−2.5
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2
mA
LM285, LM385B
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted)
LM285−1.2
Characteristic
Symbol
Reverse Breakdown Voltage Change with Current
IRmin v IR v 1.0 mA, TA = +25°C
TA = Tlow to Thigh (Note 2)
1.0 mA v IR v 20 mA, TA = +25°C
TA = Tlow to Thigh (Note 2)
DV(BR)R
Reverse Dynamic Impedance
IR = 100 mA, TA = +25°C
Average Temperature Coefficient
20 mA v IR v 20 mA, TA = Tlow to Thigh (Note 2)
Typ
Max
Min
Typ
Max
−
−
−
−
−
−
−
−
1.0
1.5
10
20
−
−
−
−
−
−
−
−
2.0
2.5
20
25
−
0.6
−
−
0.6
−
−
80
−
−
80
−
−
120
−
−
120
−
−
20
−
−
20
−
W
ppm/°C
DV(BR)/DT
n
Long Term Stability
IR = 100 mA, TA = +25°C ± 0.1°C
S
Unit
mV
Z
Wideband Noise (RMS)
IR = 100 mA, 10 Hz v f v 10 kHz
2. Tlow
Thigh
Tlow
Thigh
LM385−1.2/LM385B−1.2
Min
mV
ppm/kHR
= −40°C for LM285−1.2, LM285−2.5
= +85°C for LM285−1.2, LM285−2.5
= 0°C for LM385−1.2, LM385B−1.2, LM385−2.5, LM385B−2.5
= +70°C for LM385−1.2, LM385B−1.2, LM385−2.5, LM385B−2.5
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3
LM285, LM385B
ΔV(BR)R, REVERSE VOLTAGE CHANGE (mV)
TYPICAL PERFORMANCE CURVES FOR LM285−1.2/385−1.2/385B−1.2
IR, REVERSE CURRENT (A)
μ
100
10
TA = +85°C
1.0
+25°C
0.1
0
0.2
-40°C
0.4
0.6
0.8
1.0
V(BR), REVERSE VOLTAGE (V)
1.2
1.4
10
8.0
TA = +85°C
6.0
+25°C
4.0
-40°C
2.0
0
-2.0
0.01
0.1
Figure 2. Reverse Characteristics
1.0
10
IR, REVERSE CURRENT (mA)
100
Figure 3. Reverse Characteristics
1.2
V(BR)R, REVERSE VOLTAGE (V)
VF, FORWARD VOLTAGE (V)
1.250
1.0
TA = -40°C
0.8
0.6
+25°C
+85°C
0.4
0.2
0
0.01
1.230
1.220
1.210
0.1
1.0
10
IF, FORWARD CURRENT (mA)
IR = 100 mA
1.240
100
-50
Figure 4. Forward Characteristics
1.50
1.25
OUTPUT (V)
750
625
500
125
Input
100 k
1.00
0.75
Output
0.50
DUT
0.25
375
0
250
INPUT (V)
√Hz)
100
Figure 5. Temperature Drift
875
e n , NOISE (nV/
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
125
0
10
100
1.0K
f, FREQUENCY (Hz)
10K
10
5.0
0
100k
Figure 6. Noise Voltage
0
0.1
0.2
0.3
0.6 0.7
t, TIME (ms)
0.8
0.9
Figure 7. Response Time
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4
1.0
1.1
LM285, LM385B
ΔV(BR)R, REVERSE VOLTAGE CHANGE (mV)
TYPICAL PERFORMANCE CURVES FOR LM285−2.5/385−2.5/385B−2.5
IR, REVERSE CURRENT (A)
μ
100
10
TA = +85°C
+25°C
1.0
-40°C
0.1
0
0.5
1.0
1.5
2.0
2.5
V(BR), REVERSE VOLTAGE (V)
3.0
3.5
10
TA = +85°C
8.0
6.0
+25°C
2.0
0
-2.0
0.01
0.1
Figure 8. Reverse Characteristics
V(BR)R, REVERSE VOLTAGE (V)
VF, FORWARD VOLTAGE (V)
1.0
TA = -40°C
0.8
0.6
+85°C
+25°C
0.2
0
0.01
2.520
1.0
10
IF, FORWARD CURRENT (mA)
2.500
2.490
2.480
2.470
2.460
100
-50
Figure 10. Forward Characteristics
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
125
Figure 11. Temperature Drift
3.00
2.50
√Hz)
OUTPUT (V)
1500
1250
1000
Input
100 k
2.00
1.50
Output
1.00
DUT
0.50
750
0
500
INPUT (V)
e n , NOISE (nV/
100
IR = 100 mA
2.510
2.450
0.1
1.0
10
IR, REVERSE CURRENT (mA)
Figure 9. Reverse Characteristics
1.2
0.4
-40°C
4.0
250
0
10
100
1.0K
f, FREQUENCY (Hz)
10K
10
5.0
0
100k
Figure 12. Noise Voltage
0
0.1
0.2
0.3
0.6 0.7
t, TIME (ms)
0.8
Figure 13. Response Time
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5
0.9
1.0
1.1
LM285, LM385B
ORDERING INFORMATION
Device
Operating Temperature Range
Reverse Break−Down
Voltage
LM285D−1.2
LM285D−1.2G
1.235 V
LM285D−1.2R2
LM285D−1.2R2G
LM285D−2.5
LM285D−2.5G
2.500 V
LM285D−2.5R2
LM285D−2.5R2G
LM285Z−1.2
LM285Z−1.2G
TA = −40°C to +85°C
1.235 V
LM285Z−2.5
2.500 V
LM285Z−2.5G
LM285Z−1.2RA
1.235 V
LM285Z−1.2RAG
LM285Z−2.5RA
LM285Z−2.5RAG
2.500 V
LM285Z−2.5RP
LM285Z−2.5RPG
LM385BD−1.2
LM385BD−1.2G
1.235 V
LM385BD−1.2R2
LM385BD−1.2R2G
LM385BD−2.5
LM385BD−2.5G
LM385BD−2.5R2
TA = 0°C to +70°C
2.500 V
LM385BD−2.5R2G
LM385BZ−1.2
LM385BZ−1.2G
LM385BZ−1.2RA
1.235 V
LM385BZ−1.2RAG
Package
Shipping†
SOIC−8
98 Units / Rail
SOIC−8
(Pb−Free)
98 Units / Rail
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
SOIC−8
98 Units / Rail
SOIC−8
(Pb−Free)
98 Units / Rail
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
TO−92
2000 Units / Bag
TO−92
(Pb−Free)
2000 Units / Bag
TO−92
2000 Units / Bag
TO−92
(Pb−Free)
2000 Units / Bag
TO−92
2000 / Tape & Reel
TO−92
(Pb−Free)
2000 / Tape & Reel
TO−92
2000 / Tape & Reel
TO−92
(Pb−Free)
2000 / Tape & Reel
TO−92
2000 Units / Fan−Fold
TO−92
(Pb−Free)
2000 Units / Fan−Fold
SOIC−8
98 Units / Rail
SOIC−8
(Pb−Free)
98 Units / Rail
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
SOIC−8
98 Units / Rail
SOIC−8
(Pb−Free)
98 Units / Rail
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
TO−92
2000 Units / Bag
TO−92
(Pb−Free)
2000 Units / Bag
TO−92
2000 / Tape & Reel
TO−92
(Pb−Free)
2000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
6
LM285, LM385B
ORDERING INFORMATION
Device
Operating Temperature Range
Reverse Break−Down
Voltage
LM385BZ−2.5
LM385BZ−2.5G
2.500 V
LM385BZ−2.5RA
LM385BZ−2.5RAG
LM385D−1.2
LM385D−1.2G
1.235 V
LM385D−1.2R2
LM385D−1.2R2G
LM385D−2.5
LM385D−2.5G
2.500 V
LM385D−2.5R2
LM385D−2.5R2G
TA = 0°C to +70°C
LM385Z−1.2
LM385Z−1.2G
LM385Z−1.2RA
LM385Z−1.2RAG
1.235 V
LM385Z−1.2RP
LM385Z−1.2RPG
LM385Z−2.5
LM385Z−2.5G
LM385Z−2.5RP
2.500 V
LM385Z−2.5RPG
Package
Shipping†
TO−92
2000 Units / Bag
TO−92
(Pb−Free)
2000 Units / Bag
TO−92
2000 / Tape & Reel
TO−92
(Pb−Free)
2000 / Tape & Reel
SOIC−8
98 Units / Rail
SOIC−8
(Pb−Free)
98 Units / Rail
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
SOIC−8
98 Units / Rail
SOIC−8
(Pb−Free)
98 Units / Rail
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
TO−92
2000 Units / Bag
TO−92
(Pb−Free)
2000 Units / Bag
TO−92
2000 / Tape & Reel
TO−92
(Pb−Free)
2000 / Tape & Reel
TO−92
2000 / Ammo Box
TO−92
(Pb−Free)
2000 / Ammo Box
TO−92
2000 Units / Bag
TO−92
(Pb−Free)
2000 Units / Bag
TO−92
2000 / Ammo Box
TO−92
(Pb−Free)
2000 / Ammo Box
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE D
SCALE 1:1
12
3
STRAIGHT LEAD
1
DATE 05 MAR 2021
2
3
BENT LEAD
STYLES AND MARKING ON PAGE 3
DOCUMENT NUMBER:
DESCRIPTION:
98AON52857E
TO−92 (TO−226) 1 WATT
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE D
DATE 05 MAR 2021
STYLES AND MARKING ON PAGE 3
DOCUMENT NUMBER:
DESCRIPTION:
98AON52857E
TO−92 (TO−226) 1 WATT
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE D
DATE 05 MAR 2021
STYLE 1:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 2:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 5:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 6:
PIN 1. GATE
2. SOURCE & SUBSTRATE
3. DRAIN
STYLE 7:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 8:
PIN 1. DRAIN
2. GATE
3. SOURCE & SUBSTRATE
STYLE 9:
PIN 1. BASE 1
2. EMITTER
3. BASE 2
STYLE 10:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 11:
PIN 1. ANODE
2. CATHODE & ANODE
3. CATHODE
STYLE 12:
PIN 1. MAIN TERMINAL 1
2. GATE
3. MAIN TERMINAL 2
STYLE 13:
PIN 1. ANODE 1
2. GATE
3. CATHODE 2
STYLE 14:
PIN 1. EMITTER
2. COLLECTOR
3. BASE
STYLE 15:
PIN 1. ANODE 1
2. CATHODE
3. ANODE 2
STYLE 16:
PIN 1. ANODE
2. GATE
3. CATHODE
STYLE 17:
PIN 1. COLLECTOR
2. BASE
3. EMITTER
STYLE 18:
PIN 1. ANODE
2. CATHODE
3. NOT CONNECTED
STYLE 19:
PIN 1. GATE
2. ANODE
3. CATHODE
STYLE 20:
PIN 1. NOT CONNECTED
2. CATHODE
3. ANODE
STYLE 21:
PIN 1. COLLECTOR
2. EMITTER
3. BASE
STYLE 22:
PIN 1. SOURCE
2. GATE
3. DRAIN
STYLE 23:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 24:
PIN 1. EMITTER
2. COLLECTOR/ANODE
3. CATHODE
STYLE 25:
PIN 1. MT 1
2. GATE
3. MT 2
STYLE 26:
PIN 1.
2.
3.
STYLE 27:
PIN 1. MT
2. SUBSTRATE
3. MT
STYLE 28:
PIN 1. CATHODE
2. ANODE
3. GATE
STYLE 29:
PIN 1. NOT CONNECTED
2. ANODE
3. CATHODE
STYLE 30:
PIN 1. DRAIN
2. GATE
3. SOURCE
STYLE 32:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
STYLE 33:
PIN 1. RETURN
2. INPUT
3. OUTPUT
STYLE 34:
PIN 1. INPUT
2. GROUND
3. LOGIC
STYLE 35:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
VCC
GROUND 2
OUTPUT
STYLE 31:
PIN 1. GATE
2. DRAIN
3. SOURCE
GENERIC
MARKING DIAGRAM*
XXXXX
XXXXX
ALYWG
G
XXXX
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON52857E
TO−92 (TO−226) 1 WATT
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 3 OF 3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
8
1
SCALE 1:1
−X−
DATE 16 FEB 2011
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
8
8
1
1
IC
4.0
0.155
XXXXX
A
L
Y
W
G
IC
(Pb−Free)
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
XXXXXX
AYWW
1
1
Discrete
XXXXXX
AYWW
G
Discrete
(Pb−Free)
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
1.270
0.050
SCALE 6:1
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
8
8
XXXXX
ALYWX
G
XXXXX
ALYWX
1.52
0.060
0.6
0.024
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
7.0
0.275
DIM
A
B
C
D
G
H
J
K
M
N
S
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SOIC−8 NB
CASE 751−07
ISSUE AK
DATE 16 FEB 2011
STYLE 1:
PIN 1. EMITTER
2. COLLECTOR
3. COLLECTOR
4. EMITTER
5. EMITTER
6. BASE
7. BASE
8. EMITTER
STYLE 2:
PIN 1. COLLECTOR, DIE, #1
2. COLLECTOR, #1
3. COLLECTOR, #2
4. COLLECTOR, #2
5. BASE, #2
6. EMITTER, #2
7. BASE, #1
8. EMITTER, #1
STYLE 3:
PIN 1. DRAIN, DIE #1
2. DRAIN, #1
3. DRAIN, #2
4. DRAIN, #2
5. GATE, #2
6. SOURCE, #2
7. GATE, #1
8. SOURCE, #1
STYLE 4:
PIN 1. ANODE
2. ANODE
3. ANODE
4. ANODE
5. ANODE
6. ANODE
7. ANODE
8. COMMON CATHODE
STYLE 5:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. DRAIN
5. GATE
6. GATE
7. SOURCE
8. SOURCE
STYLE 6:
PIN 1. SOURCE
2. DRAIN
3. DRAIN
4. SOURCE
5. SOURCE
6. GATE
7. GATE
8. SOURCE
STYLE 7:
PIN 1. INPUT
2. EXTERNAL BYPASS
3. THIRD STAGE SOURCE
4. GROUND
5. DRAIN
6. GATE 3
7. SECOND STAGE Vd
8. FIRST STAGE Vd
STYLE 8:
PIN 1. COLLECTOR, DIE #1
2. BASE, #1
3. BASE, #2
4. COLLECTOR, #2
5. COLLECTOR, #2
6. EMITTER, #2
7. EMITTER, #1
8. COLLECTOR, #1
STYLE 9:
PIN 1. EMITTER, COMMON
2. COLLECTOR, DIE #1
3. COLLECTOR, DIE #2
4. EMITTER, COMMON
5. EMITTER, COMMON
6. BASE, DIE #2
7. BASE, DIE #1
8. EMITTER, COMMON
STYLE 10:
PIN 1. GROUND
2. BIAS 1
3. OUTPUT
4. GROUND
5. GROUND
6. BIAS 2
7. INPUT
8. GROUND
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 13:
PIN 1. N.C.
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 14:
PIN 1. N−SOURCE
2. N−GATE
3. P−SOURCE
4. P−GATE
5. P−DRAIN
6. P−DRAIN
7. N−DRAIN
8. N−DRAIN
STYLE 15:
PIN 1. ANODE 1
2. ANODE 1
3. ANODE 1
4. ANODE 1
5. CATHODE, COMMON
6. CATHODE, COMMON
7. CATHODE, COMMON
8. CATHODE, COMMON
STYLE 16:
PIN 1. EMITTER, DIE #1
2. BASE, DIE #1
3. EMITTER, DIE #2
4. BASE, DIE #2
5. COLLECTOR, DIE #2
6. COLLECTOR, DIE #2
7. COLLECTOR, DIE #1
8. COLLECTOR, DIE #1
STYLE 17:
PIN 1. VCC
2. V2OUT
3. V1OUT
4. TXE
5. RXE
6. VEE
7. GND
8. ACC
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
STYLE 19:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. MIRROR 2
7. DRAIN 1
8. MIRROR 1
STYLE 20:
PIN 1. SOURCE (N)
2. GATE (N)
3. SOURCE (P)
4. GATE (P)
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 21:
PIN 1. CATHODE 1
2. CATHODE 2
3. CATHODE 3
4. CATHODE 4
5. CATHODE 5
6. COMMON ANODE
7. COMMON ANODE
8. CATHODE 6
STYLE 22:
PIN 1. I/O LINE 1
2. COMMON CATHODE/VCC
3. COMMON CATHODE/VCC
4. I/O LINE 3
5. COMMON ANODE/GND
6. I/O LINE 4
7. I/O LINE 5
8. COMMON ANODE/GND
STYLE 23:
PIN 1. LINE 1 IN
2. COMMON ANODE/GND
3. COMMON ANODE/GND
4. LINE 2 IN
5. LINE 2 OUT
6. COMMON ANODE/GND
7. COMMON ANODE/GND
8. LINE 1 OUT
STYLE 24:
PIN 1. BASE
2. EMITTER
3. COLLECTOR/ANODE
4. COLLECTOR/ANODE
5. CATHODE
6. CATHODE
7. COLLECTOR/ANODE
8. COLLECTOR/ANODE
STYLE 25:
PIN 1. VIN
2. N/C
3. REXT
4. GND
5. IOUT
6. IOUT
7. IOUT
8. IOUT
STYLE 26:
PIN 1. GND
2. dv/dt
3. ENABLE
4. ILIMIT
5. SOURCE
6. SOURCE
7. SOURCE
8. VCC
STYLE 29:
PIN 1. BASE, DIE #1
2. EMITTER, #1
3. BASE, #2
4. EMITTER, #2
5. COLLECTOR, #2
6. COLLECTOR, #2
7. COLLECTOR, #1
8. COLLECTOR, #1
STYLE 30:
PIN 1. DRAIN 1
2. DRAIN 1
3. GATE 2
4. SOURCE 2
5. SOURCE 1/DRAIN 2
6. SOURCE 1/DRAIN 2
7. SOURCE 1/DRAIN 2
8. GATE 1
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
STYLE 27:
PIN 1. ILIMIT
2. OVLO
3. UVLO
4. INPUT+
5. SOURCE
6. SOURCE
7. SOURCE
8. DRAIN
STYLE 28:
PIN 1. SW_TO_GND
2. DASIC_OFF
3. DASIC_SW_DET
4. GND
5. V_MON
6. VBULK
7. VBULK
8. VIN
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
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