Doc.Nr. 82 1178 00
Data Sheet
SCA100T-D07 2-AXIS HIGH PERFORMANCE ANALOG ACCELEROMETER
Features
Applications
Measurement range ±12g
Measurement bandwidth 400 Hz
Low noise ratiometric analog voltage outputs
Excellent bias stability over temperature and time
Digital SPI temperature output
Comprehensive failure detection features
o
True self test by deflecting the sensing
element's proof mass with electrostatic force.
o
Continuous sensing element interconnection
failure check.
o
Continuous memory parity check.
RoHS and lead free soldering process compliant
Robust design, high shock durability (20000g)
SCA100T-D07 is targeted to inertial sensing
applications with high stability and tough
environmental requirements. Typical application
include
IMU, AHRS
Avionics
UAV
Navigation and guidance instruments
Platform stabilization
Vibration monitoring
Oil & Gas surveying and drilling
Train and Rail industry
General Description
The SCA100T-D07 is a 3D-MEMS-based dual axis accelerometer that enables tactical grade performance for
Inertial Measurement Units (IMUs) operating in tough environmental conditions. The measuring axes of the
sensor are parallel to the mounting plane and orthogonal to each other. Wide measurement range and bandwidth,
low repeatable temperature behavior, low output noise, together with a very robust sensing element and
packaging design, make the SCA100T-D07 the ideal choice for challenging inertial sensing applications.
12 VDD
Sensing
element 1
Signal conditioning
and filtering
11 OUT_1
A/D conversion
10 ST_1
9 ST_2
Self test 1
Self test 2
EEPROM
calibration
memory
Temperature
Sensor
1 SCK
SPI interface
3 MISO
4 MOSI
7 CSB
Sensing
element 2
Signal conditioning
and filtering
5 OUT_2
6 GND
Figure 1. Functional block diagram
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Rev.A2
SCA100T Series
TABLE OF CONTENTS
1 Electrical Specifications .....................................................................................................3
1.1
Absolute Maximum Ratings ................................................................................................... 3
1.2
Performance Characteristics.................................................................................................. 3
1.3
Parameter ................................................................................................................................ 3
1.4
Electrical Characteristics ....................................................................................................... 4
1.5
SPI Interface DC Characteristics............................................................................................ 4
1.6
SPI Interface AC Characteristics............................................................................................ 4
1.7
SPI Interface Timing Specifications ....................................................................................... 5
1.8
Electrical Connection.............................................................................................................. 6
1.9
Typical Performance Characteristics .................................................................................... 6
2 Functional Description .......................................................................................................9
2.1
Measuring Directions .............................................................................................................. 9
2.2
Ratiometric Output .................................................................................................................. 9
2.3
SPI Serial Interface.................................................................................................................. 9
2.4
Self Test and Failure Detection Modes ................................................................................ 12
2.5
Temperature Measurement .................................................................................................. 13
3 Application Information ....................................................................................................14
3.1
Recommended Circuit Diagrams and Printed Circuit Board Layouts ............................... 14
3.2
Recommended Printed Circuit Board Footprint ................................................................. 15
4 Mechanical Specifications and Reflow Soldering ..........................................................15
4.1
Mechanical Specifications .................................................................................................... 15
4.2
Reflow Soldering ................................................................................................................... 16
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Rev.A2
SCA100T Series
1
Electrical Specifications
The product version specific performance specifications are listed in the table SCA100T
performance characteristics below. Vdd=5.00V and ambient temperature unless otherwise
specified.
1.1
Absolute Maximum Ratings
Supply voltage (VDD)
Voltage at input / output pins
Storage temperature
Operating temperature
Mechanical shock
1.2
-0.3 V to +5.5V
-0.3V to (VDD + 0.3V)
-55°C to +125°C
-40°C to +125°C
Drop from 1 meter onto a concrete surface
(20000g). Powered or non-powered
Performance Characteristics
1.3
Parameter
Measuring range
Frequency response
Offset (Output at 0g)
Offset Digital Output
Offset Calibration error
Offset Temperature
Dependency
Offset Temperature
Hysteresis
Sensitivity
Sensitivity Digital Output
Sensitivity Calibration error
Sensitivity Temperature
Dependency
Linearity error
Digital Output Resolution
Output Noise Density
Condition
Min
Typical
Max
(1
Units
Nominal
–3dB LP
Ratiometric output
-12
250
Vdd/2
400
+12
550
Vdd/2
-25…+85°C
-40…+125°C
-40…+125°C
-45
-200
-300
-50
g
Hz
V
LSB
mg
mg
mg
mg
1024
45
200
300
50
0.17
70
-25…+85°C
-40…+125°C
-15…+85ºC
+25ºC
-2
-2
-2.5
-60
-25
11
From DC...100Hz
Ratiometric error
Vdd = 4.75...5.25V
Cross-axis sensitivity
Max.
Note 1. Min/Max values are +/-3 sigma of test population
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95
-2
-3.5
V/g
LSB / g
%
%
%
mg
mg
Bits
+2
+2
+2.5
60
25
11
120
g / Hz
+2
+3.5
%
%
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Rev.A2
SCA100T Series
1.4
Electrical Characteristics
Parameter
Supply voltage Vdd
Current
consumption
Operating
temperature
Analog resistive
output load
Analog capacitive
output load
Start-up delay
1.5
Min.
Typ
Max.
Units
4.75
5.0
4
5.25
5
V
mA
+125
°C
Vdd = 5 V; No load
-40
Vout to Vdd or GND
10
kΩ
Vout to Vdd or GND
20
nF
Reset and parity check
10
ms
SPI Interface DC Characteristics
Parameter
Conditions
Symbol
Min
Typ.
Max
Unit
VIN = 0 V
IPU
VIH
VIL
VHYST
CIN
13
4
-0.3
22
35
Vdd+0.3
1
A
V
V
V
pF
Input terminal MOSI, SCK
Pull down current
VIN = 5 V
Input high voltage
Input low voltage
Hysteresis
IPD
VIH
VIL
VHYST
9
4
-0.3
29
Vdd+0.3
1
0.23*Vdd
A
V
V
V
Input capacitance
CIN
2
pF
Output terminal MISO
Output high voltage
I > -1mA
VOH
Output low voltage
Tri-state leakage
VOL
ILEAK
Input terminal CSB
Pull up current
Input high voltage
Input low voltage
Hysteresis
Input capacitance
1.6
Condition
I < 1 mA
0 < VMISO <
Vdd
0.23*Vdd
2
17
Vdd0.5
V
5
0.5
100
V
pA
SPI Interface AC Characteristics
Parameter
Condition
Output load
SPI clock frequency
Internal A/D conversion time
Data transfer time
@500kHz
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Doc. nr. 82 1178 00
Min.
Typ.
150
38
Max.
Units
1
500
nF
kHz
s
s
4/16
Rev.A2
SCA100T Series
1.7
SPI Interface Timing Specifications
Parameter
Terminal CSB, SCK
Time from CSB (10%)
To SCK (90%)
Time from SCK (10%)
To CSB (90%)
Terminal SCK
SCK low time
Conditions
Symbol
Min.
TLS1
120
ns
TLS2
120
ns
TCL
1
s
TCH
1
s
TSET
30
ns
THOL
30
ns
Load
capacitance at
MISO < 15 pF
Load
capacitance at
MISO < 15 pF
TVAL1
10
100
ns
TLZ
10
100
ns
Load
capacitance at
MISO < 15 pF
TVAL2
100
ns
Load
capacitance at
MISO < 2 nF
Load
capacitance at
MISO < 2 nF
SCK high time
Terminal MOSI, SCK
Time from changing MOSI
(10%, 90%) to SCK (90%).
Data setup time
Time from SCK (90%) to
changing MOSI (10%,90%).
Data hold time
Terminal MISO, CSB
Time from CSB (10%) to stable
MISO (10%, 90%).
Time from CSB (90%) to high
impedance state of
MISO.
Terminal MISO, SCK
Time from SCK (10%) to stable
MISO (10%, 90%).
Terminal CSB
Time between SPI cycles, CSB at
high level (90%)
When using SPI commands
RDAX, RDAY, and RWTR: Time
between SPI cycles, CSB at high
level (90%)
TLS1
TCH
Typ.
Max.
Unit
TLH
15
s
TLH
150
s
TCL
TLS2
TLH
CSB
SCK
THOL
MOSI
MSB in
TVAL1
MISO
TSET
DATA in
LSB in
TVAL2
MSB out
TLZ
DATA out
LSB out
Figure 2. Timing diagram for SPI communication
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Rev.A2
SCA100T Series
1.8
Electrical Connection
If the SPI interface is not used SCK (pin1), MISO (pin3), MOSI (pin4) and CSB (pin7) must be left
floating. Self-test can be activated applying logic “1” (positive supply voltage level) to ST_1 or ST_2
pins (pins 10 or 9). Self-test must not be activated for both channels at the same time. If ST feature
is not used pins 9 and 10 must be left floating or connected to GND. Acceleration signals are
provided from pins OUT_1 and OUT_2.
SCK
SCK 1
Ext_C_1
VDD
12 VDD
OUT_1
11 OUT_1
2
MISO 3
MISO
10 ST_1/Test_in
ST_1
MOSI 4
MOSI
9
ST_2
ST_2
OUT_2 5
OUT_2
8
Ext_C_2
VSS 6
GND
7
CSB
CSB
Figure 3. SCA100T electrical connection
No.
1
2
3
4
5
6
7
8
9
10
11
12
1.9
Node
SCK
NC
MISO
MOSI
Out_2
GND
CSB
NC
ST_2
ST_1
Out_1
VDD
I/O
Input
Input
Output
Input
Output
Supply
Input
Input
Input
Input
Output
Supply
Description
Serial clock
No connect, left floating
Master in slave out; data output
Master out slave in; data input
Y axis Output (Ch 2)
Ground
Chip select (active low)
No connect, left floating
Self test input for Ch 2
Self test input for Ch 1
X axis Output (Ch 1)
Positive supply voltage (+5V DC)
Typical Performance Characteristics
Typical offset and sensitivity temperature dependencies of the SCA100T are presented in following
diagrams. These results represent the typical performance of SCA100T components. The mean
value and 3 sigma limit (mean ± 3× standard deviation) and specification limits are presented in
following diagrams. The 3 sigma limits represents 99.73% of the SCA100T population.
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Rev.A2
SCA100T Series
SCA100T-D07 Offset Temperature Dependency
300
Offset error [mg]
200
100
-3 sigma
0
Average
-100
+3 sigma
-200
-300
-400
-40
-20
0
20
40
60
80
100
120
Temperature [ºC]
Figure 4. Typical temperature behavior of SCA100T-D07 offset
SCA100T-D07 Sensitivity Errors Over Temperature
3.00 %
Sensitivity Error[%]
2.00 %
1.00 %
0.00 %
Average
+3 sigma
-1.00 %
-3 sigma
-2.00 %
-3.00 %
-40
-25
-10
5
20
35
50
65
80
95
110 125
Temperature[ºC]
Figure 5. Typical temperature behavior of SCA100T-D07 sensitivity
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Rev.A2
SCA100T Series
Frequency response
0
-3
Attenuation[dB]
-6
-9
-12
-15
-18
-21
-24
-27
-30
10
100
1000
10000
Frequency[Hz]
Figure 6. Frequency response of SCA100T-D07
Error[mg]
Typical SCA100T-D07 Non-Linearity of X-axis in
25ºC
25
20
15
10
5
0
-5
-10
-15
-20
-25
-12
-9
-6
-3
0
3
6
9
12
Acceleration[g]
Figure 7. Typical non-linearity of SCA100T-D07 fitted to straight line in room temperature
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Rev.A2
SCA100T Series
2
2.1
Functional Description
Measuring Directions
X-axis
Y-axis
VOUT >
VOUT =2.5V
> VOUT
Figure 8. The measuring directions of the SCA100T
2.2
Ratiometric Output
Ratiometric output means that the zero offset point and sensitivity of the sensor are proportional to
the supply voltage. If the SCA100T supply voltage is fluctuating the SCA100T output will also vary.
When the same reference voltage for both the SCA100T sensor and the measuring part (A/Dconverter) is used, the error caused by reference voltage variation is automatically compensated
for.
2.3
SPI Serial Interface
A Serial Peripheral Interface (SPI) system consists of one master device and one or more slave
devices. The master is defined as a micro controller providing the SPI clock and the slave as any
integrated circuit receiving the SPI clock from the master. The ASIC in Murata Electronics’ products
always operates as a slave device in master-slave operation mode.
The SPI has a 4-wire synchronous serial interface. Data communication is enabled by a low active
Slave Select or Chip Select wire (CSB). Data is transmitted by a 3-wire interface consisting of wires
for serial data input (MOSI), serial data output (MISO) and serial clock (SCK).
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Rev.A2
SCA100T Series
MASTER
MICROCONTROLLER
SLAVE
DATA OUT (MOSI)
SI
DATA IN (MISO)
SO
SERIAL CLOCK (SCK)
SCK
SS0
CS
SS1
SI
SS2
SO
SS3
SCK
CS
SI
SO
SCK
CS
SI
SO
SCK
CS
Figure 9. Typical SPI connection
The SPI interface in Murata products is designed to support any micro controller that uses SPI bus.
Communication can be carried out by either a software or hardware based SPI. Please note that in
the case of hardware based SPI, the received acceleration data is 11 bits. The data transfer uses
the following 4-wire interface:
MOSI
MISO
SCK
CSB
master out slave in
master in slave out
serial clock
chip select (low active)
µP → SCA100T
SCA100T → µP
µP → SCA100T
µP → SCA100T
Each transmission starts with a falling edge of CSB and ends with the rising edge. During
transmission, commands and data are controlled by SCK and CSB according to the following rules:
commands and data are shifted; MSB first, LSB last
each output data/status bits are shifted out on the falling edge of SCK (MISO line)
each bit is sampled on the rising edge of SCK (MOSI line)
after the device is selected with the falling edge of CSB, an 8-bit command is received. The
command defines the operations to be performed
the rising edge of CSB ends all data transfer and resets internal counter and command register
if an invalid command is received, no data is shifted into the chip and the MISO remains in high
impedance state until the falling edge of CSB. This reinitializes the serial communication.
data transfer to MOSI continues immediately after receiving the command in all cases where
data is to be written to SCA100T’s internal registers
data transfer out from MISO starts with the falling edge of SCK immediately after the last bit of
the SPI command is sampled in on the rising edge of SCK
maximum SPI clock frequency is 500kHz
maximum data transfer speed for RDAX and RDAY is 5300 samples per sec / channel
SPI command can be either an individual command or a combination of command and data. In the
case of combined command and data, the input data follows uninterruptedly the SPI command and
the output data is shifted out parallel with the input data.
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Rev.A2
SCA100T Series
The SPI interface uses an 8-bit instruction (or command) register. The list of commands is given in
Table below.
Command
name
MEAS
RWTR
STX
STY
RDAX
RDAY
Command
format
00000000
00001000
00001110
00001111
00010000
00010001
Description:
Measure mode (normal operation mode after power on)
Read temperature data register
Activate Self test for X-channel
Activate Self test for Y-channel
Read X-channel acceleration
Read Y-channel acceleration
Measure mode (MEAS) is standard operation mode after power-up. During normal operation, the
MEAS command is the exit command from Self test.
Read temperature data register (RWTR) reads temperature data register during normal operation
without affecting the operation. The temperature data register is updated every 150 µs. The load
operation is disabled whenever the CSB signal is low, hence CSB must stay high at least 150 µs
prior to the RWTR command in order to guarantee correct data. The data transfer is presented in
Figure 10 below. The data is transferred MSB first. In normal operation, it does not matter what
data is written into temperature data register during the RWTR command and hence writing all
zeros is recommended.
Figure 1. Command and 8 bit temperature data transmission over the SPI
Self test for X-channel (STX) activates the self test function for the X-channel (Channel 1). The
internal charge pump is activated and a high voltage is applied to the X-channel acceleration
sensor element electrode. This causes the electrostatic force that deflects the beam of the sensing
element and simulates the acceleration to the positive direction. The self-test is de-activated by
giving the MEAS command. The self test function must not be activated for both channels at
the same time.
Self test for Y-channel (STY) activates the self test function for the Y-channel (Channel 2). The
internal charge pump is activated and a high voltage is applied to the Y-channel acceleration
sensor element electrode.
Read X-channel acceleration (RDAX) accesses the AD converted X-channel (Channel 1)
acceleration signal stored in acceleration data register X.
Read Y-channel acceleration (RDAY) accesses the AD converted Y-channel (Channel 2)
acceleration signal stored in acceleration data register Y.
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Rev.A2
SCA100T Series
During normal operation, acceleration data registers are reloaded every 150 µs. The load operation
is disabled whenever the CSB signal is low, hence CSB must stay high at least 150 µs prior the
RDAX command in order to guarantee correct data. Data output is an 11-bit digital word that is fed
out MSB first and LSB last.
Figure 10. Command and 11 bit acceleration data transmission over the SPI
2.4
Self Test and Failure Detection Modes
To ensure reliable measurement results the SCA100T has continuous interconnection failure and
calibration memory validity detection. A detected failure forces the output signal close to power
supply ground or VDD level, outside the normal output range. The normal output ranges are:
analog 0.25-4.75 V (@Vdd=5V) and SPI 102...1945 counts.
The calibration memory validity is verified by continuously running parity check for the control
register memory content. In the case where a parity error is detected, the control register is
automatically re-loaded from the EEPROM. If a new parity error is detected after re-loading data
both analog output voltages are forced to go close to ground level (
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