AN44065A
30V/1.5A Stepping Motor Driver
DESCRIPTION
AN44065A is a two channels H-bridge driver LSI.
Bipolar stepping motor can be controlled by a single
driver LSI.
2-phase,1-2(type 2) phase, W1-2 phase can be
selected.
M
Di ain
sc te
on na
tin nc
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• 4-phase input (W 1-2phase excitation enabled;
exclusive OR function incorporated for simultaneous-ON
prevention)
• Built-in CR chopping (with frequency selected)
• Built-in thermal protection and low voltage detection circuit
• Built-in 5V power supply
•28pin Plastic Small Outline Package With Heat Sink
(SOP Type)
M
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en in
an clu
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typ s f
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pla wi
ne ng
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tin uc
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ed cle
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tin
ue
dt
yp
APPLICATIONS
e)
FEATURES
• LSI for stepping motor drives
SIMPLIFIED APPLICATION
0.01 μF
BC1 19
21 VPUMP
BC2 20
0.01 μF
PHA1 1
PHB1 2
13 RCSB
IN0 3
IN1 4
14 BOUT1
IN2 5
22 VM2 0.1 μF
IN3 6
I_AOUT1
(500mA/div)
47 μF
+
ENABLEA 7
ed
ENABLEB 9
(p
lan
TJMON 10
PWMSW 28
Motor Current Waveform
12 BOUT2
VREFA 23
VREFB 24
8 VM1
15 AOUT2
I_BOUT1
(500mA/div)
16 RCSA
20ms/div
17 AOUT1
VCC 25
26 GND
0.1 μF
0.1 μF
Condition:
VM=24V
Peak motor current:600mA
excitation mode :W1-2 phase drive
S5VOUT 27
Notes)
This application circuit is an example. The operation of mass
production set is not guaranteed. You should perform enough
evaluation and verification on the design of mass production set.
You are fully responsible for the incorporation of the above
application circuit and information in the design of your equipment.
Publication date: November 2012
1
Ver. CEB
AN44065A
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Unit
Note
Supply voltage1 (Pin 8,22)
VM
30
V
*3
Supply voltage2 (Pin 25)
VCC
–0.3 to +6
V
*3
Power dissipation
PD
0.717
W
*1
Operating ambient temperature
Topr
–20 to +70
°C
*2
Operating junction temperature
Tj
–20 to +150
°C
*2
Tstg
–55 to +150
°C
*2
M
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sc te
on na
tin nc
ue e/
d
Storage temperature
VOUT
30
V
*3
Motor drive current (Pin
12,14,15,17)
IOUT
±1.5
A
*3
Input Voltage Range
1.5
A
*3
VPHA1,VPHB1
-0.3 to 6
V
—
VIN0~IN3
-0.3 to 6
V
—
VENABLEA,VENABLEB
-0.3 to 6
V
—
VRCSA,VRCSB
-0.5 to 1.5
V
—
VBC1
VM+0.3
V
—
VBC2
(VM-1) to 40
V
—
VVPUMP
(VM-1) to 40
V
—
VVREFA,VVREFB
-0.3 to 6
V
—
IS5VOUT
-7 to 0
mA
—
VPWMSW
-0.3 to 6
V
—
HBM (Human Body Model)
±2
kV
—
CDM (Charge Device Model)
±1
kV
—
This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum
rating. This rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our
stated recommended operating range.
When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected.
*1: The power dissipation shown is the value in free-air for the independent LSI package.
ed
*2: Except for the storage temperature, operating ambient temperature, and power dissipation all ratings are for Ta = 25°C.
Refer to the package power dissipation prepared else and use under the condition not exceeding the allowable value.
lan
Notes).
If
*3: Do not apply current or voltage from outside to any pin not listed above.
(p
ESD
M
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pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
Flywheel diode current (Pin
12,14,15,17)
e)
Output pin voltage (Pin
12,14,15,17)
In the circuit current, (+) means the current flowing into LSI and (–) means the current flowing out of LSI.
2
Ver. CEB
AN44065A
POWER DISSIPATION RATING
θ JA
PD (Ta=25 °C)
PD (Ta=70 °C)
Mount on PWB *1
48.8 °C/W
2561mW
1639mW
Without PWB
111.6 °C/W
1120mW
717mW
Condition
Note). For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, supply
voltage, load and ambient temperature conditions to ensure that there is enough margin follow the power and
the thermal design does not exceed the allowable value.
*1: 2Layer:75X75X1.6t(mm)
M
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CAUTION
M
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en an
an ce
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typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
e)
Although this has limited built-in ESD protection circuit, but permanent damage may occur on it.
Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min.
Typ.
Max.
Unit
Note
VM1,VM2
18
24
28
V
*1
VCC
4.5
5
5.5
V
*1
VPHA1,VPHB1
0
-
VCC
V
—
VIN0~IN3
0
-
VCC
V
—
VENABLEA,VENABLEB
0
-
VCC
V
—
VVREFA,VVREFB
0
-
5
V
—
VPWMSW
0
-
VCC
V
—
CBC
-
0.01
-
μF
—
CVPUMP
-
0.01
-
μF
—
CS5VOUT
-
0.1
-
μF
—
Operating ambient temperature
Taopr
-20
-
70
°C
—
Operating junction temperature
Tjopr
-
-
120
°C
—
Supply voltage range
Input Voltage Range
External Constants
(p
lan
ed
Note) *1: The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
3
Ver. CEB
AN44065A
ELECRTRICAL CHARACTERISTICS
Note) VM = 24 V,VCC=5V , Ta = 25°C±2°C unless otherwise specified.
Parameter
Symbol
Condition
*1 :Typical Value checked by design.
Min
Limits
Typ
Max
Unit Note
Output Drivers
VM
VM
– 0.75
– 0.5
High-level output saturation voltage
VOH
I = – 1.0 A
Low-level output saturation voltage
VOL
I = 1.0 A
—
Flywheel diode forward voltage
VDI
I = 1.0 A
VOUT = 30 V, VRCS = 0 V
ILEAK1
V
—
0.55
0.825
V
—
0.5
1.0
1.5
V
—
—
10
50
μA
—
M
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Output leakage current 1
—
Supply current
(with two circuits turned off)
IM
ENABLEA = ENABLEB =
5V
—
3.7
5.7
mA
—
*1
VTr
Rising edge
—
240
—
V/μs
Output slew rate 2
VTf
Falling edge
—
240
—
V/μs
*1
—
2.2
—
μs
*1
—
1.4
2.2
mA
—
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an clu
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pla wi
ne ng
d d fou
isc r P
on rod
tin uc
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d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
TD
Dead time
I/O Block
Supply current
ICC
High-level IN input voltage
Low-level IN input voltage
High-level IN input current
Low-level IN input current
e)
Output slew rate 1
—
ENABLEA = ENABLEB =
5V
VINH
—
2.2
—
VCC
V
—
VINL
—
GND
—
0.6
V
—
IINH
IN0 = IN1 = IN2 = IN3 =
5V
–10
—
10
μA
—
IINL
IN0 = IN1 = IN2 = IN3 =
0V
–15
—
15
μA
—
High-level PHA1/PHB1 input voltage
VPHAH
VPHBH
—
2.2
—
VCC
V
—
Low-level PHA1/PHB1 input voltage
VPHAL
VPHBL
—
GND
—
0.6
V
—
High-level PHA1/PHB1 input current
IPHAH
IPHBH
PHA1 = PHB1 = 5V
25
50
100
μA
—
Low-level PHA1/PHB1 input current
IPHAL
IPHBL
PHA1 = PHB1 = 0V
–15
—
15
μA
—
VENABLEAH
VENABLEBH
—
2.2
—
VCC
V
—
Low-level ENABLEA/ENABLEB
input voltage
VENABLEAL
VENABLEBL
—
GND
—
0.6
V
—
ed
High-level ENABLEA/ENABLEB
input voltage
IENABLEAH
IENABLEBH
ENABLEA = NABLEB =
5V
–10
—
10
μA
—
Low-level ENABLEA/ENABLEB
input current
IENABLEAL
IENABLEBL
ENABLEA = ENABLEB =
0V
–15
—
15
μA
—
High-level PWMSW
input voltage
VPWMSWH
—
2.2
—
VCC
V
—
Low-level PWMSW
input voltage
VPWMSWL
—
GND
—
0.6
V
—
High-level PWMSW
input current
Low-level PWMSW
input current
IPWMSWH
PWMSW = 5V
25
50
100
μA
—
IPWMSWL
PWMSW = 0V
–15
—
15
μA
—
(p
lan
High-level ENABLEA/ENABLEB
input current
4
Ver. CEB
AN44065A
ELECRTRICAL CHARACTERISTICS (continued)
Note)VM = 24 V, VCC=5V, Ta = 25°C±2°C unless otherwise specified.
Parameter
Symbol
Condition
Min
Limits
Typ
Max
Unit Note
Input bias current
IREFA
IREFB
VREFA = VREFB = 5 V
70
99.5
130
μA
—
PWM frequency1
fPWM1
PWMSW = 0 V
38
58
78
kHz
—
PWM frequency2
fPWM2
PWMSW = 5 V
19
29
39
kHz
—
M
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Torque Control Block
Cmp threshold H (100%)
Cmp threshold L (33%)
1.2
1.8
μs
—
IN0 = IN1 = 0 V
IN2 = IN3 = 0 V
479
503
528
mV
—
VTC
IN0 = 5 V , IN1 = 0 V
IN2 = 5 V, IN3 = 0 V
308
333
359
mV
—
VTL
IN0 = 0 V, IN1 = 5 V
IN2 = 0 V, IN3 = 5 V
151
167
184
mV
—
VS5VOUT
VM = 24 V, IS5VOUT = – 2.5
mA
4.5
5.0
5.5
V
—
ZS5VOUT
VM = 24 V, IS5VOUT = – 5 mA
—
14
21
Ω
—
VTH
(p
lan
ed
Reference Voltage Block
Output impedance
0.6
M
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typ isc
e, ont
ma inu
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en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
Cmp threshold C (67%)
Reference voltage
VREFA = VREFB = 0 V
TB
e)
Pulse blanking time
5
Ver. CEB
AN44065A
ELECRTRICAL CHARACTERISTICS (continued)
Note) VM = 24 V , VCC=5V, Ta = 25°C±2°C unless otherwise specified.
Parameter
Min
Limits
Typ
Max
—
—
155
—
°C
*1
—
—
45
—
°C
*1
Symbol
Condition
Thermal protection operating
temperature
TSDon
Thermal protection hysteresis width
ΔTSD
Unit Note
M
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on na
tin nc
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d
Thermal Protection
(p
lan
ed
M
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en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
e)
Note) *1 :Typical Value checked by design.
6
Ver. CEB
AN44065A
Top View
PIN CONFIGURATION
28
27
26
25
24
23
22
1
2
3
4
5
6
7
PHA1
PHB1
IN0
IN1
IN2
IN3
ENABLEA
PWMSW
S5VOUT
GND
VCC
VREFB
VREFA
VM2
21
20
19
18
17
16
15
8
9
10
11
12
13
14
VPUMP
BC2
BC1
N.C.
AOUT1
RCSA
AOUT2
PIN FUNCTIONS
Pin No.
Pin name
M
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an ce
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typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
M
Di ain
sc te
on na
tin nc
ue e/
d
VM1
ENABLEB
TJMON
N.C.
BOUT2
RCSB
BOUT1
Type
Description
1
PHA1
Input
Phase A phase selection input
2
PHB1
Input
Phase B phase selection input
3
IN0
Input
Phase A output torque control 1
4
IN1
Input
Phase A output torque control 2
5
IN2
Input
Phase B output torque control 1
6
IN3
Input
Phase B output torque control 2
7
ENABLEA
Input
Phase A Enable/Disable CTL
8
VM1
9
ENABLEB
10
TJMON
11, 18
N.C.
e)
FIN
FIN
Power supply Motor power supply 1
Input
Output
—
Output
Phase B Enable/Disable CTL
VBE monitor use
—
12
BOUT2
Phase B motor drive output 2
13
RCSB
14
BOUT1
15
AOUT2
16
RCSA
17
AOUT1
Output
Phase A motor drive output 1
19
BC1
Output
Charge Pump capacitor connection 1
20
BC2
Output
Charge Pump capacitor connection 2
21
VPUMP
22
VM2
23
VREFA
Input
Phase A torque reference voltage input
24
VREFB
Input
Phase B torque reference voltage input
Input / Output Phase B current detection
Output
Phase B motor drive output 1
Output
Phase A motor drive output 2
lan
ed
Input / Output Phase A current detection
Charge Pump circuit output
(p
Output
Power supply Motor power supply 2
25
VCC
26
GND
Power supply Signal power supply
Ground
Signal ground
27
S5VOUT
Output
Internal reference voltage (5V output)
28
PWMSW
Input
PWM frequency selection input
FIN
FIN
earth
—
Notes) Concerning detail about pin description, please refer to OPERATION and APPLICATION INFORMATION section.
7
Ver. CEB
AN44065A
FUNCTIONAL BLOCK DIAGRAM
BC1 19
BC2 20
CHARGE
PUMP
21 VPUMP
PHB1 2
ENABLEB 9
Gate Circuit
IN3 6
M
Di ain
sc te
on na
tin nc
ue e/
d
12 BOUT2
e)
SQ
13 RCSB
M
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int ten
en an R
an ce
ce Q /SD
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
R
IN2 5
14 BOUT1
VREFB 24
TJMON 10
PWMSW 28
22 VM2
25 VCC
PWMSW
OSC
TSD
UVLO
BLANK
VREFA 23
8 VM1
15 AOUT2
16 RCSA
IN0 3
17 AOUT1
IN1 4
(p
lan
PHA1 1
S5VOUT 27
Note)
Gate Circuit
ed
ENABLEA 7
VREF
VM
26 GND
This block diagram is for explaining functions. The part of the block diagram may be omitted, or it may be
simplified.
8
Ver. CEB
AN44065A
OPERATION
Control mode
ENABLEA/ENABLEB
PHA1/PHB1
AOUT1/BOUT1
AOUT2/BOUT2
"L"
"H"
"H"
"L"
"L"
"L"
"L"
"H"
"H"
—
OFF
OFF
IN1/IN3
Output Current
"L"
"L"
(VREF / 10) × (1 / Rs) = IOUT
"H"
"L"
(VREF / 10) × (1 / Rs) × (2 / 3) = IOUT
"L"
"H"
(VREF / 10) × (1 / Rs) × (1 / 3) = IOUT
"H"
"H"
0
M
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int ten
en an
an ce
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typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
M
Di ain
sc te
on na
tin nc
ue e/
d
IN0/IN2
e)
1.Truth table
Note) Rs : current detection region
(p
lan
ed
Note) ENABLEA/ENABLEB = "H“ or, IN0 = IN1 = "H"/IN2 = IN3 = "H" , output = OFF
9
Ver. CEB
ed
lan
1
2
3
4
1
VPHA1
VPHB1
FWD
10
2
3
e)
M
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int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ng flow-out flow-in flow-out
ne flow-in
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
flow-out
A-ch.
Motor current
(p
flow-out
B-ch.
Motor current
flow-in
flow-in
M
Di ain
sc te
on na
tin nc
ue e/
d
AN44065A
OPERATION ( continued )
2. drive of full step (4steps sequence)
(IN0 to IN3 = const.)
Control mode(continued)
4
VPHA1
VPHB1
A-ch.
Motor current
B-ch.
Motor current
REV
Ver. CEB
A-ch.
Motor current
1 2 3 4 5 6 7 8
VPHA1
VPHA1
VPHB1
VPHB1
VIN0
VIN0
FWD
11
e)
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi flow-out
flow-in
flow-out flow-in
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
VIN3
ed
VIN2
lan
flow-out
VIN1
(p
flow-out
flow-in
M
Di ain
sc te
on na
tin nc
ue e/
d
B-ch.
Motor current
flow-in
AN44065A
OPERATION ( continued )
3. drive of half step (8steps sequence)
Control mode(continued)
(Ex.)
1 2 3 4 5 6 7 8
VIN1
VIN2
VIN3
A-ch.
Motor current
B-ch.
Motor current
REV
Ver. CEB
VIN3
A-ch.
Motor current
2
3
4
5
6
7
8
1
VPHA1
VPHA1
VPHB1
VPHB1
VIN0
VIN0
FWD
12
2
3
4
e)
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi flow-out
flow-in
flow-out flow-in
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
VIN2
ed
VIN1
lan
flow-out
1
(p
flow-out
flow-in
M
Di ain
sc te
on na
tin nc
ue e/
d
B-ch.
Motor current
flow-in
AN44065A
OPERATION ( continued )
Control mode(continued)
4. 1-2 phase excitation (8steps sequence)
(Ex.)
5
6
7
8
VIN1
VIN2
VIN3
A-ch.
Motor current
B-ch.
Motor current
REV
Ver. CEB
AN44065A
OPERATION ( continued )
Control mode(continued)
5. W1-2phase excitation (16steps sequence)
1 2 3 4 5 6 7 8 9 10111213141516
VPHA1
VPHB1
VPHB1
VIN0
VIN0
VIN1
flow-in
B-ch.
Motor current
VIN3
A-ch.
Motor current
B-ch.
Motor current
FWD
REV
ed
flow-out
flow-in
A-ch.
Motor current
VIN2
lan
flow-out
VIN3
VIN1
(p
VIN2
e)
M
Di ain
sc te
on na
tin nc
ue e/
d
VPHA1
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pflow-in
flow-in
lan winflow-out
flow-out
ed g fo
dis ur
co Pro
nti du
nu ct
ed lif
typ ecy
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yp
1 2 3 4 5 6 7 8 9 10111213141516
13
Ver. CEB
AN44065A
APPLICATIONS INFORMATION
1.
Usage Notes
1) Set the value of the capacitor between the VPUMP and GND pins so that the voltage on the VPUMP pin (pin 21) will
not exceed 40 V in any case regardless of whether it is a transient phenomenon or not while the motor standing by is
started.
M
Di ain
sc te
on na
tin nc
ue e/
d
2) This LSI employs a PWM drive method that switches the high-current output of the output transistor. Therefore, the LSI
is apt to generate noise that may cause the LSI to malfunction or have fatal damage. To prevent these problems, the
power supply must be stable enough. Therefore, the capacitance between the VCC and GND pins must be a
minimum of 0.1 μF and the one between the VM and GND pins must be a minimum of 47 μF and as close as
possible to the LSI so that PWM noise will not cause the LSI to malfunction or have fatal damage.
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
e)
3) In order to prevent mistakes in current detection resulting noise, this LSI is provided with a pulse blanking time of
1.2 μs (typ.). The motor current will not be less than the current determined by blanking time. Pay utmost attention
at the time of minute current control.
The graph on the right-hand side shows
the relationship between the pulse blanking time
RCS current waveform
and minute current value.
while in normal operation
The increase or decrease in the motor current is
Set current
determined by the resistance of the internal winding of the motor.
RCS current waveform when the set
current is less than the minimum
current
Minimum current
Set current
TB
fPWM: PWM frequency
TB: Pulse blanking time
1
fPWM
4) A high current flows into the LSI. Therefore, the common impedance of the PCB pattern cannot be ignored. Take the
following points into consideration and design the PCB pattern of the motor.
A high current flows into the line between the VM1 (pin 8) and VM2 (pin 22) pins. Therefore, noise is generated with
ease at the time of switching due to the inductance (L) of the line, which may result in the malfunctioning or
destruction of the LSI (see the circuit diagram on the left-hand side). As shown in the circuit diagram on the
right-hand side, the escape way of the noise is secured by connecting a capacitor to the connector close to the VM
pin of the LSI. This makes it possible to suppress the direct VM pin voltage of the LSI. Make the settings as shown in
the circuit diagram on the right-hand side as much as possible.
Recommended PCB
lan
ed
Noise is generated with ease
Low spike amplitude
due to
the capacitance
between
the VM pin and ground pin
GND
L
VM
LSI
LSI
C
RCS
C
RCS
VM
L
GND
VM
(p
VM
GND
GND
14
Ver. CEB
AN44065A
APPLICATIONS INFORMATION ( continued )
1.
Usage Notes (continued)
5) In the case of measuring the chip temperature of the LSI,measure the voltage of TJMON(10pin) and presume chip
temperature from following data. Use the following data as reference data. Before applying the LSI to a product,
conduct a sufficient reliability test of the LSI along with the evaluation of the product with the LSI incorporated.
The temperature characteristic of TJMON
M
Di ain
sc te
on na
tin nc
ue e/
d
VBE[V]
M
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en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
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tin uc
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d t ife
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isc ag
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tin
ue
dt
yp
e)
ΔVBE / Δtemp = -1.85 [mV / °C]
Temp [°C]
0
150
6) Power Supply Sequence
If two types of power supply are used
Rise : This LSI is recommended rise of 5Vpower supply before rise of 24Vpower supply.
Fall : Although there is no particular rule, check that VM fall time is about 1sec.
When recommended sequence is difficult, take the diagram below indicates into consideration and design.
Also, rise slew rate design
VM:below 0.1V/µs, VCC:below 0.1V/µs
Power Supply
VM
VCC
1sec
time
lan
ed
Delay:below 100msec
(p
If one type of power supply is used
Rise slew rate design
VM:below 0.1V/µs
7) Check the risk that is caused by the failure of external components.
15
Ver. CEB
ed
lan
(p
Package Code:HSOP042-P-0400D
Body Material
:
Epoxy Resin
Lead Material
:
Cu Alloy
Lead Finish Method :
16
e)
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en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
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d t ife
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on e.
tin
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dt
yp
M
Di ain
sc te
on na
tin nc
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AN44065A
PACKAGE INFORMATION ( Reference Data )
unit:mm
SnBi Plating
Ver. CEB
AN44065A
IMPORTANT NOTICE
1.The products and product specifications described in this book are subject to change without notice for
modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore,
ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your
requirements.
2.When using the LSI for new models, verify the safety including the long-term reliability for each product.
M
Di ain
sc te
on na
tin nc
ue e/
d
3.When the application system is designed by using this LSI, be sure to confirm notes in this book.
Be sure to read the notes to descriptions and the usage notes in the book.
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
e)
4.The technical information described in this book is intended only to show the main characteristics and application
circuit examples of the products. No license is granted in and to any intellectual property right or other right
owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company
as to the infringement upon any such right owned by any other company which may arise as a result of the use of
technical information de-scribed in this book.
5.This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of
our company.
6.This LSI is intended to be used for general electronic equipment.
Consult our sales staff in advance for information on the following applications: Special applications in which
exceptional quality and reliability are required, or if the failure or malfunction of this LSI may directly jeopardize
life or harm the human body.
Any applications other than the standard applications intended.
(1) Space appliance (such as artificial satellite, and rocket)
(2) Traffic control equipment (such as for automobile, airplane, train, and ship)
(3) Medical equipment for life support
(4) Submarine transponder
(5) Control equipment for power plant
(6) Disaster prevention and security device
(7) Weapon
(8) Others : Applications of which reliability equivalent to (1) to (7) is required
It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in
connection with your using the LSI described in this book for any special application, unless our company agrees
to your using the LSI in this book for any special application.
(p
lan
ed
7.This LSI is neither designed nor intended for use in automotive applications or environments unless the specific
product is designated by our company as compliant with the ISO/TS 16949 requirements.
Our company shall not be held responsible for any damage incurred by you or any third party as a result of or in
connection with your using the LSI in automotive application, unless our company agrees to your using the LSI in
this book for such application.
8.If any of the products or technical information described in this book is to be exported or provided to non-residents,
the laws and regulations of the exporting country, especially, those with regard to security export control, must be
observed.
9. Please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of
controlled substances, including without limitation, the EU RoHS Directive. Our company shall not be held
responsible for any damage incurred as a result of your using the LSI not complying with the applicable laws and
regulations.
17
Ver. CEB
AN44065A
USAGE NOTES
1. When designing your equipment, comply with the range of absolute maximum rating and the guaranteed
operating conditions (operating power supply voltage and operating environment etc.). Especially, please be
careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off
and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of
break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as
redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical
injury, fire, social damages, for example, by using the products.
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
3. Pay attention to the direction of LSI. When mounting it in the wrong direction onto the PCB (printed-circuitboard), it might smoke or ignite.
e)
M
Di ain
sc te
on na
tin nc
ue e/
d
2. Comply with the instructions for use in order to prevent breakdown and characteristics change due to external
factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's
process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf
life and the elapsed time since first opening the packages.
4. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit
between pins. In addition, refer to the Pin Description for the pin configuration.
5. Perform a visual inspection on the PCB before applying power, otherwise damage might happen due to
problems such as a solder-bridge between the pins of the semiconductor device. Also, perform a full technical
verification on the assembly quality, because the same damage possibly can happen due to conductive
substances, such as solder ball, that adhere to the LSI during transportation.
6. The LSI is destructed under an abnormal condition, such as the short-circuiting between the output and VM pins,
output and ground pins, or output pins (i.e., load short-circuiting), in which case smoke may be generated. Pay
utmost attention to the use of the LSI.
Pay special attention to the following pins so that they are not short-circuited with the VM pin, ground pin, other
output pin, or current detection pin.
(1) AOUT1 (pin 17), AOUT2 (pin 15), BOUT1 (pin 14), BOUT2 (pin 12)
(2) BC2 (pin 20), VPUMP (pin 21)
(3) VM1 (pin 8), VM2 (pin 22), VREG (pin 25)
(4) RCSA (pin 16), RCSB (pin 13)
The higher the current capacity of power supply is, the higher the possibility of the above destruction or smoke
generation. Therefore, it is recommended to take safety countermeasures, such as the use of a fuse.
7. The protection circuit is for maintaining safety against abnormal operation. Therefore, the protection circuit
should not work during normal operation.
Especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is
momentarily exceeded due to output pin to VM short (Power supply fault), or output pin to GND short (Ground
fault), the LSI might be damaged before the thermal protection circuit could operate.
(p
lan
ed
8. Unless specified in the product specifications, make sure that negative voltage or excessive voltage are not
applied to the pins because the device might be damaged, which could happen due to negative voltage or
excessive voltage generated during the ON and OFF timing when the inductive load of a motor coil or actuator
coils of optical pick-up is being driven.
9. The product which has specified ASO (Area of Safe Operation) should be operated in ASO.
10. Verify the risks which might be caused by the malfunctions of external components.
11.Perform thermal design work with consideration of a sufficient margin to keep the power dissipation based on
supply voltage, load, and ambient temperature conditions.
(The LSI is recommended that junctions are designed below 70~80% of Absolute Maximum Rating.)
18
Ver. CEB
Request for your special attention and precautions
in using the technical information and semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the
laws and regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2) The technical information described in this book is intended only to show the main characteristics and application circuit
examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic
Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon
any such right owned by any other company which may arise as a result of the use of technical information de-scribed in
this book.
e)
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
M
Di ain
sc te
on na
tin nc
ue e/
d
(3) The products described in this book are intended to be used for general applications (such as office equipment,
communications equipment, measuring instruments and household appliances), or for specific applications as expressly
stated in this book.
Please consult with our sales staff in advance for information on the following applications, moreover please exchange
documents separately on terms of use etc.: Special applications (such as for in-vehicle equipment, airplanes, aerospace,
automotive equipment, traffic signaling equipment, combustion equipment, medical equipment and safety devices) in
which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize
life or harm the human body.
Unless exchanging documents on terms of use etc. in advance, it is to be understood that our company shall not be held
responsible for any damage incurred as a result of or in connection with your using the products described in this book for
any special application.
(4) The products and product specifications described in this book are subject to change without notice for modification and/or
improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date
Product Standards in advance to make sure that the latest specifications satisfy your requirements.
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating
conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed
the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down
and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design,
arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages,
for example, by using the products.
(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD,
EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. We do not
guarantee quality for disassembled products or the product re-mounted after removing from the mounting board.
When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed
time since first opening the packages.
(7) When reselling products described in this book to other companies without our permission and receiving any claim of
request from the resale destination, please understand that customers will bear the burden.
(8) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our
company.
(p
lan
ed
No.010618