AN44071A
37V/1.0A&1.7A
Dual Microstepping Motor Driver
・Built-in thermal protection (TSD)
FEATURES
If chip junction temperature rises and reaches to the
・2-channel stepping motor driver
setup temperature, all motor outputs are turned OFF.
A signal driver controls 2 stepping motors
・Built-in abnormal detection output function
・Built-in decoder for micro steps (2-phase, half step,
If OCP or TSD operates, an abnormal detection signal
1-2 phase, W1-2 phase and 2W1-2 phase excitation)
is output.
Stepping motor can be driven by only external clock signal.
・Built-in standby function
・PWM can be driven by built-in CR (3-value can be selected
The operation of standby function can lower current
during PWM OFF period.)
consumption of this LSI.
The selection of PWM OFF period enables the best PWM
・Built-in Home Position function
drive.
Home Position function can detect the position of motor.
・Mix Decay control (4-value can be selected for Fast Decay
・Built-in step detection output function
ratio)
If step detection output function detects clock input
Mix Decay control can improve accuracy of motor current
signal, it outputs a signal.
waveform.
・Built-in 5 V power supply (accuracy : ±5%)
・Built-in over-current protection (OCP)
・56 pin Plastic Small Outline Package With Heat Sink
If the current flows to motor output more than the setup
(SOP Type)
value due to ground-fault etc., the OCP operates and all
motor outputs are turned OFF.
DESCRIPTION
・Built-in under voltage lockout (UVLO)
AN44071A is a quad channel H-bridge driver LSI. Two
If supply voltage falls to less than the operating supply
bipolar stepping motor can be controlled by a single
voltage range, the UVLO operates and all motor outputs
driver LSI. Interface control is 1CLK_type, it can be
are turned OFF.
selected 2-phase excitation, half- step, 1-2 phase
APPLICATIONS
excitation, W1-2 phase excitation and 2W1-2 phase
・LSI for stepping motor drives
excitation.
Mix Decay effect for Motor current
SIMPLIFIED APPLICATION
ENABLEAB
DECAY1AB
DECAY2AB
STPHAB
CLKAB
DIRAB
ST1AB
ST2AB
ST3AB
VREFAB
PWMSWAB
40
23
34
20
39
38
35
36
37
21
22
16 BC1
0.01 μF
17 BC2
18 VPUMP 0.01 μF
TjmonABCD
S5VOUT
STBY
NFAULT
TEST
10 kΩ
10
13
44
11
12
28 AOUT1
PWMSWCD
VREFCD
CLKCD
DIRCD
ST1CD
ST2CD
ST3CD
STPHCD
10 kΩ ENABLECD
DECAY1CD
DECAY2CD
7
8
46
47
50
49
48
9
45
6
51
10 kΩ
0.1 μF
【Fig1:Slow Decay】
+OUT
29 AOUT2
-OUT
31 RCSA
33 AOUT1
Motor Current
24 BOUT2
2ms/div
26 RCSB
41 VM2
43 VM1
distortion
0.1 μF
+
+OUT
-OUT
56 COUT2
54 RCSC
52 COUT1
Motor Current
5 DOUT2
2ms/div
3 RCSD
distortionless
1 DOUT1
14 GND
Notes)
This application circuit is an example. The operation of mass
production set is not guaranteed. You should perform enough
evaluation and verification on the design of mass production set.
You are fully responsible for the incorporation of the above
application circuit and information in the design of your equipment.
Publication date: November 2012
【Fig2:Mix Decay(25%)】
47 μF
1
Condition:
excitation mode ：2W1-2 phase drive
fig1 DECAY1=L DECAY2=L
fig2 DECAY1=L DECAY2=H
Ver. BEB
AN44071A
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Unit
Note
Supply voltage (Pin 41, 43)
VM
37
V
*1
Power dissipation
PD
448
mW
*2
Operating ambient temperature
Topr
–20 to +85
°C
*3
Operating junction temperature
Tj
–20 to + 150
°C
*3
Storage temperature
Tstg
–55 to +150
°C
*3
Output pin voltage (Pin 1, 5, 24, 28, 29, 33, 52, 56)
VOUT
37
V
*4
Motor drive current 1 (Pin 24, 28, 29, 33)
IOUT1
±1.0
A
*5
Motor drive current 2 (Pin 1, 5, 52, 56)
IOUT2
±1.7
A
*5
Flywheel diode current 1(Pin 24, 28, 29, 33)
If1
±1.0
A
*5
Flywheel diode current 2 (Pin 1, 5, 52, 56)
If2
±1.7
A
*5
VRCSA,VRCSB,VRCSC,VRCSD;
2.5
V
—
VDECAY2CD,VDECAY2AB
VDECAY1CD,VDECAY1AB
-0.3 to 6
V
—
VPWMSWAB,VPWMSWCD
-0.3 to 6
V
—
VVREFAB,VVREFCD
-0.3 to 6
V
—
VSTPHAB,VSTPHCD
-0.3 to 6
V
*6
VNFAULT
-0.3 to 6
V
*6
VTEST
-0.3 to 6
V
—
VBC2
(VM-1) to 43
V
*7
VVPUMP
(VM-2) to 43
V
*7
VST1AB,VST2AB,VST3AB
VST1CD,VST2CD,VST3CD
-0.3 to 6
V
—
VDIRAB,VDIRCD
-0.3 to 6
V
—
VCLKAB,VCLKCD
-0.3 to 6
V
—
VENABLEAB,VENABLECD
-0.3 to 6
V
—
VSTBY
-0.3 to 6
V
—
ISTPHAB,ISTPHCD
2
mA
*6
INFAULT
2
mA
*6
IS5VOUT
-7 to 0
mA
—
HBM (Human Body Model)
±2
kV
—
CDM (Charge Device Model)
±1
kV
—
Input Voltage Range
ESD
Notes). This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum
rating. This rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our
stated recommended operating range.
When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected.
*1 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
*2 : The power dissipation shown is the value at Ta = 85°C for the independent (unmounted) LSI package without a heat sink.
When using this LSI, refer to the PD-Ta diagram of the package standard and design the heat radiation with sufficient margin so
that the allowable value might not be exceeded based on the conditions of power supply voltage, load, and ambient
temperature.
*3 : Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25°C.
2
Ver. BEB
AN44071A
ABSOLUTE MAXIMUM RATINGS (continued)
Notes) *4 :This is a rated value of output voltage, and do not apply input voltage from outside to these pins. Set not to exceed
the allowable range at any time.
*5 :Do not apply external current to any pin specially mentioned. For circuit currents, (+) denotes current flowing into the
LSI and (–) denotes current flowing out of the LSI.
*6 :This pin is connected to open drain circuit inside. Connect a resistor in series with power supply.Do not exceed the
rated value at any time. Refer to page 4 for the recommended value.
*7 :External voltage must not be applied to this pin. Do not exceed the rated value at any time.
POWER DISSIPATION RATING
θ JA
PD (Ta=25 °C)
PD (Ta=85 °C)
Mount on PWB *1
79.5 °C/W
1572mW
818mW
Without PWB
144.9°C/W
863mW
448mW
Condition
Note). For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, supply
voltage, load and ambient temperature conditions to ensure that there is enough margin follow the power and
the thermal design does not exceed the allowable value.
*1: Glass-Epoxy: 50×50×0.8 (mm) , heat dissipation fin: Dai-pad , the state where it does not mount.
CAUTION
Although this has limited built-in ESD protection circuit, but permanent damage may occur on it.
Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min.
Typ.
Max.
Unit
Note
VM1,VM2
10
24
34
V
*1
VDECAY2CD,VDECAY2AB
VDECAY1CD,VDECAY1AB
0
-
5.5
V
—
VPWMSWAB,VPWMSWCD
0
-
5.5
V
—
VVREFAB,VVREFCD
0
-
5
V
—
VTEST
0
-
5.5
V
—
VST1AB,VST2AB,VST3AB
VST1CD,VST2CD,VST3CD
0
-
5.5
V
—
VDIRAB,VDIRCD
0
-
5.5
V
—
VCLKAB,VCLKCD
0
-
5.5
V
—
VENABLEAB,VENABLECD
0
-
5.5
V
—
VSTBY
0
-
5.5
V
—
CBC
-
0.01
-
μF
—
CVPUMP
-
0.01
-
μF
—
CS5VOUT
-
0.1
-
μF
—
Operating ambient temperature
Taopr
-20
-
85
°C
—
Operating junction temperature
Tjopr
-
-
120
°C
—
Supply voltage range
Input Voltage Range
External Constants
Note) *1 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
3
Ver. BEB
AN44071A
ELECRTRICAL CHARACTERISTICS
VM=24V,Ta = 25°C±2°C unless otherwise specified.
Parameter
Symbol
Condition
Output saturation voltage 1 High
VOH1
I = –0.5 A (Pin 24, 28, 29,
33)
Output saturation voltage 1 Low
VOL1
I = 0.5 A (Pin 24, 28, 29,
33)
Output saturation voltage 2 High
VOH2
I = –0.8 A (Pin 1, 5, 52,
56)
Output saturation voltage 2 Low
VOL2
I = 0.8 A (Pin 1, 5, 52, 56)
—
Flywheel diode forward voltage 1
VDI1
I = 0.5 A (Pin 24, 28, 29,
33)
Flywheel diode forward voltage 2
VDI2
Min
Limits
Typ
Max
Unit Note
Power block
VM
VM
– 0.5
– 0.3
—
V
—
0.75
V
—
—
V
—
0.64
0.97
V
—
0.5
1
1.5
V
—
I = 0.8 A (Pin 1, 5, 52, 56)
0.5
1
1.5
V
—
—
0.48
VM
VM
– 0.55 – 0.35
Upper-side output OFF current
IOUTOFF1
VM = 37 V, VRCS = 0 V,
OUT = 0 V
-10
—
—
μA
*1
Lower-side output OFF current
IOUTOFF2
VM = 37 V, VRCS = 0 V,
OUT = 37 V
—
—
100
μA
*1
ENABLEAB =
ENABLECD = Low, STBY
= High
—
10
19
mA
—
STBY = Low
—
22
40
μA
—
Supply current
Supply current (Active)
IM
Supply current (STBY)
IMSTBY
I/O Block
STBY High-level input voltage
VSTBYH
—
2.1
—
5.5
V
—
STBY Low-level input voltage
VSTBYL
—
0
—
0.6
V
—
STBY High-level input current
ISTBYH
STBY = 5 V
25
50
100
μA
—
STBY Low-level input current
ISTBYL
STBY = 0 V
–2
—
2
μA
—
CLK High-level input voltage
VCLKH
—
2.1
—
5.5
V
*2
CLK Low-level input voltage
VCLKL
—
0
—
0.6
V
*2
CLK High-level input current
ICLKH
CLK = 5 V
25
50
100
μA
*2
CLK Low-level input current
ICLKL
CLK = 0 V
–2
—
2
μA
*2
CLK maximum input frequency
fCLK
—
50
—
—
kHz
*2
ENABLE High-level input voltage
VENABLEH
—
2.1
—
5.5
V
*3
ENABLE Low-level input voltage
VENABLEL
—
0
—
0.6
V
*3
ENABLE High-level input current
IENABLEH
ENABLE = 5 V
25
50
100
μA
*3
ENABLE Low-level input current
IENABLEL
ENABLE = 0 V
–2
—
2
μA
*3
Notes)
*1 :OUT represents AOUT1, AOUT2, BOUT1, BOUT2, COUT1, COUT2, DOUT1 and DOUT2.
*2 :CLK represents CLKAB and CLKCD.
*3 :ENABLE represents ENABLEAB and ENABLECD.
4
Ver. BEB
AN44071A
ELECRTRICAL CHARACTERISTICS （continued）
VM=24V,Ta = 25°C±2°C unless otherwise noted.
Min
Limits
Typ
Max
—
2.3
—
5.5
V
*4
VPWMSWM
—
1.3
—
1.7
V
*4
PWMSW Low-level input voltage
VPWMSWL
—
0
—
0.6
V
*4
PWMSW High-level input current
IPWMSWH
PWMSW = 5 V
40
83
150
μA
*4
PWMSW Low-level input current
IPWMSWL
PWMSW = 0 V
–70
–36
–18
μA
*4
PWMSW open voltage
VPWMSWO
—
1.3
1.5
1.7
V
*4
DECAY High-level input voltage
VDECAYH
—
2.1
—
5.5
V
*5
DECAY Low-level input voltage
VDECAYL
—
0
—
0.6
V
*5
DECAY High-level input current
IDECAYH
DECAY = 5 V
25
50
100
μA
*5
DECAY Low-level input current
IDECAYL
DECAY = 0 V
–2
—
2
μA
*5
Parameter
Symbol
Condition
PWMSW High-level input voltage
VPWMSWH
PWMSW Middle-level input voltage
Unit Note
I/O Block （Continued)
DIR High-level input voltage
VDIRH
—
2.1
—
5.5
V
*6
DIR Low-level input voltage
VDIRL
—
0
—
0.6
V
*6
DIR High-level input current
IDIRH
DIR = 5 V
25
50
100
μA
*6
DIR Low-level input current
IDIRL
DIR = 0 V
–2
—
2
μA
*6
ST High-level input voltage
VSTH
—
2.1
—
5.5
V
*7
ST Low-level input voltage
VSTL
—
0
—
0.6
V
*7
ST High-level input current
ISTH
ST = 5 V
25
50
100
μA
*7
ST Low-level input current
ISTL
ST = 0 V
–2
—
2
μA
*7
Input bias current 1
IREFH
VREFAB = VREFCD = 5 V
–2
—
2
μA
—
Input bias current 2
IREFL
VREFAB = VREFCD = 0 V
–2
—
2
μA
—
PWM OFF time 1
TOFF1
PWMSW = Low
16.8
28
39.2
μs
*4
PWM OFF time 2
TOFF2
PWMSW = High
9.1
15.2
21.3
μs
*4
PWM OFF time 3
TOFF3
PWMSW = Middle
4.9
8.1
11.3
μs
*4
TB
VREFAB = VREFCD = 0 V
0.4
0.7
1.0
μs
—
VTCMP
VREFAB = VREFCD = 5 V
475
500
525
mV
—
Reference voltage
VS5VOUT
IS5VOUT = 0 mA
4.75
5.0
5.25
V
—
Output impedance
ZS5VOUT
IS5VOUT = –7 mA
—
—
10
Ω
—
Torque Control Block
Pulse blanking time
Comp threshold
Reference voltage block
Notes) *4 : PWMSW represents PWMSWAB and PWMSWCD.
*5 : DECAY represents DECAY1AB, DECAY2AB, DECAY1CD and DECAY2CD.
*6 : DIR represents DIRAB and DIRCD.
*7 : ST represents ST1AB, ST2AB, ST3AB, ST1CD, ST2CD and ST3CD.
5
Ver. BEB
AN44071A
ELECRTRICAL CHARACTERISTICS （continued）
VM=24V,Ta = 25°C±2°C unless otherwise noted.
Parameter
Symbol
Condition
Min
Limits
Typ
Max
—
—
0.2
V
—
—
—
5
μA
—
Unit Note
Abnomal detection output block
NFAULT pin output Low-level
voltage
NFAULT pin output leak current
VNFAULTL
INFAULT = 1 mA
INFAULT(leak) VNFAULT = 5 V
Home Position/ STEP detection output block
STPH pin output Low-level voltage
STPH pin output leak current
VSTPHL
ISTPH = 1 mA
—
—
0.2
V
*8
ISTPH(leak)
VSTPH = 5 V
—
—
5
μA
*8
Test input block
TEST High-level input voltage
VTESTH
—
4.0
—
5.5
V
—
TEST Low-level input voltage
VTESTL
—
0
—
0.6
V
—
TEST High-level input current
ITESTH
TEST = 5 V
25
50
100
μA
—
TEST High-level input current
ITESTL
TEST = 0 V
–2
—
2
μA
—
*8 : STPH represents STPHAB and STPHCD.
6
Ver. BEB
AN44071A
ELECRTRICAL CHARACTERISTICS （continued）
VM=24V,Ta = 25°C±2°C unless otherwise noted.
Parameter
Symbol
Condition
Min
Limits
Typ
Max
Unit Note
Output block
Output slew rate 1
VTr
At the rising edge of
output voltage, sink side of
motor current
—
350
—
V/μs
*9
*10
Output slew rate 2
VTf
At the falling edge of
output voltage, sink side of
motor current
—
-400
—
V/μs
*9
*10
Dead time
TD
—
—
0.8
—
μs
*9
*10
TSDon
—
—
150
—
°C
*10
Protection start voltage
VUVLO1
—
—
7.5
—
V
*10
Protection stop voltage
VUVLO2
—
—
8.5
—
V
*10
Thermal shutdown protection
Thermal shutdown protection
operating temperature
Under voltage lockout
*9 :The characteristics of all outputs of AOUT1, AOUT2, BOUT1, BOUT2, COUT1, COUT2, DOUT1 and DOUT2
are shown.
*10 :Typical Value checked by design.
7
Ver. BEB
AN44071A
PIN CONFIGURATION
Top View
DOUT1
N.C.
RCSD
N.C.
DOUT2
DECAY1CD
PWMSWCD
VREFCD
STPHCD
TjmonABCD
NFAULT
TEST
S5VOUT
GND
COM1
BC1
BC2
VPUMP
N.C.
STPHAB
VREFAB
PWMSWAB
DECAY1AB
BOUT2
N.C.
RCSB
N.C.
BOUT1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
8
COUT2
N.C.
RCSC
N.C.
COUT1
DECAY2CD
ST1CD
ST2CD
ST3CD
DIRCD
CLKCD
ENABLEDCD
STBY
VM1
COM2
VM2
ENABLEAB
CLKAB
DIRAB
ST3AB
ST2AB
ST1AB
DECAY2AB
AOUT1
N.C.
RCSA
N.C.
AOUT2
Ver. BEB
AN44071A
PIN FUNCTIONS
Pin No.
1
Pin name
DOUT1
2, 4,19,
25, 27,30, N.C.
32,53, 55
Type
Output
—
Description
Phase D motor drive output 1
N.C.
3
RCSD
Input/Output
5
DOUT2
Output
Phase D motor drive output 2
6
DECAY1CD
Input
Phase C/D Mix Decay setup 1
7
PWMSWCD
Input
Phase C/D PWM OFF period selection input
8
VREFCD
Input
Phase C/D Torque reference voltage input
9
STPHCD
Output
Phase C/D Home Position / Step detection signal output
10
TjmonABCD
Output
Phase A/B, C/D VBE monitor
11
NFAULT
Output
Abnormal detection output
12
TEST
13
S5VOUT
Output
Internal reference voltage (output 5 V)
14
GND
Ground
Ground
15
COM1
16
BC1
Output
Capacitor connection 1 for charge pump
17
BC2
Output
Capacitor connection 2 for charge pump
18
VPUMP
Output
Charge pump circuit output
20
STPHAB
Output
Phase A/B Home Position / Step detection signal output
21
VREFAB
Input
Phase A/B Torque reference voltage input
22
PWMSWAB
Input
Phase A/B PWM OFF period selection input
23
DECAY1AB
Input
Phase A/B Mix Decay setup 1
24
BOUT2
Output
Phase B motor drive output 2
26
RCSB
Input/Output
28
BOUT1
Output
Input
—
Phase D motor current detection
Test mode setup
Die pad ground 1
Phase B motor current detection
Phase B motor drive output 1
9
Ver. BEB
AN44071A
PIN FUNCTIONS (continued)
Pin No.
Pin name
Type
Description
29
AOUT2
Output
Phase A motor drive output 2
31
RCSA
Input/Output
33
AOUT1
Output
Phase A motor drive output 1
34
DECAY2AB
Input
Phase A/B Mix Decay setup 2
35
ST1AB
Input
Phase A/B excitation selection 1
36
ST2AB
Input
Phase A/B excitation selection 2
37
ST3AB
Input
Phase A/B excitation selection 3
38
DIRAB
Input
Phase A/B rotation direction setup
39
CLKAB
Input
Phase A/B clock input
40
ENABLEAB
Input
Phase A/B Enable / disable CTL
41
VM2
42
COM2
43
VM1
44
STBY
Input
Standby
45
ENABLECD
Input
Phase C/D Enable / disable CTL
46
CLKCD
Input
Phase C/D clock input
47
DIRCD
Input
Phase C/D rotation direction setup
48
ST3CD
Input
Phase C/D excitation selection 3
49
ST2CD
Input
Phase C/D excitation selection 2
50
ST1CD
Input
Phase C/D excitation selection 1
51
DECAY2CD
Input
Phase C/D Mix Decay setup 2
52
COUT1
Output
Phase C motor drive output 1
54
RCSC
Input/Output
56
COUT2
Output
Phase A motor current detection
Power supply Power supply 2 for motor
—
Die pad ground 2
Power supply Power supply 1 for motor
Phase C motor current detection
Phase C motor drive output 2
Notes) Concerning detail about pin description, please refer to OPERATION and APPLICATION INFORMATION section.
10
Ver. BEB
AN44071A
FUNCTIONAL BLOCK DIAGRAM
ENABLEAB 40
DECAY1AB 23
DECAY2AB 34
VREFAB
PWMSWAB
39
38
35
Micro
Step
Decoder
36
37
21
22
S Q
CLKAB
DIRAB
ST1AB
ST2AB
ST3AB
29
20
R
STPHAB
31
OSC
1/10
Gate
Circuit
33
24
BLANK
BC2
TjmonABCD
R
16
CHARGE
PUMP
28
10
S5VOUT 13
41
TSD
AMP
BG
VM
VM2
UVLO
DOUT2
STBY
11
43
12
R
TEST
S Q
56
TEST
BOUT1
100 kΩ
OCP
STBY 44
RCSB
S5VOUT
AOUT1
NFAULT
BOUT2
PWMSW
18
17
AOUT1
Q S
BC1
RCSA
DACA
DACB
26
VPUMP
AOUT2
VM1
COUT2
54
RCSC
PWMSWCD 7
46
50
ST1CD 49
ST2CD
48
ST3CD
9
Micro
Step
Decoder
Gate
Circuit
DACC
DACD
5
3
ENABLECD 45
DECAY1CD 6
51
DECAY2CD
GND
52
BLANK
DIRCD 47
STPHCD
OSC
1/10
Q S
CLKCD
8
R
VREFCD
PWMSW
1
COUT1
DOUT2
RCSD
DOUT1
14
Note) This block diagram is for explaining functions. Part of the block diagram may be omitted, or it may be simplified.
11
Ver. BEB
AN44071A
OPERATION
1. Control mode
Note)* is AB or CD.
1) Truth table (Excitation select)
ENABLE*
DIR*
ST1*
ST2*
ST3*
Low
—
—
—
—
Output excitation mode
High
Low
Low
Low
Low
High
Low
Low
High
Low
High
Low
High
Low
Low
High
Low
High
High
Low
High
Low
—
—
High
2W1-2 phase excitation drive (32-step
sequence)
High
High
Low
Low
Low
2-phase excitation drive (4-step sequence)
High
High
Low
High
Low
High
High
High
Low
Low
High
High
High
High
Low
High
High
—
—
High
—
Output OFF
2-phase excitation drive (4-step sequence)
Half step drive (8-step sequence)
Phase B/D 90°
delay to phase
A/C
1-2 phase excitation drive (8-step sequence)
W1-2 phase excitation drive (16-step
sequence)
Half step drive (8-step sequence)
Phase B/D 90°
advance to
phase A/C
1-2 phase excitation drive (8-step sequence)
W1-2 phase excitation drive (16-step
sequence)
2W1-2 phase excitation drive (32-step
sequence)
3) Truth table (PWM OFF period
selection)
2) Truth table (Control / Charge pump circuit)
STBY
ENABLE*
Control / Charge
pump circuit
Output transistor
PWMSW*
PWM OFF period (*5)
Low
—
OFF
All channel output : OFF
Low
28.0 μ s
High (*3)
Low
ON
OFF (*4)
Middle
8.1 μ s
High (*3)
High
ON
ON
High
15.2 μ s
4) Truth table (Decay selection)
5) Truth table (STPH output selection)
DECAY1*
DECAY2*
Decay control (*6)
Low
Low
Slow Decay
TEST
STPH* output
STEP detection output
Home Position output
Low
High
25%
Low
High
Low
50%
High
High
High
100%
Note) The above rate is applied to Fast Decay every PWM OFF period.
6) Truth table (NFAULT output)
TSD (*1)
OCP (*2)
NFAULT
Output transistor
Thermal shutdown
protection start
－
Low
All channel output : OFF
Over-current detection start
Low
All channel output : OFF
Over-current detection stop
Hi-Z
ON
－
Thermal shutdown
protection stop
Notes) *1 : TSD is a latch type protection
→ The protection operation starts at 150°C. (All motor outputs are turned off , and latched.) / The latch is released by
Standby or UVLO.
*2 : OCP is a latch type protection
→ All motor outputs are turned off by over-current detection, and be latched. / The latch is released by Standby or UVLO.
In addition, All motor outputs are turned off at under UVLO.
*3 : Input external signals to STBY pin in order to set STBY signal to High-level.
Because, STBY pin cannot be set to High-level when it is connected to S5VOUT(Pin13).
*4 : The output transistors of AB/CD channel are controlled by ENABLEAB/CD respectively.
*5 : The PWM OFF intervals of AB/CD channel are set by PWMSWAB/CD respectively.
*6 : The Decay controls of AB/CD channel are set by DECAY1AB/CD ( DECAY2AB/CD) respectively.
12
Ver. BEB
AN44071A
OPERATION (continued)
2. Each phase current value
1) 1-2 phase, W1-2 phase, 2W1-2 phase DIRAB / DIRCD = Low
Note) The definition of Phase A, B, C and D current “100%” : (VREFAB(VREFCD) × 0.1) / Motor current detection
resistance
1-2 phase
(8-Step)
W1-2 phase
(16- Step)
2W1-2 phase
(32-Step)
A/C phase current
(%)
B/D phase current
(%)
1
1
1
70.7
–70.7
—
—
2
83.2
–55.6
—
2
3
92.4
–38.3
—
—
4
98.1
–19.5
2
3
5
100
0
—
—
6
98.1
19.5
—
4
7
92.4
38.3
—
—
8
83.2
55.6
3
5
9
70.7
70.7
—
—
10
55.6
83.2
—
6
11
38.3
92.4
—
—
12
19.5
98.1
4
7
13
0
100
—
—
14
–19.5
98.1
—
8
15
–38.3
92.4
—
—
16
–55.6
83.2
5
9
17
–70.7
70.7
—
—
18
–83.2
55.6
—
10
19
–92.4
38.3
—
—
20
–98.1
19.5
6
11
21
–100
0
—
—
22
–98.1
–19.5
—
12
23
–92.4
–38.3
—
—
24
–83.2
–55.6
7
13
25
–70.7
–70.7
—
—
26
–55.6
–83.2
—
14
27
–38.3
–92.4
—
—
28
–19.5
–98.1
8
15
29
0
–100
—
—
30
19.5
–98.1
—
16
31
38.3
–92.4
—
—
32
55.6
–83.2
13
Ver. BEB
AN44071A
OPERATION (continued)
2. Each phase current value (continued)
2) 1-2 phase, W1-2 phase, 2W1-2 phase DIRAB / DIRCD = High
Note) The definition of Phase A, B, C and D current “100%” : (VREFAB(VREFCD) × 0.1) / Motor current detection
resistance
1-2 phase
(8-Step)
W1-2 phase
(16-Step)
2W1-2 phase
(32-Step)
A/C phase current
(%)
B/D phase current
(%)
1
1
1
70.7
–70.7
—
—
2
55.6
–83.2
—
2
3
38.3
–92.4
—
—
4
19.5
–98.1
2
3
5
0
–100
—
—
6
–19.5
–98.1
—
4
7
–38.3
–92.4
—
—
8
–55.6
–83.2
3
5
9
–70.7
–70.7
—
—
10
–83.2
–55.6
—
6
11
–92.4
–38.3
—
—
12
–98.1
–19.5
4
7
13
–100
0
—
—
14
–98.1
19.5
—
8
15
–92.4
38.3
—
—
16
–83.2
55.6
5
9
17
–70.7
70.7
—
—
18
–55.6
83.2
—
10
19
–38.3
92.4
—
—
20
–19.5
98.1
6
11
21
0
100
—
—
22
19.5
98.1
—
12
23
38.3
92.4
—
—
24
55.6
83.2
7
13
25
70.7
70.7
—
—
26
83.2
55.6
—
14
27
92.4
38.3
—
—
28
98.1
19.5
8
15
29
100
0
—
—
30
98.1
–19.5
—
16
31
92.4
–38.3
—
—
32
83.2
–55.6
14
Ver. BEB
AN44071A
OPERATION (continued)
3. Each phase current value(Timing chart)
1) 2-phase excitation drive (4-step sequence)
(ST1AB/ST1CD = Low, ST2AB/ST2CD = Low, ST3AB/ST3CD = Low)
1
CLKAB/
CLKCD
2
3
4
1
2
3
4
1
1
CLKAB/
CLKCD
2
3
4
1
2
3
4
1
+100%
+100%
IAOUT1/
ICOUT1
0%
IBOUT1/
IDOUT1
IAOUT1/
ICOUT1
0%
–100%
–100%
+100%
+100%
0%
IBOUT1/
IDOUT1
0%
–100%
–100%
REV
(DIRAB/DIRCD = High)
FWD
(DIRAB/DIRCD = Low)
2) Half step drive (8-step sequence)
(ST1AB/ST1CD = Low, ST2AB/ST2CD = High, ST3AB/ST3CD = Low)
1
2
3
4
5
6
7
8
1
2
CLKAB/
CLKCD
CLKAB/
CLKCD
1
2
3
4
5
6
7
8
+100%
IAOUT1/
ICOUT1
0%
IBOUT1/
IDOUT1
1
2
+100%
IAOUT1/
ICOUT1
0%
–100%
–100%
+100%
+100%
0%
IBOUT1/
IDOUT1
0%
–100%
–100%
REV
(DIRAB/DIRCD = High)
FWD
(DIRAB/DIRCD = Low)
15
Ver. BEB
AN44071A
OPERATION (countinued)
3. Each phase current value (Timing chart) (continued)
3) 1-2-phase excitation (8-step sequence)
(ST1AB/ST1CD = High, ST2AB/ST2CD = Low, ST3AB/ST3CD = Low)
1
2
3
4
5
6
7
8
1
1
2
CLKAB/
CLKCD
2
3
4
5
6
7
8
1
2
CLKAB/
CLKCD
+100%
+70.7%
IAOUT1/
ICOUT1
0%
IBOUT1/
IDOUT1
+100%
+70.7%
IAOUT1/
ICOUT1
0%
–70.7%
–100%
–70.7%
–100%
+100%
+70.7%
+100%
+70.7%
0%
IBOUT1/
IDOUT1
0%
–70.7%
–100%
–70.7%
–100%
REV
(DIRAB/DIRCD = High)
FWD
(DIRAB/DIRCD = Low)
16
Ver. BEB
AN44071A
OPERATION (countinued)
3. Each phase current value (Timing chart) (continued)
4) W1-2-phase excitation (16-step sequence)
(ST1AB/ST1CD = High, ST2AB/ST2CD = High, ST3AB/ST3CD = Low)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
CLKAB/
CLKCD
+100%
+92.4%
+70.7%
+38.3%
IAOUT1/
ICOUT1
0%
–38.3%
–70.7%
–92.4%
–100%
+100%
+92.4%
+70.7%
+38.3%
IBOUT1/
IDOUT1
0%
–38.3%
–70.7%
–92.4%
–100%
FWD
(DIRAB/DIRCD = Low)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
CLKAB/
CLKCD
+100%
+92.4%
+70.7%
+38.3%
IAOUT1/
ICOUT1
0%
–38.3%
–70.7%
–92.4%
–100%
+100%
+92.4%
+70.7%
IBOUT1/
IDOUT1
+38.3%
0%
–38.3%
–70.7%
–92.4%
–100%
REV
(DIRAB/DIRCD = High)
17
Ver. BEB
AN44071A
OPERATION (continued)
3. Each phase current value (Timing chart) (continued)
5) 2W1-2-phase excitation (32-step sequence)
(ST3AB/ST3CD = High)
1
CLKAB/
CLKCD
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 2
+100%
+98.1%
+92.4%
+83.2%
+70.7%
+55.6%
+38.3%
+19.5%
IAOUT1/
ICOUT1
+0%
–19.5%
–38.3%
–55.6%
–70.7%
–83.2%
–92.4%
–98.1%
+100%/–100%
+98.1%
+92.4%
+83.2%
+70.7%
+55.6%
+38.3%
IBOUT1/
IDOUT1
+19.5%
+0%
–19.5%
–38.3%
–55.6%
–70.7%
–83.2%
–92.4%
–98.1%
–100%
FWD
(DIRAB/DIRCD = Low)
1 2
CLKAB/
CLKCD
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 2
+100%
+98.1%
+92.4%
+83.2%
+70.7%
+55.6%
+38.3%
IAOUT1/
ICOUT1
+19.5%
+0%
–19.5%
–38.3%
–55.6%
–70.7%
–83.2%
–92.4%
–98.1%
+100%/–100%
+98.1%
+92.4%
+83.2%
+70.7%
IBOUT1/
IDOUT1
+55.6%
+38.3%
+19.5%
+0%
–19.5%
–38.3%
–55.6%
–70.7%
–83.2%
–92.4%
–98.1%
–100%
REV
(DIRAB/DIRCD = High)
18
Ver. BEB
AN44071A
OPERATION (continued)
4. Timing chart when DIR switches
(Example 1) Timing chart at 1-2-phase excitation (DIRAB/DIRCD : Low → High)
CLKAB/
CLKCD
DIRAB/
DIRCD
IAOUT1/
ICOUT1
IBOUT1/
IDOUT1
State (DIRAB/DIRCD : Low) 5
6
7
6
5
4
3
When DIRAB(DIRCD) switches,
the state before switching is kept and operates continuously.
(Example 2) Timing chart at 1-2-phase excitation (DIRAB/DIRCD : High → Low)
CLKAB/
CLKCD
DIRAB/
DIRCD
IAOUT1/
ICOUT1
IBOUT1/
IDOUT1
State (DIRAB/DIRCD : High) 5
6
7
6
5
4
3
When DIRAB(DIRCD) switches,
the state before switching is kept and operates continuously.
19
Ver. BEB
AN44071A
OPERATION (continued)
5. Home Position function (TEST=High)
This LSI has built-in Home Position function to reduce the displacement of motor current state at the change of
excitation mode during motor drive. Low-level voltage is output to STPHAB pin and STPHCD pin at the timing when
the displacement of motor current state doesn't occur at the change of excitation mode. The timing when Low-level
voltage is output to STPHAB pin and STPHCD pin is as follows. The Home Position function becomes valid by
setting TEST pin to High.
Connect pull-up resistor to power supply (recommendation : S5VOUT), because STPHAB pin and STPHCD pin are
composed by open drain circuit. The recommended value of pull-up resistor is 10 kΩ.
Home Position output timing chart (DIRAB / DIRCD = Low)
1) 2W1-2-phase excitation
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1
CLKAB/
CLKCD
+100%
+98.1%
+92.4%
+83.2%
+70.7%
+55.6%
+38.3%
+19.5%
+0%
–19.5%
–38.3%
–55.6%
–70.7%
–83.2%
–92.4%
–98.1%
–100%
IAOUT1/
ICOUT1
+100%
+98.1%
+92.4%
+83.2%
+70.7%
+55.6%
+38.3%
+19.5%
+0%
–19.5%
–38.3%
–55.6%
–70.7%
–83.2%
–92.4%
–98.1%
–100%
IBOUT1/
IDOUT1
STPHAB/
STPHCD
20
Ver. BEB
AN44071A
OPERATION (continued)
5. Home Position function(TEST=High)(continued)
Home Position output timing chart (DIRAB / DIRCD = Low) (continued)
2) W1-2-phase excitation
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
CLKAB/
CLKCD
+100%
+92.4%
+70.7%
+38.3%
IAOUT1/
ICOUT1
0%
–38.3%
–70.7%
–92.4%
–100%
+100%
+92.4%
+70.7%
+38.3%
IBOUT1/
IDOUT1
0%
–38.3%
–70.7%
–92.4%
–100%
STPHAB/
STPHCD
21
Ver. BEB
AN44071A
OPERATION (continued)
5. Home Position function (TEST=High) (continued)
Home Position output timing chart (DIRAB / DIRCD = Low)(continued)
3) 1-2-phase excitation
1
2
3
4
5
6
7
8
１
CLKAB/
CLKCD
+100%
+70.7%
IAOUT1/
ICOUT1
0%
–70.7%
–100%
+100%
+70.7%
IBOUT1/
IDOUT1
0%
–70.7%
–100%
STPHAB/
STPHCD
4) Half step
1
2
3
4
5
6
7
8
１
CLKAB/
CLKCD
+100%
IAOUT1/
ICOUT1
0%
–100%
+100%
IBOUT1/
IDOUT1
0%
–100%
STPHAB/
STPHCD
22
Ver. BEB
AN44071A
OPERATION (continued)
5. Home Position function (TEST=High) (continued)
Home Position output timing chart (DIRAB / DIRCD = Low) (continued)
5) 2-phase excitation
1
2
3
4
１
CLKAB/
CLKCD
+100%
IAOUT1/
ICOUT1
0%
–100%
+100%
IBOUT1/
IDOUT1
0%
–100%
STPHAB/
STPHCD
23
Ver. BEB
AN44071A
OPERATION (continued)
6. STEP detection output function (TEST = Low)
Whenever edges signal is input into clock input pins, this LSI outputs Low pulse signal from step detection
output pins. The Low pulse width depend on each excitation mode. Refer to the below table. The STEP
detection function becomes valid by setting TEST pin to Low. Connect pull-up resistor to supply voltage
(Recommendation : S5VOUT), because STPHAB pin and STPHCD pin are composed by open drain circuit.
The recommended value of pull-up resistor is 10 kΩ.
CLK*
(Clock input pin)
Max. about 1 μ s
STPH*
(Step detection output pin)
（* : AB or CD)
T1
T1
T1
Table Step detection output pulse width
Pulse width (T1)
2-phase excitation
Half step
/ 1-2 phase excitation
W1-2-phase
excitation
2W1-2-phase
excitation
About 20 μs
About 20 μs
About 10 μs
About 5 μs
7. Over-current protection function
This LSI has over-current protection (OCP) circuit to protect from the ground-fault etc. of the motor output. When
motor current more than setting value flows to power MOS for about 3.8 μ s (Typ.) due to the ground-fault, all
motor outputs are turned OFF by latch operation. OCP is canceled by STBY = Low or UVLO (Under-voltage
lockout) operation. However, the OCP circuit do not guaranteed the protection circuit of set. Therefore, do not
use the OCP function of this LSI to protect a set. Note that this LSI might break before the protection function
operates when it instantaneously exceeds the safe operation area and the maximum rating. When the inductor
element is large due to the length of wiring at ground-fault, note that this LSI might break. Because the motor
output voltage falls on a negative voltage or excessively rises after motor current excessively flows to motor
outputs. The setup current of the OCP (reference) is as follows.
Table Over-current protection setup current (Typ. value)
Setup current
A/Bch motor output
C/Dch motor output
2.2 A
3.3 A
8. About inputting the supply voltage to IF pins when VM power supply is not applied.
This LSI does the measures of error for inputting voltage to IF pins when VM power supply is not applied.
IF pin : ENABLE*, DIR*, ST1*, ST2*, ST3*, CLK*, STBY, VREF* (* : AB or CD)
Therefore, this LSI doesn't break and it doesn't cause error operation by the input voltage to the IF pins when VM
supply voltage is not supplied.
24
Ver. BEB
AN44071A
APPLICATIONS INFORMATION
1. Notes
1) Pulse blanking time
This LSI has pulse blanking time (0.7 µs/Typ. value) to prevent erroneous current detection caused by noise.
Therefore, the motor current value will not be less than current determined by pulse blanking time. Pay attention at
the time of low current control. The relation between pulse blanking time and minimum current value is shown as
Chart 1. In addition, increase-decrease of motor current value is determined by L value, wire wound resistance,
induced voltage and PWM on Duty inside a motor.
Setup current value
At normal operation
Minimum current value
Setup current value
In case of setting less
than minimum current
value
TPWM : PWM OFF period
TB
: Pulse blanking time
TB
TPWM
Chart 1. RCS current waveform
2) VREF voltage
When VREF* voltage is set to Low-level, erroneous detection of current might be caused by noise because
threshold of motor current detection comparator becomes low (= VREF/10 × motor current ratio [%] .
Use this LSI after confirming no misdetection with setup VREF* voltage.
If VREF* pin is open, input voltage might be irregular and rise, a large current might flow to the output. Therefore
do not use on condition that VREF* pin is open.
3) Notes on interface
Absolute maximum of Pin 6 to 8, Pin 12, Pin 21 to 23, Pin 34 to 40 and Pin 44 to 51 is –0.3 V to 6 V. When the
setup current for a motor is large and lead line of GND is long, GND pin potential might rise. Take notice that
interface pin potential is negative to difference in potential between GND pin reference and interface pin in spite
of inputting 0 V to the interface pin. At that time, pay attention allowable voltage range must not be exceeded.
4) Notes on test mode
When inputting voltage of above 0.6 V and below 4.0 V to TEST (Pin 12), this LSI might become test mode.
When disturbance noise etc. makes this LSI test mode, motor might not operate normally. Therefore, use this
LSI on condition that TEST pin is shorted to GND or S5VOUT at normal motor operation.
25
Ver. BEB
AN44071A
APPLICATIONS INFORMATION ( continued )
1. Notes (continued)
5) Notes on Standby mode release / Under-voltage lockout release
This LSI has all motor outputs OFF period of about 100 µs (typ) owing to release of Standby and UVLO (Refer to
the below figure).
This is why restart from Standby and UVLO after charge pump voltage rises sufficiently because charge pump
operation stops at Standby and UVLO.
When the charge pump voltage does not rise sufficiently during all motor outputs OFF period due to that
capacitance between VPUMP and GND becomes large etc., the LSI might overheat and it might not operate
normally. In this case, release Standby and UVLO at ENABLE = Low-level, and restart at ENABLE = High-level
after the charge pump voltage rises sufficiently.
Moreover, take notice that state of motor current becomes default position at Standby and UVLO operation
following as 1. Notes No.6.
After all motor outputs OFF period, the ground-fault detection period is set to about 6.4 µs in order to detect the
ground-fault of motor output before motor is turned on.
All the upper side power MOS are turned on during the above ground fault detection period, and then whether the
ground-fault occurs or not is checked. (Refer to the following contents.)
If the ground-fault is detected at that time, all motor outputs are turned off, and motor drive stops.
[At Standby release]
STBY
Standby
Motor output
Low
Standby
All motor outputs
OFF
High
Standby release
All motor outputs OFF
Ground fault Start (At ENABLE = High)
All motor outputs OFF
detection
(At ENABLE = Low)
About 100 µs(typ)
About 6.4 µs(typ)
[At under-voltage lockout release]
VM
Motor output
Low
High
All motor outputs
OFF (UVLO)
All motor outputs OFF
Start (At ENABLE = High)
About 100 µs(typ)
26
Ground fault
All motor outputs OFF
detection
(At ENABLE = Low)
About 6.4 µs(typ)
Ver. BEB
AN44071A
APPLICATIONS INFORMATION ( continued )
1. Notes (continued)
6) Default of motor current state
The defaults of motor current state after the releases of UVLO and standby in each excitation mode are as follows.
Table Default position of each excitation mode
Excitation mode
Default electrical
angle*
2-phase excitation (4-step)
–45°
Half step (8-step)
–45°
1-2 phase excitation (8-step)
–45°
W1-2 phase excitation (16-step)
–45°
2W1-2 phase excitation (32-step)
–45°
*Definition of electric angle
Electric angle is defined as 0° on the conditions of
AOUT1/COUT1
current = 100% and BOUT1/DOUT1 current = 0%.
It is defined at DIR = Low as "+" direction.
It is defined at DIR = High as "–" direction.
Electrical angle : 0°
Default electrical angle : –45° AOUT1/COUT1 current
Default position: 2-phase excitation / Half step
DIR = "L"
Default position :
1-2 / W1-2 / 2W1-2 phase excitation
DIR = "H"
BOUT1/DOUT1 current
7) CLK* input signal and DIR* input signal
The set/hold time of CLK* and DIR* input signals, CLK* input minimum pulse width (High/Low) are as follows.
Input signals after securing set/hold time.
CLK*
C
D
A
B
DIR*/ST1*/
ST2*/ST3*
Period
Contents
Time
A
CLK* input minimum pulse width (High)
10 µs or more
B
CLK* input minimum pulse width (Low)
10 µs or more
C
DIR*/ST1*/ST2*/ST3* set time
2 µs or more
D
DIR*/ST1*/ST2*/ST3* hold time
2 µs or more
27
* : AB or CD
Ver. BEB
AN44071A
APPLICATIONS INFORMATION ( continued )
1.Notes (continued)
8) CLK input at ENABLE = Low
As the below figure (Ex. 1-2 phase excitation), when inputting CLKAB at the time of motor stop and ENABLEAB =
Low (all motor outputs OFF → Motor current = 0 A), the setup value of motor current will proceed at CLKAB input.
Therefore, in case of restart at ENABLEAB = High, take notice that the position of restart is where the current state
just before motor stop gains CLKAB input. For IBOUT, ICOUT and IDOUT, the operation is same as the below.
Example) 1-2 phase excitation
CLKAB
1
2 3 4 5
6
3
7 8
4 5 6 7 8
1 2
IAOUT
ENABLEAB
High
Low
High
Motor stop
In spite of stop at state[6] , because CLKAB is input at ENABLEAB = Low,
the motor will restart after ENABLEAB = High at state [3].
CLKAB
1 2
3 4 5
6
6
7 8 1 2
IAOUT
ENABLEAB
Low
High
High
Motor stop
In spite of stop at state [6] , because CLKAB is not input at ENABLEAB = Low,
the motor will restart after ENABLE AB= High at state [6] just before stop.
28
Ver. BEB
AN44071A
APPLICATIONS INFORMATION ( continued )
1. Notes (continued)
9) Notes on RCS line
Take consideration in the below figure and the points and design PCB pattern.
(1) Point 1
Design so that the wiring to the current detection pin (RCSA/RCSB/RCSC/RCSD pin) of this LSI is thick
and short to lower impedance. This is why current can not be detected correctly owing to wiring
impedance and current might not be supplied to a motor sufficiently.
(2) Point 2
Design so that the wiring between current detection resister and connecter GND (the below figure
Point 2) is thick and short to lower impedance. As the same as Point 1, sufficient current might not be
supplied due to wiring impedance. In addition, if there is a common impedance on the side of GND of
RCSA/RCSB/RCSC/RCSD, peak detection might be erroneous detection. Therefore, install the wiring
on the side of GND of RCSA/RCSB/RCSC/RCSD independently.
(3) Point 3
Connect GND pin of this LSI to the connecter on PCB independently. Separate the wiring removed current
detection resister of large current line (Point 2) from GND wiring and make these wirings one-point
shorted at the connecter as the below figure. That can make fluctuation of GND minimum.
Motor current
detection resistor
Point 2
Point 1
(A)
Connecter GND
RCSA/RCSB/RCSC/RCSD
Motor
LSI
GND
Point 3
10) A high current flows into the LSI. Therefore, the common impedance of PCB can not be ignored. Take the following
points into consideration and design the PCB pattern for a motor. Because the wiring connecting to VM1 (Pin 43)
and VM2 (Pin 41)of this LSI is high-current, it is easy to generate noise at time of switching by wiring L. That might
cause malfunction and destruction (Figure 1). As Figure 2, the escape way of the noise is secured by connecting
a capacitor to the connector close to the VM pin of the LSI. This makes it possible to suppress the fluctuation of
direct VM pin voltage of the LSI. Make the setting as shown in Figure 2 as much as possible.
Low spike amplitude
due to capacitance
between VM pin
and GND
VM
VM
L
L
VM
VM
GND
GND
LSI
LSI
C
C
RCS
RCS
GND
GND
Figure 1. No recommended pattern
29
Figure 2. Recommended pattern
Ver. BEB
AN44071A
APPLICATIONS INFORMATION ( continued )
1. Notes (continued)
11) LSI junction temperature
In case of measuring chip temperature of this LSI, measure the voltage of TjmonABCD pin (Pin 10) and estimate
the chip temperature from the data below. However, because this data is technical reference data, conduct a
sufficient reliability test of the LSI and evaluate the product with the LSI incorporated.
TjmonABCD pin temperature characteristics
VBE[V]
ΔVBE / Δtemp = –1.87 [mV / °C]
Temp[°C]
0
150
12) Power-on and Supply voltage change
When supplying to VM pin (Pin 41, 43) or raising supply voltage, set the rise speed of VM voltage to less than 0.1
V/µs . If the rise speed of supply voltage is too rapid, it might cause error of operation and destruction of the LSI.
If the rise speed of VM voltage is more rapid than 0.1V/µs, conduct a sufficient reliability test and also check a
sufficient evaluation for a product.
In addition, rise the VM supply voltage in an ENABLE = Low state when change VM supply voltage from low
voltage to high voltage within the operating supply voltage range.
Since there is not the all motor outputs OFF period shown in 1. Notes No.5 for the supply voltage change within the
operating supply voltage range, the VPUMP voltage is in a low voltage state due to not following
to VM supply voltage change enough, and this LSI might not operate normally.
Therefore, restart this LSI by setting ENABLE to High after the VPUMP voltage rises enough.
In addition, it is recommended to fall VM voltage in motor stop state (ENABLEAB/CD = Low or STBY = Low) for
the stable fall of supply voltage.
Supply voltage
VM
Rise at less than 0.1 V/µs
Time
13) Pins to set mode
・As for the High/Low setting of DECAY1AB, DECAY2AB, DECAY1CD, DECAY2CD, PWMSWAB and PWMSWCD,
it is recommended to short to GND or S5VOUT. If the above pins are high-impedance such as open, note that this
LSI might not operate normally because it easily influences the noise
・PWMSWAB/CD can be set to Middle by setting PWMSWAB/CD to Open. However, it might occur the error of
operation due to the noise. In case, connect the capacity of 0.01 µF or more between PWMSWAB/CD and GND .
30
Ver. BEB
AN44071A
PACKAGE INFORMATION ( Reference Data )
Package Code:HSOP056-P-0300B
unit:mm
゜
Body Material
:
Epoxy Resin
Lead Material
:
Cu Alloy
Lead Finish Method :
31
゜
Pd Plating
Ver. BEB
AN44071A
IMPORTANT NOTICE
1.The products and product specifications described in this book are subject to change without notice for
modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore,
ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your
requirements.
2.When using the LSI for new models, verify the safety including the long-term reliability for each product.
3.When the application system is designed by using this LSI, be sure to confirm notes in this book.
Be sure to read the notes to descriptions and the usage notes in the book.
4.The technical information described in this book is intended only to show the main characteristics and application
circuit examples of the products. No license is granted in and to any intellectual property right or other right
owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company
as to the infringement upon any such right owned by any other company which may arise as a result of the use of
technical information de-scribed in this book.
5.This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of
our company.
6.This LSI is intended to be used for general electronic equipment [Stepping motor drive].
Consult our sales staff in advance for information on the following applications: Special applications in which
exceptional quality and reliability are required, or if the failure or malfunction of this LSI may directly jeopardize
life or harm the human body.
Any applications other than the standard applications intended.
(1) Space appliance (such as artificial satellite, and rocket)
(2) Traffic control equipment (such as for automobile, airplane, train, and ship)
(3) Medical equipment for life support
(4) Submarine transponder
(5) Control equipment for power plant
(6) Disaster prevention and security device
(7) Weapon
(8) Others : Applications of which reliability equivalent to (1) to (7) is required
It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in
connection with your using the LSI described in this book for any special application, unless our company agrees
to your using the LSI in this book for any special application.
7.This LSI is neither designed nor intended for use in automotive applications or environments unless the specific
product is designated by our company as compliant with the ISO/TS 16949 requirements.
Our company shall not be held responsible for any damage incurred by you or any third party as a result of or in
connection with your using the LSI in automotive application, unless our company agrees to your using the LSI in
this book for such application.
8.If any of the products or technical information described in this book is to be exported or provided to non-residents,
the laws and regulations of the exporting country, especially, those with regard to security export control, must be
observed.
9. Please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of
controlled substances, including without limitation, the EU RoHS Directive. Our company shall not be held
responsible for any damage incurred as a result of your using the LSI not complying with the applicable laws and
regulations.
32
Ver. BEB
AN44071A
USAGE NOTES
1. When designing your equipment, comply with the range of absolute maximum rating and the guaranteed
operating conditions (operating power supply voltage and operating environment etc.). Especially, please be
careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off
and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of
break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as
redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical
injury, fire, social damages, for example, by using the products.
2. Comply with the instructions for use in order to prevent breakdown and characteristics change due to external
factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's
process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf
life and the elapsed time since first opening the packages.
3. Pay attention to the direction of LSI. When mounting it in the wrong direction onto the PCB (printed-circuitboard), it might smoke or ignite.
4. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit
between pins. In addition, refer to the Pin Description for the pin configuration.
5. Perform a visual inspection on the PCB before applying power, otherwise damage might happen due to
problems such as a solder-bridge between the pins of the semiconductor device. Also, perform a full technical
verification on the assembly quality, because the same damage possibly can happen due to conductive
substances, such as solder ball, that adhere to the LSI during transportation.
6. Take notice in the use of this product that it might break or occasionally smoke when an abnormal state occurs
such as output pin-VM short (Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin
short (load short) .
Especially, for the pins below, take notice Power supply fault, Ground fault, short to motor current detection pin,
load short and short between the pin.
・Motor drive output pin (Pin 1, 5, 24, 28, 29, 33, 52, 56)
・Motor current detection pin (Pin 3, 26, 31, 54)
・Charge pump circuit pin (Pin 16, 17, 18)
・Power supply (Pin 41, 43)
And, safety measures such as an installation of fuses are recommended because the extent of the abovementioned damage and smoke emission will depend on the current capability of the power supply.
7. The protection circuit is for maintaining safety against abnormal operation. Therefore, the protection circuit
should not work during normal operation.
Especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is
momentarily exceeded due to output pin to VM short (Power supply fault), or output pin to GND short (Ground
fault), the LSI might be damaged before the thermal protection circuit could operate.
8. Unless specified in the product specifications, make sure that negative voltage or excessive voltage are not
applied to the pins because the device might be damaged, which could happen due to negative voltage or
excessive voltage generated during the ON and OFF timing when the inductive load of a motor coil or actuator
coils of optical pick-up is being driven.
9. The product which has specified ASO (Area of Safe Operation) should be operated in ASO.
10. Verify the risks which might be caused by the malfunctions of external components.
33
Ver. BEB
AN44071A
USAGE NOTES ( continued )
11.Connect the metallic plate (fin) on the back side of the LSI with the GND potential. The thermal resistance and the
electrical characteristics are guaranteed only when the metallic plate (fin) is connected with the GND potential.
12.Confirm characteristics fully when using the LSI.
Secure adequate margin after considering variation of external part and this LSI including not only static
characteristics but transient characteristics. Especially, Pay attention that abnormal current or voltage must not be
applied to external parts because the pins (Pin 1, 5, 16, 17, 18, 24, 28, 29, 33, 52, 56) output high current or
voltage.
13. Design the heat radiation with sufficient margin so that Power dissipation must not be exceeded base on the
conditions of power supply voltage, load and ambient temperature.
(It is recommended to design to set connective parts to 70% to 80% of maximum rating)
14. Set capacitance value between VPUMP and GND so that VPUMP (Pin 18) must not exceed 43 V transiently at the
time of motor standby to motor start.
15. This LSI employs a PWM drive method that switches the high-current output of the output transistor. Therefore, the
LSI is apt to generate noise that may cause the LSI to malfunction or have fatal damage. To prevent these
problems, the power supply must be stable enough. Therefore, the capacitance between the S5VOUT and GND
pins must be a minimum of 0.1 μF and the one between the VM and GND pins must be a minimum of 47 μF and
as close as possible to the LSI so that PWM noise will not cause the LSI to malfunction or have fatal damage.
34
Ver. BEB
Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any
other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any
other company which may arise as a result of the use of technical information described in this book.
(3) The products described in this book are intended to be used for general applications (such as office equipment, communications
equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book.
Consult our sales staff in advance for information on the following applications:
– Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment,
life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of
the products may directly jeopardize life or harm the human body.
It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with
your using the products described in this book for any special application, unless our company agrees to your using the products in
this book for any special application.
(4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product
Standards in advance to make sure that the latest specifications satisfy your requirements.
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any
defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.
(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which
damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.
(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company.
20100202
