FJ3P02100L

Doc No. TT4-EA-14292 Revision. 6 Product Standards MOS FET FJ3P02100L FJ3P02100L Unit: mm 　Package dimension Silicon P-channel MOSFET 2.0 For Load-switching 0.2 3 2.0 (0.25)  Features 1  Low drain-source ON resistance:RDS(on)typ. = 12.0m （VGS = -2.5 V)  High heat dissipated and ultra-compact package PMCP  RoHS compliant (EU RoHS / MSL:Level 1 compliant) 0.3 2 0.9 0.3 2 0.33 0.825  Packaging 1. Source 2. Gate Embossed type (Thermo-compression sealing) : 7 000 pcs / reel (standard) Drain-source voltage Gate-source voltage Ta = 25 C, DC *2 Drain current Ta = 25 C, DC *3 Drain current Ta = 25 C *1 *2 (Pulsed) Ta = 25 C *1 *3 Total power Ta = 25 C, DC *2 dissipation Ta = 25 C, DC *3 Channel temperature Operating ambient temperature Storage temperature range VDS VGS ID1 ID2 IDp1 IDp2 PD1 PD2 Tch Topr Tstg Rating Unit -20 ±8 -4.4 -7.5 -13.2 -22.5 300 850 150 -40 to +85 -55 to +150 V V A Panasonic JEITA Code Drain-source breakdown voltage Zero gate voltage drain current Gate-source leakage current Gate-source threshold voltage Drain-source on-state resistance Dynamicic Characteristics Parameter Input capacitance *1 Output capacitance *1 Reverse transfer capacitance  Equivalent circuit, Pin name 3 2 Rg 1. Source 2. Gate °C 3. Drain *1 1 Conditions VDSS IDSS IGSS Vth ID = -1.0 mA, VGS = 0 V VDS = -20 V, VGS = 0 V VGS = ±8 V, VDS = 0 V ID = -1.0 mA, VDS = -10 V RDS(on)1 ID = -3.7 A, VGS = -4.5 V RDS(on)2 ID = -3.7 A, VGS = -2.5 V RDS(on)3 ID = -3.7 A, VGS = -2.0 V Symbol Ciss Coss Crss (0.675) PMCP-2020-Z1 — — Note： *1 t = 10 μs, Duty Cycle < 1% *2 When mounted on glass epoxy board typeA (Refer to Figure1) *3 When mounted on glass epoxy board typeB (Refer to Figure2)  Electrical Characteristics　Ta = 25 °C ±3 °C Static Characteristics Parameter Symbol 1 3. Drain A mW 3 (0.8)  Marking Symbol: A0  Absolute Maximum Ratings Ta = 25 C Parameter Symbol 0.65 Conditions VDS = -10 V, VGS = 0 V, f = 1 MHz Min Typ Max -20 -0.3 Min -10 ±10 -0.65 -1.05 9.5 12.5 12.0 16.5 16.0 30.0 Typ 3000 330 350 Max Unit V μA μA V m Unit pF Page 1 of 6 Established : 2012-10-25 Revised : 2013-07-16 Doc No. TT4-EA-14292 Revision. 6 Product Standards MOS FET FJ3P02100L Parameter Symbol Turn-on delay time *1 *2 Rise time *1 *2 Turn-off delay time *1 *2 Fall time *1 *2 td(on) tr td(off) tf Conditions VDD = -10 V, VGS = 0 to -4 V,ID = -3.7 A VDD = -10 V, VGS = -4 to 0 V,ID = -3.7 A Min Typ 1 1.9 6.5 3.9 Max Unit μs μs Note： 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. 2. *1 Assured by design *2 Refer to figure3, measurement circuit for Turn-on delay time / Rise time / Turn-off delay time / Fall time Figure1: Glass epoxy board typeA Material:FR4, Size:25.4mm x 25.4mm x t 1.0mm, Cu pad:tickness 36m, 25.9mm 2 Cu pad 25.4mm 25.4mm Figure2: Glass epoxy board typeB Material:FR4, Size:25.4mm x 25.4mm x t 1.0mm, Cu pad:tickness 36m, 82.0mm 2 Cuパッド 25.4mm 25.4mm Page 2 of 6 Established : 2012-10-25 Revised : 2013-07-16 Doc No. TT4-EA-14292 Revision. 6 Product Standards MOS FET FJ3P02100L Figure3: Measurement circuit for Turn-on delay time / Rise time / Turn-off delay time / Fall time VDD = -10 V Vin ID = -3.7 A RL = 2.7 0V PW = 10 μs D.C. ≦ 1 % -4 V Vout D G Rg Vin   S 10 % Vin 90 % 90 % Vout 10 % td(on) tr td(off) tf Page 3 of 6 Established : 2012-10-25 Revised : 2013-07-16 Doc No. TT4-EA-14292 Revision. 6 Product Standards MOS FET FJ3P02100L Technical Data ( reference ) ID - VDS RDS(on) - ID -10 35 -4.5V Drain-source On-state Resistance RDS (on) (mΩ) -8 Drain Current ID (A) Ta = 25℃ Ta = 25℃ -3.1V -2.5V -6 -2.0V VGS = -1.8V -4 -2 -0 30 25 VGS = -1.8V 20 -2.0V -2.5V 15 -4.5V 10 5 0 -0 -0.1 -0.2 -0.3 Drain-source VDSVDS (V) Drain-source voltage -0.4 -0.5 -0 -2 -4 (V) ID - VGS -10 Drain-source On-state Resistance RDS (on) (mΩ) 50 -1 Drain Current ID (A) -8 RDS(on) - VGS -10 -0.1 85℃ -0.01 25℃ Ta = -40℃ ID = -3.7A 40 30 20 85℃ 10 25℃ Ta = -40℃ 0 -0.001 -0 -0.5 -1 -0 -1.5 -1 -2 -3 -4 -5 -6 Gate-source VGSVGS (V) (V) Gate-source voltage Gate Source VGS VGS (V) (V) Gate-source voltage IF - VF IGS - VGS 10 1E-01 Gate Leakage Current IGS (A) Diode Foward Current IF (A) -6 Drain current Drain Current IDID (A) (A) 1 85℃ 0.1 25℃ Ta = -40℃ 0.01 0 0.5 VF (V)VF (V) Source-drainSource-Drain forward voltage 1 1E-02 1E-03 85℃ 1E-04 25℃ 1E-05 1E-06 Ta = -40℃ 1E-07 1E-08 1E-09 1E-10 -0 -3 -6 -9 -12 -15 Gate-source voltage Gate-Source VGS VGS (V) (V) Page 4 of 6 Established : 2012-10-25 Revised : 2013-07-16 Doc No. TT4-EA-14292 Revision. 6 Product Standards MOS FET FJ3P02100L Technical Data ( reference ) Rth - tsw Thermal Resistance Rth (°C/W) 1000 100 10 Ta=25℃, Mounted on FR4 board (25.4×25.4×t1.0mm). Surface Mounted on FR4 Board using the minimum recommended pad size(Cu area=82.0mm2 including traces). 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse width Widthtsw tsw(s) (s) Pulse Rth - tsw Thermal Resistance Rth (°C/W) 1000 100 10 1 0.1 0.0001 Ta=25℃, Mounted on FR4 board (25.4×25.4×t1.0mm). Surface Mounted on FR4 Board using the minimum recommended pad size(Cu area=25.9mm2 including traces). 0.001 0.01 0.1 1 10 100 1000 Pulse width Widthtsw tsw(s) (s) Pulse Page 5 of 6 Established : 2012-10-25 Revised : 2013-07-16 Doc No. TT4-EA-14292 Revision. 6 Product Standards MOS FET FJ3P02100L PMCP-2020-Z1 2.00±0.05 0.20±0.05 2.00±0.05 3 (0.25) Unit: mm 1 2 0.30±0.03 0.65±0.03 0.33±0.05 2 0.90±0.03 (0.8) 0.30±0.03 3 1 0.825 (0.675)  Land Pattern (Reference) (Unit: mm) 0.9 0.3 1.075 0.25 2.0 0.5 0.825 0.65 0.3 Page 6 of 6 Established : 2012-10-25 Revised : 2013-07-16 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. 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