N08T1630C1BT2-55

NanoAmp Solutions, Inc. 670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035 ph: 408-935-7777, FAX: 408-935-7770 www.nanoamp.com N08T1630CxB 8Mb Ultra-Low Power Asynchronous CMOS SRAM 512Kx16 bit Overview The N08T1630CxB is an integrated memory device containing a low power 8 Mbit SRAM built using a self-refresh DRAM array organized as 512,288 words by 16 bits. It is designed to be identical in operation and interface to standard 6T SRAMS. The device is designed for low standby and operating current and includes a power-down feature to automatically enter standby mode. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently and can also be used to deselect the device. The N08T1630CxB is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard BGA and TSOP2 packages compatible with other standard 512Kb x 16 SRAMs. Features • Single Wide Power Supply Range 2.7 to 3.6 Volts • Very low standby current 70µA at 3.0V (Max) • Very low operating current 2.0mA at 3.0V and 1µs (Typical) • Simple memory control Dual Chip Enables (CE1 and CE2) Byte control for independent byte operation Output Enable (OE) for memory expansion • Very fast access time 55ns address access option 30ns OE access time • Automatic power down to standby mode • TTL compatible three-state output driver • Green package option for TSOP and BGA Product Family Part Number N08T1630C2BZ N08T1630C2BZ2 N08T1630C1BT N08T1630C1BT2 Package Type 48 - BGA Green 48 - BGA 44- TSOP2 Green 44- TSOP2 Operating Temperature Power Supply (Vcc) Speed Standby Operating Current (ISB), Current (Icc), Max Max @ 3.0V -40oC to +85oC 2.7V - 3.6V 55/70ns @ 2.7V 70 µA 3 mA @ 1MHz Pin Configuration (Top View) 1 A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A18 A17 A16 A15 A14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 A8 A9 A10 A11 A12 A13 Pin Descriptions 4 A1 A4 A6 A7 A16 A15 A13 A10 2 OE UB I/O10 I/O11 I/O12 3 A0 A3 A5 A17 VSS A14 A12 A9 5 A2 CE1 I/O1 I/O3 I/O4 I/O5 WE A11 6 CE2 I/O0 I/O2 VCC VSS I/O6 I/O7 NC Pin Name A0-A18 WE CE1 CE2 OE LB UB I/O0-I/O15 VCC VSS NC Pin Function Address Inputs Write Enable Input Chip Enable 1 Input Chip Enable 2 Input (BGA only) Output Enable Input Lower Byte Enable Input Upper Byte Enable Input Data Inputs/Outputs Power Ground Not Connected A B C D E F G H LB I/O8 I/O9 VSS VCC 44 Pin TSOP2 I/O14 I/O13 I/O15 A18 NC A8 48 Ball BGA 6 x 8 mm (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 1 NanoAmp Solutions, Inc. Functional Block Diagram N08T1630CxB Address Inputs A0 - A18 Address Decode Logic 512K x 16 bit RAM Array Input/ Output Mux and Buffers I/O0 - I/O7 I/O8 - I/O15 CE1 CE2 WE OE UB LB Control Logic Functional Description CE1 H X L L L L CE21 X L H H H H WE X X X L H H OE X X X X4 L H UB X X H L2 L2 L2 LB X X H L2 L2 L2 I/O0 - I/O152 High Z High Z High Z Data In Data Out High Z MODE Standby3 Standby3 Standby3 Write Read Active POWER Standby Standby Standby Active Active Active 1. CE2 only applies to BGA package. 2. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7 are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. 3. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. 4. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. Capacitance1 Item Input Capacitance I/O Capacitance Symbol CIN CI/O Test Condition VIN = 0V, f = 1 MHz, TA = 25oC VIN = 0V, f = 1 MHz, TA = 25oC Min Max 8 8 Unit pF pF 1. These parameters are verified in device characterization and are not 100% tested (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 2 NanoAmp Solutions, Inc. N08T1630CxB Symbol VIN,OUT VCC PD TSTG TA TSOLDER Rating –0.3 to VCC+0.3 –0.3 to 4.5 500 –40 to 125 -40 to +85 260oC, 10sec Unit V V mW o o o Absolute Maximum Ratings1 Item Voltage on any pin relative to VSS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time C C C 1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Characteristics (Over Specified Temperature Range) Item Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Output Leakage Current Read/Write Operating Supply Current @ 1 µs Cycle Time2 Read/Write Operating Supply Current @ 70 ns Cycle Time2 Maximum Standby Current Symbol VCC VIH VIL VOH VOL ILI ILO ICC1 ICC2 IOH = 0.2mA IOL = -0.2mA VIN = 0 to VCC OE = VIH or Chip Disabled VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 3.0 V VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 3.6 V 3.0 12.0 Test Conditions Min. 2.7 2.2 –0.3 VCC–0.4 0.4 0.5 0.5 5.0 25.0 Typ1 3.0 Max 3.6 VCC+0.3 0.6 Unit V V V V V µA µA mA mA ISB1 70.0 µA Maximum Standby Current ISB2 80.0 µA 1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested. 2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 3 NanoAmp Solutions, Inc. N08T1630CxB Timing Item Read Cycle Time Address Access Time Chip Enable to Valid Output Output Enable to Valid Output Byte Select to Valid Output Chip Enable to Low-Z output Output Enable to Low-Z Output Byte Select to Low-Z Output Chip Disable to High-Z Output Output Disable to High-Z Output Byte Select Disable to High-Z Output Output Hold from Address Change Write Cycle Time Chip Enable to End of Write Address Valid to End of Write Byte Select to End of Write Write Pulse Width Address Setup Time Write Recovery Time Write to High-Z Output Data to Write Time Overlap Data Hold from Write Time End Write to Low-Z Output Symbol tRC tAA tCO tOE tLB, tUB tLZ tOLZ tBLZ tHZ tOHZ tBHZ tOH tWC tCW tAW tBW tWP tAS tWR tWHZ tDW tDH tOW 40 0 5 5 5 5 0 0 0 10 55 45 45 45 45 0 0 25 40 0 5 20 20 20 -55 Min. 55 55 55 30 55 5 5 5 0 0 0 10 70 55 55 55 55 0 0 25 25 25 25 Max. Min. 70 70 70 35 70 -70 Max. Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 4 NanoAmp Solutions, Inc. Timing of Read Cycle (CE1 = OE = VIL, WE = CE2 = VIH) tRC Address tAA tOH N08T1630CxB Data Out Previous Data Valid Data Valid Timing Waveform of Read Cycle (WE=VIH) tRC Address tAA tHZ CE1 tCO CE2 tLZ tOE OE tOLZ tLB, tUB LB, UB tLBLZ, tUBLZ Data Out High-Z tBHZ Data Valid tOHZ (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 5 NanoAmp Solutions, Inc. Timing Waveform of Write Cycle (WE control) tWC Address tAW CE1 tCW CE2 tBW LB, UB tAS WE tDW High-Z Data In tWHZ Data Out tWP N08T1630CxB tWR tDH Data Valid tOW High-Z Timing Waveform of Write Cycle (CE1 Control) tWC Address tAW CE1 (for CE2 Control, use inverted signal) LB, UB tWP WE tDW Data In tLZ Data Out tWHZ tDH tCW tAS tBW tWR Data Valid High-Z (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 6 NanoAmp Solutions, Inc. 44-Lead TSOP II Package (T44) N08T1630CxB 18.41±0.10 10.16±0.10 11.76±0.20 0.80mm REF 0.396 0.338 SEE DETAIL B DETAIL B 1.20 Max 0o-8o 0.15 0.05 0.80mm REF Note: 1. All dimensions in inches (Millimeters) 2. Package dimensions exclude molding flash (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 7 NanoAmp Solutions, Inc. Ball Grid Array Package A1 BALL PAD CORNER (3) D 0.23±0.05 0.90±0.10 N08T1630CxB 1. 0.30±0.05 DIA. E 2. SEATING PLANE - Z 0.15 Z 0.08 TOP VIEW SIDE VIEW 1. DIMENSION IS MEASURED AT THE A1 BALL PAD MAXIMUM SOLDER BALL DIAMETER. CORNER PARALLEL TO PRIMARY Z. 2. PRIMARY DATUM Z AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3. A1 BALL PAD CORNER I.D. TO BE MARKED BY INK. K TYP J TYP e Z SD e SE BOTTOM VIEW Dimensions (mm) e = 0.75 D 6±0.10 E SD 8±0.10 0.375 SE 0.375 J 1.125 K 1.375 BALL MATRIX TYPE FULL (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 8 NanoAmp Solutions, Inc. Ordering Information N08T1630CxB N08T1630CXB X(x) -XXI 55 = 55ns 70 = 70ns Performance Package Z = 48-BGA Z2 = Green 48-BGA (RoHS Compliant) T = 44-TSOP2 T2 = Green 44-TSOP2 (RoHS Compliant) # CE 1 = 1 CE (TSOP) 2 = 2 CE (BGA) Revision History Revision A B C D E F G H Date August 2002 Sept 2002 November 2002 February 2003 April 2003 September 2003 November 2003 January 2005 Change Description Initial Preliminary Release Added TSOP option to ordering information Added 55ns sort Updated BGA package thickness from 1.2mm to 1.0mm Updated for dual CE in BGA only Change ISB @ 3.0v to 60 uA Change tHZ to 20ns for 55ns part Change tDW to 40ns for both 55ns and 70ns part Change ISB @ 3.0v to 70 uA Added Green package offering © 2005 Nanoamp Solutions, Inc. All rights reserved. NanoAmp Solutions, Inc. ("NanoAmp") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice. NanoAmp does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration purposes only and they vary depending upon specific applications. NanoAmp makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does NanoAmp assume any liability arising out of the application or use of any product or circuit described herein. NanoAmp does not authorize use of its products as critical components in any application in which the failure of the NanoAmp product may be expected to result in significant injury or death, including life support systems and critical medical instruments. (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 9