0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
80N055

80N055

  • 厂商:

    NEC(日电电子)

  • 封装:

  • 描述:

    80N055 - SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE - NEC

  • 数据手册
  • 价格&库存
80N055 数据手册
DATA SHEET MOS FIELD EFFECT TRANSISTOR NP80N055CLE, NP80N055DLE, NP80N055ELE SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION These products are N-channel MOS Field Effect Transistor designed for high current switching applications. ORDERING INFORMATION PART NUMBER NP80N055CLE NP80N055DLE PACKAGE TO-220AB TO-262 TO-263 FEATURES • Channel temperature 175 degree rated • Super low on-state resistance RDS(on)1 = 11 m Ω MAX. (VGS = 10 V, I D = 40 A) RDS(on)2 = 13 m Ω MAX. (VGS = 5 V, I D = 40 A) • Low Ciss : Ciss = 2900 pF TYP. • Built-in gate protection diode NP80N055ELE (TO-220AB) ABSOLUTE MAXIMUM RATINGS (T A = 25°C) Drain to Source Voltage Gate to Source Voltage Drain Current (DC) Note1 Note2 VDSS VGSS ID(DC) ID(pulse) PT PT IAS EAS Tch Tstg 55 ±20 ±80 ±200 1.8 120 45 / 30 / 10 2.0 / 90 / 100 175 –55 to +175 V V A A W W A mJ °C °C (TO-263) (TO-262) Drain Current (Pulse) Total Power Dissipation (TA = 25 °C) Total Power Dissipation (TC = 25 °C) Single Avalanche Current Channel Temperature Storage Temperature Note3 Single Avalanche Energy Note3 Notes 1. Calculated constant current according to MAX. allowable channel temperature. 2. PW ≤ 10 µs, Duty cycle ≤ 1 % 3. Starting Tch = 25 °C, RG = 25 Ω , VGS = 20 V →0 V (see Figure 4.) THERMAL RESISTANCE Channel to Case Channel to Ambient Rth(ch-C) Rth(ch-A) 1.25 83.3 °C/W °C/W The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. D14097EJ3V0DS00 (3rd edition) Date Published March 2001 NS CP(K) Printed in Japan The mark 5 shows major revised points. © 1999,2000 NP80N055CLE, NP80N055DLE, NP80N055ELE ELECTRICAL CHARACTERISTICS (T A = 25 °C) CHARACTERISTICS Drain to Source On-state Resistance SYMBOL RDS(on)1 RDS(on)2 RDS(on)3 Gate to Source Threshold Voltage Forward Transfer Admittance Drain Leakage Current Gate to Source Leakage Current Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge 1 Total Gate Charge 2 Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS(th) | yfs | IDSS IGSS Ciss Coss Crss td(on) tr td(off) tf QG1 QG2 QGS QGD VF(S-D) trr Qrr IF = 80 A, VGS = 0 V IF = 80 A, VGS = 0 V, di/dt = 100 A/µ s ID = 80 A, VDD = 44 V, VGS = 10 V ID = 80 A, VDD = 44 V, VGS = 5 V ID = 40 A, VGS(on) = 10 V, VDD = 28 V, RG = 1 Ω TEST CONDITIONS VGS = 10 V, ID = 40 A VGS = 5 V, ID = 40 A VGS = 4.5 V, ID = 40 A VDS = VGS, ID = 250 µ A VDS = 10 V, ID = 40 A VDS = 55 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = 25 V, VGS = 0 V, f = 1 MHz 2900 380 170 22 10 62 11 50 26 12 15 1.0 50 100 1.5 20 MIN. TYP. 8.4 10.3 11.3 2.0 40 10 ±10 4400 570 310 48 25 120 27 75 39 MAX. 11 13 15 2.5 UNIT mΩ mΩ mΩ V S µA µA pF pF pF ns ns ns ns nC nC nC nC V ns nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω TEST CIRCUIT 2 SWITCHING TIME D.U.T. L VDD PG. RG VGS RL VDD VDS 90% 90% 10% 10% VGS Wave Form 0 10% VGS(on) 90% BVDSS IAS ID VDD VDS VGS 0 τ τ = 1 µs Duty Cycle ≤ 1% VDS VDS Wave Form 0 td(on) ton tr td(off) toff tf Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD 2 Data Sheet D14097EJ3V0DS NP80N055CLE, NP80N055DLE, NP80N055ELE TYPICAL CHARACTERISTICS (T A = 25°C) Figure1. DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 140 dT - Percentage of Rated Power - % PT - Total Power Dissipation - W Figure2. TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 100 80 60 40 20 0 120 100 80 60 40 20 0 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 TC - Case Temperature - ˚C TC - Case Temperature - ˚C Figure4. SINGLE AVALANCHE ENERGY DERATING FACTOR 120 EAS- Single Avalanche Energy - mJ 5 Figure3. FORWARD BIAS SAFE OPERATING AREA 1000 ID(pulse) PW =1 0µ s 100 80 60 40 20 100 mJ 90 mJ IAS = 10 A 30 A 45 A ID - Drain Current - A 100 R tV (a )L (on = DS GS d ite im 0 V) 1 ID(DC) Po DC Lim wer ite Dis sip d ati on 10 1m s 0µ s 10 1 TC = 25˚C Single Pulse 0.1 0.1 VDS 1 10 - Drain to Source Voltage - V 100 2 mJ 0 25 50 75 100 125 150 175 Starting Tch - Starting Channel Temperature - ˚C Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - ˚C/W 100 Rth(ch-A) = 83.3˚C/W 10 1 Rth(ch-C) = 1.25˚C/W 0.1 Single Pulse 0.01 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet D14097EJ3V0DS 3 NP80N055CLE, NP80N055DLE, NP80N055ELE Figure6. FORWARD TRANSFER CHARACTERISTICS 100 Pulsed 5 Figure7. DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 200 Pulsed 160 120 4.5 V 80 40 0 VGS =10 V 5V ID - Drain Current - A 10 TA = −50˚C 25˚C 75˚C 150˚C 175˚C 1 0.1 0.01 ID - Drain Current - A 1 2 3 4 5 6 0 1 2 3 4 5 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ | yfs | - Forward Transfer Admittance - S Figure8. FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 VDS =10V Pulsed 10 TA = 175˚C 75˚C 25˚C −50˚C Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 50 Pulsed 40 30 20 10 ID = 40 A 1 0.1 0.01 0.01 0.1 1 10 100 0 0 2 4 6 8 10 12 14 16 18 ID - Drain Current - A Figure10. DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 30 Pulsed VGS - Gate to Source Voltage - V Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE 3.0 VDS = VGS ID = 250 µ A 2.5 2.0 1.5 1.0 0.5 0 −50 RDS(on) - Drain to Source On-state Resistance - mΩ 20 VGS = 4.5 V 5V 10 V 10 0 1 10 100 1000 VGS(th) - Gate to Source Threshold Voltage - V 0 50 100 150 ID - Drain Current - A Tch - Channel Temperature - ˚C 4 Data Sheet D14097EJ3V0DS NP80N055CLE, NP80N055DLE, NP80N055ELE RDS(on) - Drain to Source On-state Resistance - mΩ Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 24 Pulsed 20 16 12 8 4 0 −50 0 50 100 ID = 40 A 150 VGS = 4.5 V 5V 10 V Figure13. SOURCE TO DRAIN DIODE FORWARD VOLTAGE 1000 Pulsed ISD - Diode Forward Current - A 100 VGS = 10 V VGS = 0 V 10 1 0.1 0 0.5 1.0 1.5 Tch - Channel Temperature - ˚C VSD - Source to Drain Voltage - V Figure14. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Figure15. SWITCHING CHARACTERISTICS 1000 td(on), tr, td(off), tf - Switching Time - ns 10000 Ciss, Coss, Crss - Capacitance - pF VGS = 0 V f = 1 MHz Ciss tf 100 td(off) td(on) 10 tr 1000 Coss Crss 100 10 0.1 1 10 100 1 0.1 1 10 100 VDS - Drain to Source Voltage - V ID - Drain Current - A Figure16. REVERSE RECOVERY TIME vs. DRAIN CURRENT 1000 trr - Reverse Recovery Time - ns di/dt = 100 A/µs VGS = 0 V Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS 80 VDS - Drain to Source Voltage - V 16 14 12 VGS VDD = 44 V 28 V 11 V 10 8 6 4 VDS ID = 80 A 2 30 40 50 60 70 80 0 VGS - Gate to Source Voltage - V 70 60 50 40 30 20 10 0 0 10 100 10 1 0.1 1 10 100 20 IF - Drain Current - A QG - Gate Charge - nC Data Sheet D14097EJ3V0DS 5 NP80N055CLE, NP80N055DLE, NP80N055ELE PACKAGE DRAWINGS (Unit: mm) 1) TO-220AB (MP-25) 2) TO-262 (MP-25 Fin Cut) 3.0±0.3 10.6 MAX. 10.0 4.8 MAX. 1.0±0.5 φ 3.6±0.2 5.9 MIN. 1.3±0.2 (10) 4.8 MAX. 1.3±0.2 15.5 MAX. 4 4 123 1 2 3 6.0 MAX. 12.7 MIN. 1.3±0.2 1.3±0.2 12.7 MIN. 8.5±0.2 0.75±0.1 2.54 TYP. 0.5±0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.8±0.2 0.75±0.3 2.54 TYP. 0.5±0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.8±0.2 3) TO-263 (MP-25ZJ) (10.0) 4 4.8 MAX. 1.3±0.2 EQUIVALENT CIRCUIT Drain 1.0±0.5 8.5±0.2 Gate Body Diode 5.7±0.4 1.4±0.2 0.7±0.2 2.54 TYP. 1 2 (0 .5R ) .8R ) 0.5±0.2 Gate Protection Diode Source 3 2.54 TYP. (0 Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. 6 2.8±0.2 1.Gate 2.Drain 3.Source 4.Fin (Drain) Data Sheet D14097EJ3V0DS NP80N055CLE, NP80N055DLE, NP80N055ELE [MEMO] Data Sheet D14097EJ3V0DS 7 NP80N055CLE, NP80N055DLE, NP80N055ELE • The information in this document is current as of March, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. • NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. • While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. • NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4
80N055 价格&库存

很抱歉,暂时无法提供与“80N055”相匹配的价格&库存,您可以联系我们找货

免费人工找货