NP48N055NHE-S18-AY

DATA SHEET MOS FIELD EFFECT TRANSISTOR NP48N055EHE, NP48N055KHE NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION These products are N-channel MOS Field Effect Transistors designed for high current switching applications. ORDERING INFORMATION PART NUMBER NP48N055EHE-E1-AY NP48N055EHE-E2-AY NP48N055KHE-E1-AY NP48N055KHE-E2-AY Note1, 2 Note1, 2 Note1 Note1 Note1, 2 Note1, 2 Note1 Note1 LEAD PLATING PACKING PACKAGE TO-263 (MP-25ZJ) typ. 1.4 g Pure Sn (Tin) Tape 800 p/reel TO-263 (MP-25ZK) typ. 1.5 g NP48N055CHE-S12-AZ NP48N055DHE-S12-AY NP48N055MHE-S18-AY NP48N055NHE-S18-AY Sn-Ag-Cu Tube 50 p/tube TO-220 (MP-25) typ. 1.9 g TO-262 (MP-25 Fin Cut) typ. 1.8 g TO-220 (MP-25K) typ. 1.9 g TO-262 (MP-25SK) typ. 1.8 g Pure Sn (Tin) Notes 1. Pb-free (This product does not contain Pb in the external electrode.) 2. Not for new design (TO-220) FEATURES • Channel temperature 175 degree rated • Super low on-state resistance RDS(on) = 17 mΩ MAX. (VGS = 10 V, ID = 24 A) • Low input capacitance Ciss = 1600 pF TYP. • Built-in gate protection diode (TO-262) (TO-263) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. D14094EJ6V0DS00 (6th edition) Date Published October 2007 NS Printed in Japan 1999, 2000, 2007 The mark shows major revised points. The revised points can be easily searched by copying an "" in the PDF file and specifying it in the "Find what:" field. NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) Drain Current (pulse) Note1 VDSS VGSS ID(DC) ID(pulse) PT PT Tch Tstg 55 ±20 ±48 ±140 1.8 85 175 −55 to +175 48/28/10 2.3/78/100 V V A A W W °C °C A mJ Total Power Dissipation (TA = 25°C) Total Power Dissipation (TC = 25°C) Channel Temperature Storage Temperature Single Avalanche Current Single Avalanche Energy Note2 Note2 IAS EAS Notes 1. PW ≤ 10 μs, Duty cycle ≤ 1% 2. Starting Tch = 25°C, RG = 25 Ω, VGS = 20 → 0 V (see Figure 4.) THERMAL RESISTANCE Channel to Case Thermal Resistance Channel to Ambient Thermal Resistance Rth(ch-C) Rth(ch-A) 1.76 83.3 °C/W °C/W 2 Data Sheet D14094EJ6V0DS NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate to Source Threshold Voltage Forward Transfer Admittance Drain to Source On-state Resistance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge SYMBOL IDSS IGSS VGS(th) | yfs | RDS(on) Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr VDD = 44 V, VGS = 10 V, ID = 4 8 A IF = 48 A, VGS = 0 V IF = 48 A, VGS = 0 V, di/dt = 100 A/μs TEST CONDITIONS VDS = 55 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = VGS, ID = 250 μA VDS = 10 V, ID = 24 A VGS = 10 V, ID = 24 A VDS = 25 V, VGS = 0 V, f = 1 MHz VDD = 28 V, ID = 24 A, VGS = 10 V, RG = 1 Ω 2.0 7 3.0 17 14 1600 250 120 22 16 35 12 33 9 12 1.0 40 55 17 2400 380 220 48 40 70 30 50 MIN. TYP. MAX. 10 ±10 4.0 UNIT μA μA V S mΩ pF pF pF ns ns ns ns nC nC nC V ns nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω TEST CIRCUIT 2 SWITCHING TIME D.U.T. L VDD PG. RG VGS RL VDD VDS 90% 90% 10% 10% VGS Wave Form 0 10% VGS 90% BVDSS IAS ID VDD VDS VGS 0 τ τ = 1 μs Duty Cycle ≤ 1% VDS VDS Wave Form 0 td(on) ton tr td(off) toff tf Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD Data Sheet D14094EJ6V0DS 3 NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE TYPICAL CHARACTERISTICS (TA = 25°C) Figure1. DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 140 dT - Percentage of Rated Power - % Figure2. TOTAL POWER DISSIPATION vs. CASE TEMPERATURE PT - Total Power Dissipation - W 100 80 60 40 20 0 120 100 80 60 40 20 0 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 TC - Case Temperature - °C Figure3. FORWARD BIAS SAFE OPERATING AREA 1000 120 TC - Case Temperature - °C Figure4. SINGLE AVALANCHE ENERGY DERATING FACTOR EAS - Single Avalanche Energy - mJ ID(pulse) ID - Drain Current - A 100 RV ( ( DS ) on GS d ite Lim0 V) 1 = PW 100 80 60 40 20 100 mJ 78 mJ IAS = 10 A 28 A 48 A ID(DC) 10 DC =1 10 Po Lim wer ite Dis d sip 1m 0μ 0μ s s s ati on 1 Single pulse TC = 25°C 1 10 100 VDS - Drain to Source Voltage - V 2.3 mJ 0 25 50 75 100 125 150 175 0.1 0.1 Starting Tch - Starting Channel Temperature - °C Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W 100 Rth(ch-A) = 83.3°C/W 10 Rth(ch-C) = 1.76°C/W 1 0.1 Single pulse 0.01 10 μ 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s 4 Data Sheet D14094EJ6V0DS NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE Figure6. FORWARD TRANSFER CHARACTERISTICS 1000 Pulsed 140 120 Figure7. DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE Pulsed ID - Drain Current - A 100 ID - Drain Current - A 100 80 60 40 20 0 0 1.0 2.0 VGS = 10 V 10 TA = −40°C 25°C 75°C 150°C 175°C 2 3 4 5 6 7 1 0.1 3.0 4.0 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ | yfs | - Forward Transfer Admittance - S Figure8. FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 VDS = 10 V Pulsed 10 TA = 175°C 75°C 25°C −40°C Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 40 Pulsed 35 30 25 20 15 10 5 0 0 5 10 15 20 ID = 24 A 1 0.1 0.01 0.01 0.1 1 10 100 ID - Drain Current - A VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ VGS(th) - Gate to Source Threshold Voltage - V Figure10. DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 40 Pulsed Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE 4.0 VDS = VGS ID = 250 μA 30 VGS = 10 V 20 3.0 2.0 10 1.0 0 0 1 10 100 1000 −50 0 50 100 150 ID - Drain Current - A Tch - Channel Temperature - °C Data Sheet D14094EJ6V0DS 5 NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE RDS(on) - Drain to Source On-state Resistance - mΩ IF - Diode Forward Current - A Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 45 Pulsed 40 35 30 25 20 15 10 5 ID = 24 A 0 −50 0 50 100 150 Tch - Channel Temperature - °C VGS = 10 V Figure13. SOURCE TO DRAIN DIODE FORWARD VOLTAGE 1000 Pulsed 100 VGS = 10 V 10 0V 1 0.1 0 0.5 1.0 1.5 VF(S-D) - Source to Drain Voltage - V Figure14. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 Figure15. SWITCHING CHARACTERISTICS 1000 Ciss, Coss, Crss - Capacitance - pF Ciss 1000 td(on), tr, td(off), tf - Switching Time - ns VGS = 0 V f = 1 MHz tf 100 td(off) td(on) 10 tr Coss 100 Crss 10 0.1 1 10 100 VDD = 28 V VGS = 10 V 1 RG = 1 Ω 0.1 1 10 100 VDS - Drain to Source Voltage - V ID - Drain Current - A Figure16. REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 1000 di/dt = 100 A/μs VGS = 0 V Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS 80 16 14 12 VDD = 44 V 28 V 11 V 10 VGS 8 6 4 VDS ID = 48 A 0 0 10 20 30 40 0 2 trr - Reverse Recovery Time - ns VDS - Drain to Source Voltage - V 70 60 50 40 30 20 10 100 10 1 0.1 1 10 100 IF - Diode Forward Current - A QG - Gate Charge - nC 6 Data Sheet D14094EJ6V0DS VGS - Gate to Source Voltage - V NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE PACKAGE DRAWINGS (Unit: mm) 1)TO-263 (MP-25ZJ) Note 2)TO-263 (MP-25ZK) 4.8 MAX. 1.3 ± 0.2 No plating 10 TYP. 4 10.0 ± 0.3 7.88 MIN. 4 1.35 ± 0.3 4.45 ± 0.2 1.3 ± 0.2 1.0 ± 0.5 8.5 ± 0.2 8.0 TYP. 9.15 ± 0.3 15.25 ± 0.5 0.025 to 0.25 1 2 3 5.7 ± 0.4 1.4 ± 0.2 0.7 ± 0.2 2.54 TYP. R 0.5 TY P. TY P. 2.54 TYP. 0 .8R 0.5 ± 0.2 2.54 0.75 ± 0.2 0.5 ± 0.2 8ο 0 to 2.8 ± 0.2 1.Gate 2.Drain 3.Source 4.Fin (Drain) 0.25 1 2 3 1.Gate 2.Drain 3.Source 2.5 4.Fin (Drain) 3)TO-220 (MP-25) 3.0 ± 0.3 Note 4)TO-262 (MP-25 Fin Cut) 4.8 MAX. Note 10.6 MAX. 10.0 TYP. 1.0 ± 0.5 φ 3.6 ± 0.2 5.9 MIN. 1.3 ± 0.2 4.8 MAX. 1.3 ± 0.2 10 TYP. 15.5 MAX. 4 1 1.3 ± 0.2 2 3 4 123 6.0 MAX. 1.3 ± 0.2 12.7 MIN. 12.7 MIN. 8.5 ± 0.2 0.75 ± 0.1 2.54 TYP. 0.5 ± 0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.8 ± 0.2 0.75 ± 0.3 2.54 TYP. 0.5 ± 0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.8 ± 0.2 Note Not for new design 2.54 ± 0.25 Data Sheet D14094EJ6V0DS 7 NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE 5)TO-220 (MP-25K) 6)TO-262 (MP-25SK) 2.8 ± 0.3 1.2 ± 0.3 10.0 ± 0.2 φ 3.8 ± 0.2 4.45 ± 0.2 1.3 ± 0.2 10.0 ± 0.2 4.45 ± 0.2 1.3 ± 0.2 10.1 ± 0.3 15.9 MAX. 6.3 ± 0.3 4 4 3.1 ± 0.2 12 13.7 ± 0.3 3 13.7 ± 0.3 1.27 ± 0.2 0.8 ± 0.1 1.27 ± 0.2 0.8 ± 0.1 3.1 ± 0.3 123 8.9 ± 0.2 0.5 ± 0.2 2.54 TYP. 2.54 TYP. 2.5 ± 0.2 0.5 ± 0.2 2.54 TYP. 2.54 TYP. 2.5 ± 0.2 1.Gate 2.Drain 3.Source 4.Fin (Drain) 1.Gate 2.Drain 3.Source 4.Fin (Drain) EQUIVALENT CIRCUIT Drain Gate Body Diode Gate Protection Diode Source Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. 8 Data Sheet D14094EJ6V0DS NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE TAPE INFORMATION There are two types (-E1, -E2) of taping depending on the direction of the device. Draw-out side Reel side MARKING INFORMATION NEC 48N055 HE Pb-free plating marking Abbreviation of part number Lot code RECOMMENDED SOLDERING CONDITIONS These products should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, please contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Soldering Method Infrared reflow MP-25ZJ, MP-25ZK Soldering Conditions Maximum temperature (Package's surface temperature): 260°C or below Time at maximum temperature: 10 seconds or less Time of temperature higher than 220°C: 60 seconds or less Preheating time at 160 to 180°C: 60 to 120 seconds Maximum number of reflow processes: 3 times Maximum chlorine content of rosin flux (percentage mass): 0.2% or less Recommended Condition Symbol IR60-00-3 Wave soldering MP-25, MP-25K, MP-25SK, MP-25 Fin Cut Partial heating MP-25ZJ, MP-25ZK, MP-25K, MP-25SK Partial heating MP-25, MP-25 Fin Cut Maximum temperature (Solder temperature): 260°C or below Time: 10 seconds or less Maximum chlorine content of rosin flux: 0.2% (wt.) or less Maximum temperature (Pin temperature): 350°C or below Time (per side of the device): 3 seconds or less Maximum chlorine content of rosin flux: 0.2% (wt.) or less Maximum temperature (Pin temperature): 300°C or below Time (per side of the device): 3 seconds or less Maximum chlorine content of rosin flux: 0.2% (wt.) or less P300 P350 THDWS Caution Do not use different soldering methods together (except for partial heating). Data Sheet D14094EJ6V0DS 9 NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE • T he information in this document is current as of October, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. 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