NP83P04PDG-E2-AY

DATA SHEET MOS FIELD EFFECT TRANSISTOR NP83P04PDG SWITCHING P-CHANNEL POWER MOSFET DESCRIPTION The NP83P04PDG is P-channel MOS Field Effect Transistor designed for high current switching applications. ORDERING INFORMATION PART NUMBER NP83P04PDG-E1-AY NP83P04PDG-E2-AY Note Note LEAD PLATING Pure Sn (Tin) PACKING Tape 800 p/reel PACKAGE TO-263 (MP-25ZP) Note Pb-free (This product does not contain Pb in external electrode.) FEATURES • Super low on-state resistance RDS(on)1 = 5.3 mΩ MAX. (VGS = −10 V, ID = −41.5 A) RDS(on)2 = 8.0 mΩ MAX. (VGS = −4.5 V, ID = −41.5 A) • High current rating: ID(DC) = m83 A (TO-263) ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) Drain Current (pulse) Note1 VDSS VGSS ID(DC) ID(pulse) PT1 PT2 Tch Tstg −40 m20 m83 m249 150 1.8 175 −55 to +175 56 315 V V A A W W °C °C A mJ Total Power Dissipation (TC = 25°C) Total Power Dissipation (TA = 25°C) Channel Temperature Storage Temperature Single Avalanche Current Single Avalanche Energy Note2 Note2 IAS EAS Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Starting Tch = 25°C, VDD = −30 V, RG = 25 Ω, VGS = −20 → 0 V THERMAL RESISTANCE Channel to Case Thermal Resistance Channel to Ambient Thermal Resistance Rth(ch-C) Rth(ch-A) 1.0 83.3 °C/W °C/W The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. D18690EJ3V0DS00 (3rd edition) Date Published May 2007 NS CP(K) Printed in Japan 2007 The mark shows major revised points. The revised points can be easily searched by copying an "" in the PDF file and specifying it in the "Find what:" field. NP83P04PDG ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate to Source Threshold Voltage Forward Transfer Admittance Note Note SYMBOL IDSS IGSS VGS(th) | yfs | RDS(on)1 RDS(on)2 TEST CONDITIONS VDS = −40 V, VGS = 0 V VGS = m20 V, VDS = 0 V VDS = −10 V, ID = −1 mA VDS = −10 V, ID = −41.5 A VGS = −10 V, ID = −41.5 A VGS = −4.5 V, ID = −41.5 A VDS = −10 V, VGS = 0 V, f = 1 MHz VDD = −20 V, ID = −41.5 A, VGS = −10 V, RG = 0 Ω MIN. TYP. MAX. −10 m100 UNIT μA nA V S −1.0 30 −1.6 60 4.1 5.1 9820 1500 850 35 21 245 120 −2.5 Drain to Source On-state Resistance 5.3 8.0 mΩ mΩ pF pF pF ns ns ns ns nC nC nC Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Note Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr VDD = −32 V, VGS = −10 V, ID = −83 A IF = −83 A, VGS = 0 V IF = −83 A, VGS = 0 V, di/dt = −100 A/μs 200 25 53 0.93 57 92 1.5 V ns nC Note Pulsed test PW ≤ 350 μs, Duty Cycle ≤ 2% TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = −20 → 0 V − ID VDD 50 Ω L VDD PG. BVDSS VDS VGS(−) 0 τ Starting Tch τ = 1 μs Duty Cycle ≤ 1% VDS Wave Form TEST CIRCUIT 2 SWITCHING TIME D.U.T. RL RG VDD VDS(−) 90% 10% 10% 90% VGS(−) VGS Wave Form 0 10% VGS 90% IAS VDS 0 td(on) ton tr td(off) toff tf TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = −2 mA PG. 50 Ω RL VDD 2 Data Sheet D18690EJ3V0DS NP83P04PDG TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA dT - Percentage of Rated Power - % 120 100 80 60 40 20 0 0 25 50 75 100 125 150 175 200 180 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE PT - Total Power Dissipation - W 150 120 90 60 30 0 0 25 50 75 100 125 150 175 200 Tch - Channel Temperature - °C FORWARD BIAS SAFE OPERATING AREA TC - Case Temperature - °C -1000 ID(pulse) PW =1 i ID - Drain Current - A -100 ID(DC) RDS(on) Limited (VGS = −10 V) 1i m 00 μs DC w Po i s 1i 0 ms -10 i D er ip iss io at -1 TC = 25°C Single Pulse d it e im nL -0.1 -0.1 -1 -10 -100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 1000 100 Rth(ch-A) = 83.3°C/Wi 10 1 Rth(ch-C) = 1.0°C/Wi 0.1 Single Pulse 0.01 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet D18690EJ3V0DS 3 NP83P04PDG DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS -250 -200 -150 -100 -50 Pulsed 0 0 -0.5 -1 -1.5 -2 VDS - Drain to Source Voltage - V GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE VGS(th) - Gate to Source Threshold Voltage - V | yfs | - Forward Transfer Admittance - S -3 -2.5 -2 -1.5 -1 -0.5 0 -75 -25 25 75 125 175 225 VDS = −10 V ID = −1 mA -1000 VGS = −10 V ID - Drain Current - A -100 -10 -1 -0.1 -0.01 -0.001 0 VDS = −10 V Pulsed ID - Drain Current - A −4.5 V Tch = −55°C −25°C 25°C 75°C 125°C 150°C 175°C -1 -2 -3 -4 -5 VGS - Gate to Source Voltage - V FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 10 Tch = −55°C −25°C 25°C 75°C VDS = −10 V Pulsed 0.1 -0.1 -1 125°C 150°C 175°C 1 -10 -100 Tch - Channel Temperature - °C DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-state Resistance - mΩ ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ 10 8 6 4 2 Pulsed 0 -1 -10 -100 -1000 ID - Drain Current - A 30 20 ID = −83 A −41.5 A −17 A 10 VGS = −4.5 V −10 V Pulsed 0 0 -5 -10 -15 -20 VGS - Gate to Source Voltage - V 4 Data Sheet D18690EJ3V0DS NP83P04PDG DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE RDS(on) - Drain to Source On-state Resistance - mΩ CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10 8 6 4 2 0 -75 -25 25 75 125 175 225 Tch - Channel Temperature - °C 100000 VGS = −4.5 V Ciss, Coss, Crss - Capacitance - pF Ciss 10000 Coss 1000 VGS = 0 V f = 1 MHz 100 -0.1 -1 -10 -100 −10 V Crss ID = −41.5 A Pulsed VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS 1000 td(off) tf 100 td(on) tr VDD = −20 V VGS = −10 V RG = 0 Ω 1 -0.1 -1 -10 -100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS -40 -12 VDD = −32 V −20 V −8 V VDS - Drain to Source Voltage - V -30 -9 -20 VGS -10 VDS 0 0 40 80 120 160 ID = −83 A -6 10 -3 0 200 ID - Drain Current - A QG - Gate Charge - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE -1000 -100 -10 -1 -0.1 Pulsed -0.01 0 0.5 1 1.5 1000 REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT trr - Reverse Recovery Time - ns IF - Diode Forward Current - A 100 VGS = −10 V 0V 10 di/dt = −100 A/μs VGS = 0 V 1 -0.1 -1 -10 -100 VF(S-D) - Source to Drain Voltage - V IF - Diode Forward Current - A Data Sheet D18690EJ3V0DS 5 VGS - Gate to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns NP83P04PDG PACKAGE DRAWING (Unit: mm) TO-263 (MP-25ZP) 10.0 ±0.3 7.88 MIN. 8.0 TYP. 1.35 ±0.3 No plating 4.45 ±0.2 1.3 ±0.2 4 9.15 ±0.3 15.25 ±0.5 0.5 0.025 to 0.25 0.6 ±0 2.54 12 3 2.5 1. Gate 2. Drain 3. Source 4. Fin (Drain) EQUIVALENT CIRCUIT Drain Gate Body Diode Source Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. 6 Data Sheet D18690EJ3V0DS 2.54 ±0.25 0.75 ±0.2 .2 0 to 8 ˚ 0.25 NP83P04PDG • T he information in this document is current as of May, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. 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