UPA1715G

DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1715 SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION This product is P-Channel MOS Field Effect Transistor designed for power management applications of notebook computers and Li-ion battery protection circuit. FEATURES • Low on-resistance RDS(on)1 = 8.5 mΩ TYP. (VGS = –10 V, ID = –6.0 A) RDS(on)2 = 11.0 mΩ TYP. (VGS = –4.5 V, ID = –6.0 A) RDS(on)3 = 12.0 mΩ TYP. (VGS = –4.0 V, ID = –6.0 A) • Low Ciss : Ciss = 3800 pF TYP. • Built-in G-S protection diode • Small and surface mount package (Power SOP8) PACKAGE DRAWING (Unit : mm) 8 5 1,2,3 ; Source ; Gate 4 5,6,7,8 ; Drain 1 4 5.37 Max. +0.10 –0.05 6.0 ±0.3 4.4 0.8 0.15 ORDERING INFORMATION PART NUMBER PACKAGE Power SOP8 1.8 Max. 1.44 0.05 Min. 0.5 ±0.2 0.10 1.27 0.78 Max. 0.40 +0.10 –0.05 µ PA1715G 0.12 M ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (pulse) Note1 Note2 EQUIVARENT CIRCUIT Drain VDSS VGSS ID(DC) ID(pulse) PT Tch Tstg –30 V V A A W °C °C Gate Protection Diode Gate # 20 #11 # 44 2.0 150 –55 to +150 Body Diode Total Power Dissipation (TA = 25°C) Channel Temperature Storage Temperature Source Notes 1. PW ≤ 10 µ s, Duty Cycle ≤ 1 % 2. Mounted on ceramic substrate of 1200 mm x 0.7 mm Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. 2 The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G13669EJ1V0DS00 (1st edition) Date Published March 1999 NS CP(K) Printed in Japan © 1998, 1999 µ PA1715 ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.) CHARACTERISTICS Drain to Source On-state Resistance SYMBOL RDS(on)1 RDS(on)2 RDS(on)3 Gate to Source Cut-off Voltage Forward Transfer Admittance Drain Leakage Current Gate to Source Leakage Current Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS(off) | yfs | IDSS IGSS Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr TEST CONDITIONS VGS = –10 V, ID = –6.0 A VGS = –4.5 V, ID = –6.0 A VGS = –4.0 V, ID = –6.0 A VDS = –10 V, ID = –1 mA VDS = –10 V, ID = –6.0 A VDS = –30 V, VGS = 0 V VGS = MIN. TYP. 8.5 11 12 MAX. 11.5 16 17.5 UNIT mΩ mΩ mΩ V S –1.0 10 –1.6 23 –2.5 –1 µA µA pF pF pF ns ns ns ns nC nC nC V ns nC # 20 V, VDS = 0 V 3800 1200 500 40 240 230 160 70 9 17 0.8 53 57 # 10 VDS = –10 V VGS = 0 V f = 1 MHz ID = –6.0 A VGS(on) = –10 V VDD = –15 V RG = 10 Ω ID = –11 A VDD = –24 V VGS = –10 V IF = 11 A, VGS = 0 V IF = 11 A, VGS = 0 V di/dt = 100 A/µ s TEST CIRCUIT 1 SWITCHING TIME D.U.T. RL VGS VGS Wave Form TEST CIRCUIT 2 GATE CHARGE D.U.T. IG = 2 mA 10 % 90 % 90 % ID VGS (on) 90 % RL VDD PG. RG RG = 10 Ω 0 ID VDD PG. 50 Ω VGS 0 τ τ = 1µ s Duty Cycle ≤ 1 % D Wave Form I 0 10 % td (on) ton tr td (off) toff 10 % tf 2 Data Sheet G13669EJ1V0DS00 µ PA1715 TYPICAL CHARACTERISTICS (TA = 25 °C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 2.8 TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE dT - Percentage of Rated Power - % PT - Total Power Dissipation - W 100 80 60 40 20 2.4 2.0 1.6 1.2 0.8 0.4 0 20 40 60 Mounted on ceramic substrate of 1200mm 2 x 0.7mm 0 20 40 60 80 100 120 140 160 80 100 120 140 160 TA - Ambient Temperature - ˚C TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA −100 ID(pulse) Remark Mounted on ceramic substrate of 1m s ID - Drain Current - A −10 ID(DC) 1200 mm x 0.7 mm 2 10 Po m 10 we rD iss s 0m s −1 ip at io n Li m TA = 25 ˚C −0.1 Single Pulse −0.1 −1 ite d −10 −100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - ˚C/W 100 Rth(ch-A) = 62.5˚C 10 1 Mounted on ceramic substrate of 1200 mm2 x 0.7 mm Single Pulse 0.1 100 µ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G13669EJ1V0DS00 3 µ PA1715 FORWARD TRANSFER CHARACTERISTICS −100 Pulsed −50 TA = −50˚C −25˚C 25˚C 75˚C 125˚C 150˚C DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE Pulsed VGS = −10 V −4.5 V −4 V ID - Drain Current - A −10 ID - Drain Current - A −2.0 VDS = −10 V −3.0 −4.0 −40 −30 −20 −10 −1 −0.1 0 −1.0 0 −0.2 −0.4 −0.6 −0.8 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V |yfs| - Forward Transfer Admittance - S 10 TA = −50˚C −25˚C 25˚C 75˚C 125˚C 150˚C VDS = −10 V Pulsed RDS(on) - Drain to Source On-State Resistance - mΩ FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE Pulsed 30 20 ID = −11 A −6 A 1 10 −0.1 −1 −10 −100 0 −5 −10 −15 ID- Drain Current - A VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE VGS(off) - Gate to Source Cut-off Voltage - V 20 Pulsed −2.0 VDS = −10 V ID = −1 mA 15 −1.5 VGS = −4 V −4.5 V −1.0 10 −10 V −0.5 5 −1 −10 ID - Drain Current - A −100 0 −50 0 50 100 150 Tch - Channel Temperature - ˚C 4 Data Sheet G13669EJ1V0DS00 µ PA1715 RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 20 18 16 14 12 10 8 6 4 −50 0 50 100 ID = −6 A 150 0 0.2 VGS = −4 V −4.5 V −10 V 100 SOURCE TO DRAIN DIODE FORWARD VOLTAGE Pulsed IF - Diode Forward Current - A VGS = −4.5 V 10 0V 1 0.1 0.4 0.6 0.8 1.0 1.2 1.4 Tch - Channel Temperature - ˚C VF - Source to Drain Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1 000 SWITCHING CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF tr td(off) tf 100 td(on) Ciss 1 000 Coss Crss 100 10 VDS = −15 V VGS = −10 V RG = 10Ω −10 −100 VGS = 0 V f = 1 MHz −0.1 −1 −10 −100 1 −0.1 −1 VDS - Drain to Source Voltage - V ID - Drain Current - A REVERSE RECOVERY TIME vs. DIODE CURRENT VDS - Drain to Source Voltage - V trr - Reverse Recovery Time - ns −30 VDS = −24 V −15 V −6 V VGS −12 −10 −8 −6 100 −20 10 −10 VDS 0 10 20 30 40 50 60 70 −4 −2 0 −0.1 −1 −10 −100 IF - Diode Current - A QG - Gate Charge - nC VGS - Gate to Source Voltage - V di/dt = 100 A/µ s VGS = 0 V DYNAMIC INPUT/OUTPUT CHARACTERISTICS −40 ID = −11.0 A Data Sheet G13669EJ1V0DS00 5 µ PA1715 [MEMO] 6 Data Sheet G13669EJ1V0DS00 µ PA1715 [MEMO] Data Sheet G13669EJ1V0DS00 7 µ PA1715 • The information in this document is subject to change without notice. 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