UPA1890

DATA SHEET MOS FIELD EFFECT TRANSISTOR µPA1890 N- AND P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING DESCRIPTION The µPA1890 is a switching device which can be driven directly by a 4.0-V power source. The µPA1890 features a low on-state resistance and excellent switching characteristics, and is suitable for applications such as power switch of portable machine and so on. 8 PACKAGE DRAWING (Unit : mm) 5 1 2, 3 4 5 6, 7 8 :Drain1 :Source1 :Gate1 :Gate2 :Source2 :Drain2 1.2 MAX. 1.0±0.05 0.25 ° 3° +5° –3 FEATURES • Can be driven by a 4.0-V power source • Low on-state resistance N-Channel RDS(on)1 = 27 mΩ MAX. (VGS = 10 V, ID = 3.0 A) RDS(on)2 = 37 mΩ MAX. (VGS = 4.5 V, ID = 3.0 A) RDS(on)3 = 47 mΩ MAX. (VGS = 4.0 V, ID = 3.0 A) P-Channel RDS(on)1 = 37 mΩ MAX. (VGS = –10 V, ID = –2.5 A) RDS(on)2 = 56 mΩ MAX. (VGS = –4.5 V, ID = –2.5 A) RDS(on)3 = 64 mΩ MAX. (VGS = –4.0 V, ID = –2.5 A) • Built-in G-S protection diode against ESD 0.1±0.05 1 4 0.5 0.6 +0.15 –0.1 0.145 ±0.055 3.15 ±0.15 3.0 ±0.1 6.4 ±0.2 4.4 ±0.1 1.0 ±0.2 0.65 0.8 MAX. 0.10 M 0.1 ORDERING INFORMATION PART NUMBER PACKAGE Power TSSOP8 0.27 +0.03 –0.08 µPA1890GR-9JG EQUIVALENT CIRCUIT Drain1 Drain2 ABSOLUTE MAXIMUM RATINGS (TA = 25°C) N-Channel / P-Channel Drain to Source Voltage Gate to Source Voltage Drain Current (DC) Drain Current (pulse) Note1 Note2 VDSS VGSS ID(DC) ID(pulse) PT Tch Tstg 30/–30 ±20/ # 20 ±6.0/ # 5.0 ±24/ # 20 2.0 150 –55 to +150 V V A A W °C °C Gate1 Body Diode Gate2 Body Diode Gate Protection Diode Source1 Gate Protection Diode Source2 Total Power Dissipation Channel Temperature Storage Temperature N-Channel P-Channel Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 % 2 2. Mounted on ceramic substrate of 5000 mm x 1.1 mm Remark To keep good radiate condition, it is recommended that all pins are soldering to print board. The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G14762EJ1V0DS00 (1st edition) Date Published March 2000 NS CP(K) Printed in Japan © 2000 µPA1890 ELECTRICAL CHARACTERISTICS (TA = 25 °C) A) N-Channel CHARACTERISTICS Drain Cut-off Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance SYMBOL I DSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr TEST CONDITIONS VDS = 30 V, VGS = 0 V VGS = ±16 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 3.0 A VGS = 10 V, ID = 3.0 A VGS = 4.5 V, ID = 3.0 A VGS = 4.0 V, ID = 3.0 A VDS = 10 V VGS = 0 V f = 1 MHz VDD = 15 V ID = 3.0 A VGS(on) = 10 V RG = 10 Ω VDD = 24 V ID = 6.0 A VGS = 10 V IF = 6.0 A, VGS = 0 V IF = 6.0 A, VGS = 0 V di/dt = 100 A / µs 1.5 3 1.8 7.6 18 24 27 748 227 107 20 80 48 30 14 1.9 3.8 0.82 31 32 27 37 47 MIN. TYP. MAX. –10 ±10 2.5 UNIT µA µA V S mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. RL PG. RG VDD ID VGS 0 τ τ = 1 µs Duty Cycle ≤ 1 % ID Wave Form VGS VGS Wave Form IG = 2 mA VGS(on) 90 % RL VDD 0 10 % PG. 90 % 90 % 50 Ω ID 0 10 % 10 % td(on) ton tr td(off) toff tf 2 Data Sheet G14762EJ1V0DS00 µPA1890 B) P-Channel CHARACTERISTICS Drain Cut-off Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance SYMBOL I DSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr TEST CONDITIONS VDS = –30 V, VGS = 0 V VGS = # 16 V, VDS = 0 V VDS = –10 V, ID = –1 mA VDS = –10 V, ID = –2.5 A VGS = –10 V, ID = –2.5 A VGS = –4.5 V, ID = –2.5 A VGS = –4.0 V, ID = –2.5 A VDS = –10 V VGS = 0 V f = 1 MHz VDD = –15 V ID = –2.5 A VGS(on) = –10 V RG = 10 Ω VDD = –24 V ID = –5.0 A VGS = –10 V IF = 5.0 A, VGS = 0 V IF = 5.0 A, VGS = 0 V di/dt = 50 A / µs –1.3 3 –1.8 7.8 28 42 47 851 279 128 17 52 84 73 15 1.9 4.2 0.83 38 35 37 56 64 MIN. TYP. MAX. –10 # 10 UNIT µA µA V S mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC –2.3 TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. RL PG. RG VDD ID ( − ) VGS (−) 0 τ τ = 1 µs Duty Cycle ≤ 1 % ID Wave Form VGS (−) VGS Wave Form IG = −2 mA VGS(on) 90 % RL VDD 0 10 % PG. 90 % 90 % 50 Ω ID 0 10 % 10 % td(on) ton tr td(off) toff tf Data Sheet G14762EJ1V0DS00 3 µPA1890 TYPICAL CHARACTERISTICS (TA = 25°C) A) N-Channel DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 FORWARD BIAS SAFE OPERATING AREA 100 L n) S(o RD VGS ited im V) 0 =1 ID (pulse) PW =1 dT - Derating Factor - % ID - Drain Current - A 10 (@ ID (DC) 60 1 10 0m DC s 10 ms ms 40 20 0.1 Single Pulse Mounted on Ceramic Substrate of 5000 mm2x 1.1 mm 0.01 PD(FET1):PD(FET2) = 1:1 0 30 60 90 120 TA - Ambient Temperature - ˚C 150 0.1 1 10 100 VDS - Drain to Source Voltage - V DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 25 Pulsed VGS = 10 V TRANSFER CHARACTERISTICS 100 10 VDS = 10 V ID - Drain Current - A ID - Drain Current - A 20 15 4.5 V 4.0 V 1 0.1 0.01 0.001 0.0001 TA = −25˚C 25˚C 75˚C 125˚C 10 5 0 0 0.2 0.4 0.6 0.8 1.0 VDS - Drain to Source Voltage - V 0.00001 0 1 2 3 4 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 VGS(off) - Gate to Source Cut-off Voltage - V 3 | yfs | - Forward Transfer Admittance - S VDS = 10 V ID = 1 mA VDS = 10 V TA = −25˚C 25˚C 75˚C 125˚C 10 2 1 1 0.1 0 −50 Tch 0 50 100 - Channel Temperature -˚C 150 0.01 0.01 0.1 1 10 ID - Drain Current - A 100 4 Data Sheet G14762EJ1V0DS00 µPA1890 RDS(on) - Drain to Source On-State Resistance - mΩ 50 40 30 20 10 0 0.1 TA = 125˚C 75˚C 25˚C 25˚C RDS(on) - Drain to Source On-State Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 60 VGS = 4.0 V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 50 VGS = 4.5 V 40 TA = 125˚C 75˚C 25˚C 30 20 25˚C 10 0 0.1 1.0 10 100 1.0 10 100 ID - Drain Current - A ID - Drain Current - A RDS(on) - Drain to Source On-State Resistance - mΩ RDS (on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 40 VGS = 10 V DRAIN TO SOURCE ON STATE RESISTANCE vs. CHANNEL TEMPERATURE 50 ID = 3.0 A 30 TA = 125˚C 75˚C 40 VGS = 4.0 V 4.5 V 30 10 V 20 20 25˚C 25˚C 10 0 0.1 1.0 10 100 10 −50 ID - Drain Current - A 0 50 100 Tch - Channel Temperature -˚C 150 RDS (on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 50 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 40 Ciss, Coss, Crss - Capacitance - pF ID = 3.0 A f = 1 MHz 1000 Ciss 30 20 100 Coss Crss 10 0 10 0 5 10 15 20 1 10 VDS - Drain to Source Voltage - V 100 VGS - Gate to Source Voltage - V Data Sheet G14762EJ1V0DS00 5 µPA1890 SWITCHING CHARACTERISTICS SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 td(on), tr, td(off), tf - Switching Time - ns 1000 IF - Source to Drain Current - A VDD = 15 V VGS(on) = 10 V RG =10 Ω tf 10 100 tr td(off) td(on) 1 10 0.1 1 0.1 1 ID - Drain Current - A 10 0.01 0.4 VGS = 0 V 0.6 0.8 1.0 1.2 VF(S-D) - Source to Drain Voltage - V DYNAMIC INPUT CHARACTERISTICS 10 ID = 6.0 A VGS - Gate to Source Voltage - V 8 VDD = 6 V 15 V 24 V 6 4 2 0 0 2 4 6 8 10 12 QG - Gate Charge - nC 6 Data Sheet G14762EJ1V0DS00 µPA1890 B) P-Channel DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 FORWARD BIAS SAFE OPERATING AREA −100 )L on = S( RD GS dT - Derating Factor - % ID - Drain Current - A −10 d ite ) im 0 V −1 ID (pulse) PW =1 V (@ ID (DC) 60 10 ms ms −1 DC 10 0m s 40 20 −0.1 0 Single Pulse Mounted on Ceramic Substrate of 5000 mm2x 1.1 mm −0.01 PD(FET1):PD(FET2) = 1:1 30 60 90 120 TA - Ambient Temperature - ˚C 150 −0.1 −1 −10 −100 VDS - Drain to Source Voltage - V −20 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE Pulsed TRANSFER CHARACTERISTICS −100 −10 VDS = −10 V ID - Drain Current - A −15 ID - Drain Current - A VGS = −10 V −4.5 V −4.0 V −1 −0.1 −0.01 −0.001 TA = −25˚C 25˚C 75˚C 125˚C −10 −5 −0.0001 −0.00001 0 −0.2 −0.4 −0.6 −0.8 −1.0 0 VDS - Drain to Source Voltage - V −1 −2 −3 −4 0 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE VGS(off) - Gate to Source Cut-off Voltage - V −3 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 | yfs | - Forward Transfer Admittance - S VDS = −10 V ID = −1 mA VDS = −10 V −2 10 TA = −25˚C 25˚C 75˚C 125˚C 1 −1 0.1 0 −50 Tch 0 50 100 - Channel Temperature -˚C 150 0.01 −0.01 −0.1 −1 −10 ID - Drain Current - A −100 Data Sheet G14762EJ1V0DS00 7 µPA1890 RDS(on) - Drain to Source On-State Resistance - mΩ RDS(on) - Drain to Source On-State Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 100 VGS = −4.0 V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 80 VGS = −4.5 V TA = 125˚C 75˚C 25˚C 80 TA = 125˚C 60 60 75˚C 25˚C 40 25˚C 40 -25˚C 20 20 −0.1 −1.0 −10 −100 0 −0.1 −1.0 −10 −100 ID - Drain Current - A ID - Drain Current - A RDS(on) - Drain to Source On-State Resistance - mΩ RDS (on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 50 VGS = −10 V TA = 125˚C DRAIN TO SOURCE ON STATE RESISTANCE vs. CHANNEL TEMPERATURE 80 ID = −2.5 A VGS = −4.0 V 60 −4.5 V 40 40 75˚C 30 25˚C −10 V 25˚C 20 20 10 −0.1 −1.0 −10 −100 0 −50 ID - Drain Current - A 0 50 100 Tch - Channel Temperature -˚C 150 RDS (on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 80 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 60 Ciss, Coss, Crss - Capacitance - pF ID = −2.5 A f = 1 MHz 1000 Ciss 40 Coss 100 Crss 20 0 0 −5 −10 −15 −20 10 −1 −10 VDS - Drain to Source Voltage - V −100 VGS - Gate to Source Voltage - V 8 Data Sheet G14762EJ1V0DS00 µPA1890 SWITCHING CHARACTERISTICS SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 td(on), tr, td(off), tf - Switching Time - ns 10000 IF - Source to Drain Current - A VDD = −15 V VGS(on) = −10 V RG =10 Ω td(off) tf tr td(on) 10 1000 1 100 0.1 VGS = 0 V 10 −0.1 −1 ID - Drain Current - A −10 0.01 0.4 0.6 0.8 1.0 1.2 VF(S-D) - Source to Drain Voltage - V DYNAMIC INPUT CHARACTERISTICS 10 ID = 5.0 A VGS - Gate to Source Voltage - V 8 VDD = 6 V 15 V 24 V 6 4 2 0 0 2 4 6 8 10 12 14 16 QG - Gate Charge - nC Data Sheet G14762EJ1V0DS00 9 µPA1890 C) Common TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - ˚C/W 100 62.5˚C/W 10 1 Mounted on Ceramic Substrate of 5000 mm2 x 1.1 mm Single Pulse PD(FET1):PD(FET2) = 1:1 0.1 1m 10m 100m 1 10 100 1000 PW - Pulse Width - S 10 Data Sheet G14762EJ1V0DS00 µPA1890 [MEMO] Data Sheet G14762EJ1V0DS00 11 µPA1890 • The information in this document is subject to change without notice. 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