UPA2727UT1A-E2-AY

DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2727UT1A SWITCHING N-CHANNEL POWER MOSFET DESCRIPTION The μ PA2727UT1A is N-channel MOSFET designed for DC/DC converter applications. PACKAGE DRAWING (Unit: mm) 1.27 • Low on-state resistance RDS(on)1 = 9.6 mΩ MAX. (VGS = 10 V, ID = 8 A) 0.42 −0.05 3 4 +0.1 6 5 6 ±0.2 5.4 ±0.2 RDS(on)2 = 15 mΩ MAX. (VGS = 4.5 V, ID = 8 A) • Low QGD QGD = 3.5 nC TYP. (VDD = 15 V, ID = 16 A) • Thin type surface mount package with heat spreader (8-pin HVSON) • RoHS Compliant 5 ±0.2 0.27 ±0.05 1.0 MAX. 2 7 5.15 ±0.2 FEATURES 1 8 0.10 S 0.10 M 0 +0.05 −0 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (pulse) Note1 Note2 Note2 1 0.2 4.1 ±0.2 VDSS VGSS ID(DC) ID(pulse) PT1 PT2 Tch Tstg 30 ±20 ±16 ±96 1.5 4.6 150 −55 to +150 16 26 V V A A W W °C °C A mJ 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8: Drain Total Power Dissipation Channel Temperature Storage Temperature 3.65 ±0.2 0.6 ±0.15 0.7 ±0.15 Total Power Dissipation (PW = 10 sec) EQUIVALENT CIRCUIT Drain Single Avalanche Current Single Avalanche Energy Note3 Note3 IAS EAS THERMAL RESISTANCE Channel to Ambient Thermal Resistance Note2 Rth(ch-A) Rth(ch-C) 83.3 2.0 °C/W °C/W Gate Body Diode Channel to Case (Drain) Thermal Resistance Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% Source 2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G18300EJ1V0DS00 (1st edition) Date Published May 2007 NS CP(K) Printed in Japan 2006, 2007 μ PA2727UT1A ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate to Source Cut-off Voltage Forward Transfer Admittance Note Note SYMBOL IDSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 TEST CONDITIONS VDS = 30 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 8 A VGS = 10 V, ID = 8 A VGS = 4.5 V, ID = 8 A VDS = 15 V, VGS = 0 V, f = 1 MHz VDD = 15 V, ID = 8 A, VGS = 10 V, RG = 10 Ω MIN. TYP. MAX. 10 UNIT μA nA V S ±100 1.5 6 7.6 11 1170 250 90 13 3.6 41 8 9.6 15 2.5 Drain to Source On-state Resistance mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC Ω Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Gate Resistance Note Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr RG VDD = 15 V, VGS = 5 V, ID = 1 6 A IF = 16 A, VGS = 0 V IF = 16 A, VGS = 0 V, di/dt = 100 A/μs f = 1 MHz 11 3.8 3.5 0.83 27 23 2.2 Note Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω TEST CIRCUIT 2 SWITCHING TIME D.U.T. L VDD PG. RG RL VDD VGS VGS Wave Form 0 10% VGS 90% VDS 90% 90% 10% 10% BVDSS IAS ID VDD VDS VGS 0 τ τ = 1 μs Duty Cycle ≤ 1% VDS VDS Wave Form 0 td(on) ton tr td(off) toff tf Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD 2 Data Sheet G18300EJ1V0DS μ PA2727UT1A TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 120 FORWARD BIAS SAFE OPERATING AREA 1000 dT - Percentage of Rated Power - % 100 ID - Drain Current - A 100 ID(pulse) 1i 0 1i 0 0 m PW = 30 80 60 40 20 0 0 ID(DC) m μs s i 1i m i s 10 1 d it e m Li V ) ) on 1i 0 S( = D R GS (V Po w s i er D is si 1i 0 s pa t io im Single Pulse it e d Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm n L 0 20 40 60 80 100 120 140 160 0.1 0.01 0.1 1 10 100 TA - Ambient Temperature - °C VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W 100 Rth(ch-A) = 83.3°C/Wi 10 1 Rth(ch-C) = 2.0°C/Wi 0.1 Single Pulse Rth(ch-A): Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm 0.01 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 35 30 ID - Drain Current - A 35 10 V 4.5 V 4.0 V 3.8 V 30 ID - Drain Current - A 25 20 15 3.6 V 3.4 V 25 20 15 10 5 VDS = 10 V Pulsed 0 1 2 3 4 5 TA = −55°C 25°C 75°C 125°C 3.2 V 10 5 0 0 0.2 0.4 0.6 0.8 1 VDS - Drain to Source Voltage - V VGS = 3.0 V Pulsed 0 VGS - Gate to Source Voltage - V Data Sheet G18300EJ1V0DS 3 μ PA2727UT1A GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE VGS(off) - Gate to Source Cut-off Voltage - V | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 3 2.5 2 1.5 1 0.5 0 -75 -25 25 75 125 175 Tch - Channel Temperature - °C 100 TA = −55°C 25°C 75°C 125°C 10 1 VDS = 10 V Pulsed 0.1 0.1 1 10 100 ID - Drain Current - A VDS = 10 V ID =1 mA DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-state Resistance - mΩ 30 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ 30 ID = 8 A Pulsed 20 20 VGS = 4.5 V 10 10 V Pulsed 0 0.1 1 10 100 10 0 0 5 10 15 20 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE RDS(on) - Drain to Source On-state Resistance - mΩ VGS - Gate to Source Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 25 20 VGS = 4.5 V 15 10 5 0 -75 -25 25 75 125 175 Tch - Channel Temperature - °C Ciss, Coss, Crss - Capacitance - pF ID = 8 A Pulsed 1000 Ciss Coss 100 VGS = 0 V f = 1 MHz 10 0.1 1 10 100 Crss 10 V VDS - Drain to Source Voltage - V 4 Data Sheet G18300EJ1V0DS μ PA2727UT1A DYNAMIC INPUT/OUTPUT CHARACTERISTICS SOURCE TO DRAIN DIODE FORWARD VOLTAGE 6 VGS - Gate to Source Voltage - V IF - Diode Forward Current - A 100 4 VDD = 24 V 15 V 6V 10 V VGS = 4.5 V 0V 10 2 1 ID = 1 6 A 0 0 5 10 15 QG - Gate Charge - nC Pulsed 0.1 0 0.2 0.4 0.6 0.8 1 1.2 VF(S-D) - Source to Drain Voltage - V ORDERING INFORMATION PART NUMBER LEAD PLATING Note Note Note Note PACKING PACKAGE μ PA2727UT1A-E1-AZ μ PA2727UT1A-E2-AZ μ PA2727UT1A-E1-AY μ PA2727UT1A-E2-AY Sn-Bi Tape 3000 p/reel Pure Sn 8-pin HVSON 0.10 g TYP. Note Pb-free (This product does not contain Pb in the external electrode.) Data Sheet G18300EJ1V0DS 5 μ PA2727UT1A • T he information in this document is current as of May, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. 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