UPD16666AN

DATA SHEET MOS INTEGRATED CIRCUIT PPD16666A 240-OUTPUT LCD ROW DRIVER DESCRIPTION The PPD16666A is a row (common) driver which contains a RAM capable of full-dot LCD display. With 240 outputs, this driver can be combined with a column (segment) driver PPD16661A which contains a RAM to display VGA (640 by 480 dots), 1/2 VGA, or 1/4 VGA, etc. By combining it with the PPD16661A, the PPD16666A can provide four gray levels by frame rate control. With its built-in display RAM in the column driver, the driver kit can reduce current consumption, thus making it most suitable for the display section of a PDA or portable terminal. FEATURES • • • • • LCD-driven voltage: 20 to 36 V Duty: 1/240 Driving type: 2 lines selected simultaneously Output count: 240 outputs Capable of gray level display: 4 gray levels (frame rate control) ORDERING INFORMATION Part No. Package TCP (TAB) Standard TCP (OLB: 0.2 mm pitch; folding) PPD16666AN-XXX PPD16666AN-051 The TCP’s external shape is custom-ordered. Therefore, if you have a shape in mind, please contact an NEC salesperson. Document No. S12370EJ2V0DS00 (2nd edition) Date Published October 1997 N Printed in Japan © 1997 PPD16666A BLOCK DIAGRAM X1 to X240 VDD Liquid-crystal drive circuit V1 VEE Selection control circuit Q1 to Q120 Bidirectional shift register DIR VCC1 VSS Level shifter L1 L2 DOFFB’ STB FRMB                    Column driver interface BLOCK FUNCTION 1. Liquid-crystal drive circuit This circuit selects and outputs the level for liquid-crystal driving. One of VDD, VEE, and V1 is selected by the output of the selection control circuit. 2. Selection control circuit This circuit creates the signal which will select the level of the output signal, based on the output of the shift register circuit and the driving level power selection signals L1 and L2 3. Bidirectional shift register circuit This refers to the 120-bit bidirectional shift register circuit. The DIR signal can be used to switch over the shift direction. The data that has been entered from the FRMB terminal is shifted by the row drive signal strobe (STB). 4. Level shifter circuit This circuit transforms the 5-V signals to the high-voltage signals for liquid-crystal driving. 2 PPD16666A PIN FUNCTIONS Classification Power Pin Name VCC1 VSS VDD VEE V1 STB FRMB DOFFB’ L1 L2 DIR I I I I I I Input/Output Pad No. Function 5 V power for level shifter GND power for level shifter Power for logic; liquid-crystal drive level power Power for logic; liquid-crystal drive level power (GND) Liquid-crystal drive level power Row drive strobe signal Frame signal Display OFF signal Drive level power selection signal (1st line) Drive level power selection signal (2nd line) Shift direction selection signal: when L (DIR = VEE), X1 o X240 when H (DIR = VDD), X240 o X1 Liquid-crystal drive output Selects and outputs one of VDD, VEE, and V1. Liquid-crystal display timing Liquid-crystal drive output X1 to X240 O DETAILS OF PIN FUNCTIONS • STB (input) Refers to the input pin of the row drive strobe signal. The bidirectional shift register is shifted at STB’s rising edge. • FRMB (input) Refers to the input pin of the frame signal. The shift register data is read at STB’s rising edge. • DIR (input) Refers to the input pin of the drive output’s shift direction selection signal. When the shift direction selection signal (DIR) is “L”, the shift data (selection signal) is shifted from the drive output X1 to the X240 direction. When “H”, it is shifted from the X240 to the X1 direction. • DOFFB’ (input) Refers to the input pin of the display OFF signal. It is placed in the display OFF status (all outputs at V1) at the “L” level. In the mean time, it reads the frame signal and returns to the normal display status at the “H” level. • L1 & L2 (input) Refer to the input pins of the drive level power selection signal. In the case of the liquid-crystal drive output, the two lines are selected simultaneously by the shift register. L1 selects the first line, and L2 the second line. Both lines select VDD at “H”, and VEE at “L”. 3 PPD16666A POWER SUPPLY SEQUENCE OF CHIP SET It is recommended to apply power in the following sequence. VCC2 o VCC1 o input o VDD, VEE o V0, V1, V2 Be sure to apply LCD drive voltages V0, V1, and V2 last. ON VCC2 OFF ON VCC1 OFF 4.5 V Input (A0-A16, CSB, OEB, WEB, UBEB, D0-D15, DOFFB) 0 s or more 0V 3.3 V 3.3 V RESETB 0V 0.3 VCC2 100 ns or more V Note DD 0 s or more ON OFF OFF VEE Note ON 0 ns or more ON V0 OFF ON V1 OFF ON V2 OFF Note VDD and VEE do not need to be turned ON at the same time. Caution Turn off power to the chip set in the reverse sequence to the power application sequence. 4 PPD16666A EXAMPLE OF CONNECTING INTERNAL SCHOTTKY BARRIER DIODE OF MODULE TO REINFORCE POWER SUPPLY PROTECTION (Use a Schottky barrier diode with Vf = 0.5 V or less.) VDD VCC1 V2 V1 V0 VSS VEE Connect the diodes enclosed in the dotted line when V0 is not 0 V (GND) 5 PPD16666A ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = 25 qC, VSS = 0 V) Parameter Supply Voltage Symbol VCC1 VDD – VEE V1 Input Voltage VI1 VI2 Output Voltage Operating Temperature Storage Temperature VO TA Tstg Other than the DIR pin DIR pin VCC1 d VDD, VEE d VSS Condition Ratings –0.5 to +6.5 40 VEE – 0.5 to VDD + 0.5 –0.5 to VCC1 + 0.5 VEE – 0.5 to VDD + 0.5 VEE – 0.5 to +VDD + 0.5 –20 to +70 –40 to +125 qC Unit V Recommended Operating Range (TA = ð20 to +70 qC, VSS = 0 V) Parameter Supply Voltage Symbol VCC1 VDD – VEE V1 Input Voltage VI1 VI2 Other than DIR pin DIR pin VCC1 d VDD, VEE d VSS Condition MIN. 4.75 20 0 0 VEE TYP. MAX. 5.25 36 3 VCC1 VDD Unit V DC Characteristics (unless otherwise specified, VCC1 = 4.75 to 5.25 V, VDD ð (VEE) = 20 to 31 V, VCC1 d VDD, VEE d VSS, V1 = 0 to 3 V, VSS = 0 V, TA = ð 20 to ò70 qC) Parameter High-Level Input Voltage Symbol VIH1 VIH2 Low-Level Input Voltage VIL1 VIL2 Driver ON Resistance Input Leakage Current RON IIH1 IIH2 IIL1 IIL2 Current Consumption ICC1 IDD Condition Other than the DIR pin DIR pin Other than the DIR pin DIR pin Load current = 100 PA VIN = VCC, other than the DIR pin VIN = VDD, DIR pin VIN = 0 V, other than the DIR pin VIN = VEE, DIR pin Frame frequency 70 Hz at operation 200 120 1.0 MIN. 0.8 VCC1 VDDð0.3 (VDD–VEE) 0.2 VCC1 VEE+0.3 (VDD–VEE) 2.0 1.0 25 –1.0 –25 320 210 k: TYP. MAX. Unit V PA PA 6 PPD16666A AC Characteristics Parameter STB High-Level Width STB Low-Level Width FRMB Setup Time FRMB Hold Time STB Rise Time STB Fall Time Output Delay Time Symbol twsh twsl tsf thf tr tf tpdsx tpdout Output no-load Condition MIN. 500 500 100 100 150 150 300 200 TYP. MAX. Unit ns 7 PPD16666A AC CHARACTERISTICS WAVEFORM DIAGRAMS tr VCC1 0.9 VCC1 STB VSS 0.1 VCC1 0.5 VCC1 twsh twsl tsf VCC1 FRMB VSS 0.5 VCC1 thf tf VCC1 DOFFB’ VSS tpdsx VDD VDD to V1 50 % Xn V1 VEE to V1 50 % VEE tpdsx VDD VDD to V1 50 % Xn + 2 V1 VEE to V1 50 % VEE tpdout tpdsx tpdout tpdsx 0.5 VCC1 8 PPD16666A LEVEL SELECTION TIMING OF LIQUID-CRYSTAL DRIVE OUTPUT The FRMB is input in one frame twice. The STB is input into half a frame 121 times, and into one frame 242 times. VDD DIR FRMB STB VEE VCC1 VSS VCC1 VSS 121 1 2 120 121 1 2 120 121 1 2 120 121 1 2 120 121 1 frame T1 VCC1 T2 T3 T4 L1 L2 VSS VCC1 VSS VDD X1 V1 VEE X2 X3 X4 X240 (When DIR is “H”) VDD DIR VEE VDD X240 V1 VEE X239 X238 X237 X1 Remark While the DOFFB’ is “L”, the X output remains at the V1 level. Afterward, if it becomes “H”, the level of the X output is output timed with the above timing. Note When the time lag between STB signal and the L1, L2 signals is large, hazard may occur in output. 9 PPD16666A SYSTEM CONFIGURATION EXAMPLE An example of configuring a liquid-crystal panel of half-VGA size (480 across by 320) by using four column drivers and two row drivers. • • • • • • Each column driver sets the LSI No. with PL0, 1, and 2 pins. The DIR pins of each column driver are all set to low level. Only one of the column drivers is set to the master; all the others are set to the slave. Signals are supplied from the master column driver to the slave column driver and to the row driver. Connect an oscillator resistor to the OSC1 and OSC2 pins on the master, and leave these pins open on the slave. All the signals from the system (D0 to D15, A0 to A16, CSB, OEB, WEB, UBEB, RDY, RESETB, and DOFFB) are connected in parallel to the column driver. Connect a pull-up resistor to the RDY signal. The TEST pin is used to test the LSI, and is open or grounded when the system is configured. VCC2 RDY DOFFB RESETB D0-D15 A0-A16 Control CSB, OEB WEB, UBEB OSC1 STB FRMB DOUTB/DOFFB’ L1 L2 REFRHB Y1 Master No. 0 OSC2 Slave No. 2 Y160 Y1 Scan direction Y160 Row driver 240 Row driver 240 Y160 Scan direction Y1 Y160 Y1 Slave No. 1 Slave No. 3 10 STANDARD TCP PACKAGE (PPD16666AN-051) A 27.3±0.3 27.10 17.70 63.949±0.08 (56.20) 27.3±0.3 27.10 17.40 17.70 0.70 P0.20 ± 0.01 × 84 = 16.80 ± 0.025 W0.10 ± 0.15 4.75±0.03 P0.20 ± 0.01 × 84 = 16.80 ± 0.025 W0.10 ± 0.15 0.70 P0.20 ± 0.01 × 83 = 16.60 ± 0.025 W0.10 ± 0.015 1.981±0.03 1.50 1.50 1.00 0.80 7.80 (0.50) 0.80 (1.50) (1.90) 12.20 0.3±0.3 12.20 Coating area Flex resin coating area +0 –4.3 2.50 3.80 7.3 1.80 5.80 (13.70) 15.60 3.50 P0.80 ± 0.01 × 18 = 14.40 ± 0.025 W0.40 ± 0.02 1.50 17.81 12.5±0.3 26.60 18.00 4.00 25.00 A' 22.4 –4.6 +0 2- φ 1.00 18.00 26.00 Coating area MATERIAL Base Film Adhesive Copper foil Plating Solder resist : UPILEX-S : Epoxy : Electrolysis Cu : Sn : Epoxy t = 75 µ s t = 12 µ m t = 25 µ s t = Min. 0.25 µ m t = 25 µ m 6.10 16.95 This product is the flex specification Figures in parenthesis denote a reference value Corner radius unless otherwise specified R0.3 mm MAX. All tolerances unless otherwise specified ±0.05 mm This figure is shown from the pattern side 5-pitch (23.75 mm) feed D1 666 6A N-0 51 101 JA PA N P P PPD16666A P 11 PPD16666A Detail of output side test pad and alignment mark (× 20) From pattern center 27.10 P0.20 0.24 0.35 0.35 0.30 0.30 0.60 ± 0.015 0.40 ± 0.015 Detail of alignment hole (× 20) 0.20 R0.60 Base hole R0.50 Cu 0.15 0.15 0.15 0.30 (1.90) R0.80 Cu φ 1.20 Base hole φ 1.00 Cu (1.50) (13.70) 19.65 12.20 φ 1.60 Cu 0.10 ± 0.015 From pattern center A - A’ sectional view Cu MAX. 0.9 Chip Flex resin TCP tape winding direction Input leads Output leads Winding direction Base film Unwinding direction Cu pattern is on the outside of the tape 12 PPD16666A NC NC NC X240 X239 X238 • • X163 X162 X161 NC NC NC NC X160 X159 X158 • • X83 X82 X81 NC NC NC NC X80 X79 X78 • • X3 X2 X1 NC NC NC µPD16666AN NC VEE V1 VDD VEE DIR STB L2 L1 DOUTB FRMB VDD VCC1 VSS VEE VDD V1 VEE NC -051 13 PPD16666A [MEMO] 14 PPD16666A [MEMO] 15 PPD16666A No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96. 5