0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
UPD16823

UPD16823

  • 厂商:

    NEC(日电电子)

  • 封装:

  • 描述:

    UPD16823 - MONOLITHIC H BRIDGE DRIVER - NEC

  • 数据手册
  • 价格&库存
UPD16823 数据手册
DATA SHEET MOS INTEGRATED CIRCUIT µPD16823 MONOLITHIC H BRIDGE DRIVER DESCRIPTION This IC is a monolithic H bridge driver employing a horizontal N-channel power MOS FET for its driver stage. It is provided with forward/reverse and brake functions and is ideal as a driver circuit for a motor that winds or rewinds the film in a camera, or a motor for moving a lens. FEATURES • High drive current IDR1 = 0.5 A (DC) IDR2 = 1 A: at PW ≤ 200 ms, duty cycle ≤ 50% IDR3 = 3 A: at PW ≤ 200 ms, single pulse • 1.5ch H bridge circuits • Low ON resistance (sum of ON resistance of top and bottom FETs) RON = 0.6 Ω TYP. at IDR = 0.5 A • Standby function that turns OFF charge pump circuit • Low-voltage drive (2.5 V MIN.) • Surface-mount mini-mold package: 20-pin plastic SOP (300 mil) ORDERING INFORMATION Part Number Package 20-pin plastic SOP (300 mil) µPD16823GS BLOCK DIAGRAM C1 VDD C2 C3 External capacitors C1 through C3: 10 nF External capacitor C4: 1 to 10 µF VM OSC CIRCUIT STBY IN1 IN2 IN3 Pull-down resistor: 50 kΩ CONTROL CIRCUIT CHARGE PUMP CIRCUIT OUT1 LEVEL SHIFT CIRCUIT LDMOS H BRIDGE CIRCUIT OUT2 OUT3 Motor 1 Motor 2 LGND PGND The information in this document is subject to change without notice. Document No. S12721EJ2V0DS00 (2nd edition) Date Published August 1997 N Printed in Japan © 1997 µPD16823 PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 C2L C1H C1L VM OUT2 VM VDD IN2 IN3 IN1 C2H VG STBY OUT3 PGND OUT1 PGND NC DGND NC 20 19 18 17 16 15 14 13 12 11 INTERNAL CONNECTION VM SW1 LOAD1 Forward OUT1 SW2 LOAD1 SW3 LOAD2 Forward OUT2 SW4 LOAD2 SW5 OUT3 SW6 OUT1 through OUT3 are output pins. GND FUNCTION TABLE Input Signal IN1 L L L H H H × × IN2 H L H H L H L × IN3 L H H L H H L × STBY H H H H H H H L Circuit Operation 1 CH forward mode 1 CH reverse mode 1 CH brake mode 2 CH forward mode 2 CH reverse mode 2 CH brake mode Stop mode Standby mode Charge pump ON/OFF SW1 SW3 SW2 (Di2) SW3 SW5 SW4 (Di4) Current Path →LOAD1 →LOAD1 →LOAD1 →LOAD2 →LOAD2 →LOAD2 →SW4 →SW2 →SW4 →SW6 →SW4 →SW6 2 µPD16823 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) Parameter (Positive) supply voltage Symbol VDD Condition When charge pump operates When charge pump does not operate VM Gate drive voltage Input voltage H bridge drive current Positive: MOS output stage forward current Negative: Output stage diode current Power dissipation Operating temperature Junction temperature Storage temperature PD TA Tj(peak) Tstg VG VIN IDR DC PW ≤ 200 ms, duty cycle ≤ 50% PW ≤ 200 ms, single pulse Ratings –0.5 to +6.5 –0.5 to +8.0 –0.5 to +8.0 15 –0.5 to VDD + 0.5 ± 0.5 ± 1.0 ± 3.0 1.0 –30 to +60 150 –55 to +150 Unit V V V V V A A A W °C °C °C RECOMMENDED OPERATING CONDITIONS (TA = 25 °C) Parameter (Positive) supply voltage Symbol VDD Condition When charge pump operates When charge pump does not operate VM Gate drive voltage Junction temperature VG Tj(peak) Ratings 2.5 to 6.0 2.5 to 7.5 –0.5 to +7.5 11 to 14 125 Unit V V V V °C ELECTRICAL CHARACTERISTICS (TA = –30 °C to +60 °C) Parameter VDD pin current Symbol IDD1 IDD2 VM pin current IM Condition VDD = 5 V, with all control pins at high level VDD = 5 V, with all control pins at low level TA = 25 °C, with all control pins at low level With all control pins at low level H bridge ON resistance Control pin high-level input voltage Control pin low-level input voltage Charge pump circuit turn-off time H bridge circuit turn-ON time H bridge circuit turn-OFF time Regenerative diode voltage drop Control pin input pull-down resistance RON VIH VIL tONC tONH tOFFH VF RIN IF = 0.5 A 25 1.0 50 75 VDD = VM = 5 V C1 = C2 = C2 = 10 nF IDR = 0.5 A 5.0 IDR = 0.5 A, VDD = VM = 5 V, TA = 25 °C VDD × 0.6 VDD × 0.2 1.0 10 0.6 MIN. TYP. MAX. 2.0 10 1.0 10 0.8 Unit mA µA µA µA Ω V V ms µs µs V kΩ 3 µPD16823 TYPICAL CHARACTERISTICS (TA = 25 °C) PT vs. TA Characteristics 1.2 1.0 VDD pin current IDD (mA) Total dissipation PT (W) IDD vs. VDD Characteristics 1.6 All control pins: H level 1.2 0.8 0.6 0.4 0.2 0 0.8 0.4 25 50 75 100 125 150 0 2 4 Supply voltage VDD (V) 6 8 Ambient temperature TA (˚C) IG vs. VG Characteristics 40 35 Gate current IG (µA) H bridge ON resistance RON (Ω) RON vs. VG Characteristics 1.2 VDD = 5 V 1.0 0.8 0.6 0.4 0.2 0 VDD = 5 V 30 25 20 15 10 5 0 5 6 7 8 9 10 11 12 13 14 15 5 10 15 Gate aplied voltage VG (V) Gate applied voltage VG (V) RON vs. TA Characteristics 0.8 H bridge ON resistance RON (Ω) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 –40 –20 0 20 IDR = 0.5 A VDD = VM = 5 V 40 60 80 Ambient temperature TA (˚C) 4 VM = 0.5 to 7.5 V APPLICATION CIRCUIT DIAGRAM C1 = C2 = C3 = 10 nF DC-DC converter Battery VDD = 3.0 to 6.0 V C1 C2 C3 VDD 7 2 3 20 1 VG 19 VM 6 STBY 18 OSC CIRCUIT CHARGE PUMP CIRCUIT 19 VM C4Note 1 to 10 µF CPU IN1 10 IN2 IN3 8 9 CONTROL CIRCUIT LEVEL SHIFT CIRCUIT D MOS FET H BRIDGE CIRCUIT (1.5 circuits) 15 5 17 OUT1 OUT2 OUT3 M M Pull-down resistor: 50 kΩ TYP. 12 14, 16 PGND µPD16823GS DGND IN1 L H IN2 H L H L H Note It is recommended to connect an external IN3 L H L H capacitor of 1 to 10 µ F between VM and GND to protect the gate of the D MOS FET from voltage surge. µPD16823 1CH 1CH Forward mode Reverse mode 1CH Brake mode 2CH Forward mode 2CH Reverse mode 2CH Brake mode The application circuits and their parameters are for reference only and are not intended for use in actual design-ins. 5 µPD16823 PACKAGE DIMENSION 20 PIN PLASTIC SOP (300 mil) 20 11 detail of lead end 1 A 10 H G P I J F K E C D NOTE N M M B L ITEM A B C D E F G H I J K L M N P MILLIMETERS 13.00 MAX. 0.78 MAX. 1.27 (T.P.) 0.40 +0.10 –0.05 0.1±0.1 1.8 MAX. 1.55 7.7±0.3 5.6 1.1 0.20 +0.10 –0.05 0.6±0.2 0.12 0.10 ° 3 ° +7° –3 INCHES 0.512 MAX. 0.031 MAX. 0.050 (T.P.) 0.016 +0.004 –0.003 0.004±0.004 0.071 MAX. 0.061 0.303±0.012 0.220 0.043 0.008 +0.004 –0.002 0.024 +0.008 –0.009 0.005 0.004 ° 3 ° +7° –3 Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition. P20GM-50-300B, C-4 6 µPD16823 RECOMMENDED SOLDERING CONDITIONS It is recommended to solder this product under the conditions shown below. For soldering methods and conditions other than those listed below, consult NEC. For details of the recommended soldering conditions, refer to Information Document “Semiconductor Device Mounting Technology Manual” (C10535E). Symbol of Recommended Soldering IR35-00-2 Soldering Method Infrared reflow Soldering Condition Package peak temperature: 235 °C, Time: 30 seconds MAX. (210 °C MIN.) Number of times: 2 MAX., Number of days: NoneNote, Flux: Rosin-based flux with little chlorine component (chlorine: 0.2 Wt% MAX.) Package peak temperature: 215 °C, Time: 40 seconds MAX. (200 °C MIN.) Number of times: 2 MAX., Number of days: NoneNote, Flux: Rosin-based flux with little chlorine component (chlorine: 0.2 Wt% MAX.) Package peak temperature: 260 °C, Time: 10 seconds MAX., Preheating temperature: 120 °C MAX., Number of times: 1, Flux: Rosin-based flux with little chlorine component (chlorine: 0.2 Wt% MAX.) VPS VP15-00-2 Wave soldering WS60-00-1 Note The number of days during which the product can be stored at 25 °C 65% RH MAX. after the dry pack was opened. Caution Do not use two or more soldering methods in combination. REFERENCE DOCUMENTS Document Name NEC Semiconductor Device Reliability/Quality Control System Guide to Quality Assurance for Semiconductor Devices Safe Operating Area of Power MOS FET Document No. C11745E MEI-1202 TEA-1037 7 µPD16823 No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5 2
UPD16823 价格&库存

很抱歉,暂时无法提供与“UPD16823”相匹配的价格&库存,您可以联系我们找货

免费人工找货