UPD3737

DATA SHEET MOS INTEGRATED CIRCUIT µPD3737 5150-BIT CCD LINEAR IMAGE SENSOR The µ PD3737 is a 5150-bit high sensitivity CCD (Charge Coupled Device) linear image sensor which changes optical images to electrical signal. The µPD3737 has high speed CCD register, so it is suitable for high resolution scanners and facsimiles which scan high definition document at high speed. FEATURES • Valid photocell • Photocell's pitch • High response sensitivity • Peak response wavelength • Resolution • Power supply • Drive clock level • High speed scan • Data rate 5150-bit 7 µm Providing a response 4.3 times better than the existing equivalent NEC product (µPD3571) to the light from a daylight fluorescent lamp 550 nm (green) 16 dot/mm across the shorter side of an A3-size (297 × 420 mm) sheet, 24 dot/mm across the shorter side of an A4-size (210 × 297 mm) sheet +12 V CMOS output under 5V operation 252 µs/line 20 MHz ORDERING INFORMATION Part Number Package CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil) Quality Grade Standard µPD3737D Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications. The information in this document is subject to change without notice. Document No. IC-3352 (O. D. No. IC-8925) Date Published July 1994 P Printed in Japan The mark shows revised points. © 1994 µPD3737 BLOCK DIAGRAM VOD 4 φ1L 12 14 φ1 φR 22 VOUT 18 Optical black (OB) 18 bits, invalid photocell 2 bits, valid photocell 5150 bits, invalid photocell 2 bits 13 φ TG 10 φ 2 2 AGND 5 AGND 9 φ 2L 2 µPD3737 PIN CONFIGURATION (Top View) CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil) No connection 1 NC φR NC 22 Reset gate clock Analog ground 2 AGND 21 No connection No connection 3 NC NC 20 No connection Output unit drain voltage 4 VOD NC 19 No connection Analog ground 5 AGND V OUT 18 Output No connection 6 NC NC 17 No connection No connection 7 NC NC 16 No connection No connection 8 NC NC 15 No connection Last-stage shift register clock 2 9 φ 2L φ2 NC φ1 φ TG φ 1L 14 Shift register clock 1 Shift register clock 2 10 13 Transfer gate clock No connection 11 12 Last-stage shift register clock 1 PHOTOELEMENT STRUCTURE DIAGRAM 5 µm 2 µm 7 µm Channel stopper Aluminum electrode 3 µPD3737 ABSOLUTE MAXIMUM RATINGS (Ta = +25 °C) Parameter Output unit drain voltage Shift register clock voltage Last-stage shift register clock voltage Reset signal voltage Transfer gate signal voltage Operating ambient temperature Storage temperature Symbol VOD Vφ 1, φ 2 Vφ 1L, Vφ 2L Vφ R Vφ TG Topt Tstg Ratings –0.3 to +15 –0.3 to +15 –0.3 to +15 –0.3 to +15 –0.3 to +15 –25 to +55 –40 to +100 Unit V V V V V °C °C RECOMMENDED OPERATING CONDITIONS (Ta = –25 to + 55 °C) Parameter Output unit drain voltage Shift register clock signal high level Symbol VOD Vφ 1H, Vφ 2H, Vφ 1LH, Vφ 2LH Vφ 1L, Vφ 2L, Vφ 1LL, Vφ 2LL Vφ RBH Vφ RBL Vφ TGH Vφ TGL fφ R MIN. 11.4 4.5 TYP. 12.0 5.0 MAX. 12.6 5.5 Unit V V Shift register clock signal low level Reset signal φ R high level Reset signal φ R low level Transfer gate signal high level Transfer gate signal low level Data rate –0.3 0 +0.5 V 4.5 –0.3 4.5 –0.3 0.5 5.0 0 Vφ 1H 0 1 5.5 +0.5 Vφ 1H +0.5 20 V V V V MHz Remark 1. Input reset signal φR to pin 22 via capacitor. Concerning the connection method refer to APPLICATION EXAMPLE. 2. Operating conditions of reset signal φR is not the condition at device pins but the conditions of the signal which applied to capacitor. 3. When VφTGH > Vφ1H, image lag increases. 4 µPD3737 ELECTRICAL CHARACTERISTICS Ta = +25 °C, VDD = 12 V, fφ 1 = 0.5 MHz, data rate = 1 MHz, storage time = 10 ms light source: 3200 K halogen lamp + C500 (infrared cut filter), input clock = 5 VP-P Parameter Saturation voltage Saturation exposure Photo response non-uniformity Average dark signal Dark signal non-uniformity Power consumption Output impedance Response Response peak wavelength Image lag Offset level Input capacity of shift register clock pin Input capacity of last-stage shift register clock pin Input capacity of reset pin Input capacity of transfer gate clock pin Output fall delay time Register imbalance Transfer efficiency Dynamic range Reset feed-through noise Symbol Vsat SE PRNU ADS DSNU PW ZO RF Test Conditions MIN. 1.0 TYP. 1.5 0.2 ±5 1.0 MAX. Unit V lx·s Daylight color fluorescent lamp VOUT = 500 mV Light shielding Light shielding –3 ±10 3.0 +6 % mV mV mW +3 –1 100 0.2 0.5 9 kΩ V/lx·s nm Daylight color fluorescent lamp 6 7.5 550 IL VOS Cφ1 Cφ2 Cφ1L Cφ2L CφR CφTG tdNote RI TTE DR RFSN VOUT = 1 V 2.0 0.3 3.0 800 50 10 150 1 5.0 % V pF pF pF pF ns Time from 90 % to 10 % of φ2L fall is 5ns. VOUT = 500 mV VOUT = 500 mV, fφR1 = 20 MHz Vsat/DSNU Light shielding 92 25 0 98 500 250 500 4 % % times mV Note td is defined as a time from 10 % of φ2L to 10 % of VOUT, output after passing through two steps of emitter follower in the application example. 5 µPD3737 TIMING CHART 1 φ TG φ1 φ2 φR 5181 5182 5183 5184 5185 10 11 12 13 14 15 16 17 18 19 1 2 3 4 5 6 7 8 9 VOUT OB (Optical black) 18 bits Valid photocell 5150 bits Invalid photocell 2 bits Invalid photocell 2 bits 6 5186 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 1 2 3 4 5 6 7 8 9 µPD3737 TIMING CHART 2 t1 90 % 10 % 90 % 10 % t1′ t2′ t2 φ1 φ2 φ 1L φ 2L 90 % 10 % 90 % 10 % t4 t3 t5 t6 td φR 90 % 10 % VOUT 90 % 10 % 7 µPD3737 TIMING CHART for φ TG, φ 1, φ 2 t7 t9 t8 90 % φ TG 10 % t 10 90 % φ1 t 11 φ2 (Unit: ns) Parameter t1, t2 t1′, t2′ t3 t4 t5, t6 t7, t8 t9 t10, t11 MIN. 0 0 15 5 0 0 500 0 TYP. 50 5 50 20 20 50 1000 100 MAX. (150) (25) (500) (500) (50) (100) (5000) (500) Remark The MAX. in the table above shows the operation range in which the output characteristics are kept almost enough for genaral purpose, does not show the limit above which the µPD3737 is destroied. CROSS POINTS for φ 1, φ 2 φ1 CROSS POINTS for φ 1L, φ 2 φ2 2 V or more φ2 2 V or more φ 1L 2 V or more 0.5 V or more CROSS POINTS for φ 1, φ 2L φ1 2 V or more 0.5 V or more φ 2L Remark Adjust cross point of (φ 1, φ 2), (φ 1L, φ 2), (φ 1, φ 2L) by each pin external input resistor. 8 µPD3737 DEFINITIONS OF CHARACTERISTIC ITEMS 1. Saturation voltage: Vsat Output signal voltage at which the response linearity is lost. 2. Saturation exposure: SE Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs. 3. Photo response non-uniformity: PRNU The peak/bottom ratio to the average output voltage of all the valid bits calculated by the following formula. VMAX. or VMIN. PRNU (%) = 1 n ∑V j=1 n –1 x 100 n : Number of valid bits Vj : Output voltage of each bit j V MIN. Register Dark DC level V MAX. 1 n ∑V j=1 n j 4. Average dark signal: ADS Output average voltage in light shielding. ADS(mV) = 1 n ∑V j=1 n j 5. Dark signal non-uniformity: DSNU The difference between peak or bottom output voltage in light shielding and ADS. ADS Register Dark DC level DSNU MIN. DSNU MAX. 9 µPD3737 6. Output impedance: Zo Output pin impedance viewed from outside. 7. Response: R Output voltage divided by exposure (lx•s). Note that the response varies with the light source. 8. Image Lag: IL The rate between the last output voltage and the next one after read out the data of a line. φ TG Light ON OFF VOUT V1 IL = V1 VOUT x 100 (%) VOUT 9. Register Imbalance: RI The rate of the difference between the average of the output voltage of Odd and Even bits, against the average output voltage of all the valid bits. n 2 2 n RI = ∑(V j=1 2 j–1 – V2 j ) x 100 (%) 1 n ∑V j=1 n j 10 µPD3737 STANDARD CHARACTERISTIC CURVES (Ta = 25 °C) DARK OUTPUT TEMPERATURE CHARACTERISTIC 8 2 STORAGE TIME OUTPUT VOLTAGE CHARACTERISTIC 4 1 Relative Output Voltage 2 Relative Output Voltage 0.2 0.1 0 10 20 30 40 50 1 5 Storage Time (ms) 10 Ambient Temperature T a (°C) SPECTRAL RESPONSE CHARACTERISTIC 100 400 600 800 Wavelength (nm) 1 0.5 0.25 0.1 80 Response Ratio (%) 60 40 20 0 1000 1200 11 µPD3737 APPLICATION EXAMPLE +12 V φR + 47 µ F/25 V 4.7 kΩ 47 Ω φ1 φ TG AGND Tr1 1 51 Ω Tr2 Output 1 1 1 φ 1L 1 kΩ 51 Ω AGND 1000 pF AGND 22 φR 21 NC 20 NC 19 NC 18 VOUT 17 NC 16 NC 15 NC 14 φ1 13 φ TG 12 φ 1L 2Ω 10 Ω 10 Ω µ PD3737D NC 1 AGND 2 NC 3 VOD 4 AGND 5 NC 6 NC 7 NC 8 φ 2L 9 φ2 10 NC 11 0.1 µ F + – AGND 10 Ω 2Ω 47 µ F/25 V 2 2 φ2 φ 2L 1. 74AC04 Tr1 2SA1005 2. 74AC04 Tr2 2SC945 12 µPD3737 PACKAGE DIMENSIONS CCD LINEAR IMAGE SENSOR 22PIN CERAMIC DIP (CERDIP) (400mil) (Unit : mm) 1bit 4.9 ± 0.3 1.60±0.25 42.2 ± 0.25 48.6 ± 0.5 9.65 ± 0.3 10.16 (1.95) 4.33 ± 0.5 2.38 ± 0.3 (5.27) 1.02 ± 0.15 0.46 ± 0.06 25.4 2.54 4.68 ± 0.5 0~10° 0.25±0 .05 Name Glass cap Dimensions 47.5×9.25×0.7 Refractive index 1.5 22D-1CCD-PKG7 13 µPD3737 RECOMMENDED SOLDERING CONDITIONS The following conditions (see table below) must be met when soldering this product. For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL” (IEI-1207). Please consult with our sales offices in case other soldering process is used, or in case soldering is done under different conditions. Table 1 Type of Through Hole Device µPD3737D: CCD LINEAR IMAGE SENSOR 22 PIN CERAMIC DIP (CERDIP) (400 mil) Soldering Process Wave soldering (For leads only) Partial heating method Soldering Conditions Solder temperature: 260 ˚C or below, Flow time: 10 seconds or below Pin temperature: 260 ˚C or below, Time: 10 seconds or below Caution Do not jet molten solder on the surface of package. 14 µPD3737 NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be Semiconductor adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. 15 µPD3737 [MEMO] The application circuits and their parameters are for references only and are not intended for use in actual design-in's. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. If customers intend to use NEC devices for above applications or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact our sales people in advance. Application examples recommended by NEC Corporation Standard: Computer, Office equipment, Communication equipment, Test and Measurement equipment, Machine tools, Industrial robots, Audio and Visual equipment, Other consumer products, etc. Special: Automotive and Transportation equipment, Traffic control systems, Antidisaster systems, Anticrime systems, etc. M4 92.6 16