UPD6336

DATA SHEET MOS INTEGRATED CIRCUIT µPD6325, µPD6326, µPD6335, µPD6336 QUAD/OCTAL 6BIT D/A CONVERTER CMOS LSI DESCRIPTION µPD6325 Serise are 6 bit D/A Converter for control volumn, brightness, contrast, color or tone of TV set. The data are transferring serially from micro-computer. µPD6325 Serise Line-up D/A output is consist of Emitter follower buffer Non buffer output QUAD D/A OCTAL D/A µPD6325C, 6325G µPD6335C, 6335G µPD6326C µPD6336C FEATURES • R-2R ladder D/A • Serial Data input (DATA IN, CLOCK, LOAD) • Power supply voltage of interface is 5 V (VCC) and D/A reference voltage is free (VCC to 15 V). ORDERING INFORMATION Part No. Package 16-pin plastic DIP (300 mil) 16-pin plastic SOP (300 mil) 16-pin plastic DIP (300 mil) 16-pin plastic DIP (300 mil) 16-pin plastic SOP (300 mil) 16-pin plastic DIP (300 mil) µPD6325C µPD6325G µPD6326C µPD6335C µPD6335G µPD6336C PIN CONNECTION DIAGRAM (Top View) µ PD6325, µPD6335 VCC DATA IN N.C. CLOCK LOAD N.C. DATA OUT VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 µ PD6326, µPD6336 VCC DATA IN CLOCK LOAD OPTION1 DATA OUT DA8 VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD DA1 DA2 DA3 DA4 N.C. OPTION1 OPTION2 VDD DA1 DA2 DA3 DA4 DA5 DA6 DA7 Document No. G10654EJ6V0DS00 (6th edition) Date Published November 1997 N Printed in Japan © 1995 µPD6325, µPD6326, µPD6335, µPD6336 BLOCK DIAGRAM VCC VCC CLOCK DATA IN LOAD Level Shifter LSB D0 D1 D2 12 bit Shift Resister D3 D4 D5 D6 D7 D8 MSB D9 D10 D11 DATA OUT OPTION2 OPTION1 Latch Line Decoder Level Shifter 6 bit Latch VDD VCC VSS 6 bit R-2R ladder D/A Converter VDD 6 bit Latch 6 bit R-2R ladder D/A Converter VDD A V B A V B DA1 *A ------ µ PD6335, µ PD6336 B ------ µ PD6325, µ PD6326 DA8 µ PD6325, µPD6326 have Quad D/As. 2 µPD6325, µPD6326, µPD6335, µPD6336 PIN CONFIGURATION Pin No. µPD 6325 6335 µPD 6326 6336 Symbol Pin Name Function 1 1 VCC Interface Power Supply This pin is used to interface with the control IC (ex. micro processor). Supply the voltage high level of the control IC. Control data input terminal. Data is read in synchronization with the clocks input to the CLOCK terminal. Data read clock input terminal. The Data input to the DATA IN terminal is read at the leading edge of the clock. This terminal is used to input Load signals after inputting serial data. 12 bit data is read after leading edge of a pulse input to the LOAD terminal. Serial data output terminal. The final stage data of 12 bit shift register appeares on this terminal in synchronization with shift clock. System ground. D7 the data of the shift register appears on this terminal. (Only µPD6325 and µPD6335) D6 the data of the shift register appears on this terminal. Analog Output Analog Output Analog Output Analog Output Analog Output Analog Output Analog Output Analog Output Reference Voltage for D/A converters. Analog output voltage range is GND to VDD. 2 2 DATA IN Serial Data Input 4 3 CLOCK Shift Clock Input 5 4 LOAD Load Pulse Input 7 8 9 10 – – – – 12 13 14 15 16 6 8 – 5 7 9 10 11 12 13 14 15 16 DATA OUT VSS OPTION2 OPTION1 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 VDD Serial Data Output Ground Expantion Output Port Expanttion Output Port Analog Output Channel 8 Analog Output Channel 7 Analog Output Channel 6 Analog Output Channel 5 Analog Output Channel 4 Analog Output Channel 3 Analog Output Channel 2 Analog Output Channel 1 Power Supply 3 µPD6325, µPD6326, µPD6335, µPD6336 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) Supply Voltage Output Voltage Input Voltage Input Current Emitter Follower Current Power Dissipation Operating Temperature Storage Temperature VDD,VCC VOUT VIN IIN IOE PD TA Tstg –0.5 to +18, VCC ≤ VDD –0.5 to VDD +0.5 –0.5 to VCC +0.5 10 10 500*/200** –40 to +85 –65 to +125 *DIP **SOP V V V mA mA mW °C °C RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Voltage Supply Voltage of Interface Low Level Input Voltage High Level Input Voltage Only µPD6325 & µPD6326 Emitter Follower Power Dissipation 1 Emitter Follower Power Dissipation 2 Emitter Follower Power Dissipation 3 Emitter Follower Power Dissipation 4 SYMBOL VDD VCC VIL VIH PE/unit PE/unit PE total PE total 3.5 5 15 25 75 MIN. VCC 4.5 5.0 TYP. MAX. 15 5.5 0.8 UNIT V V V V mW mW mW mW CONDITION VCC ≤ VDD VCC ≤ VDD VCC = 5 V, VDD = 5 to 15 V VCC = 5 V, VDD = 5 to 15 V T A = 8 5 °C T A = 7 0 °C T A = 8 5 °C T A = 7 0 °C TIMING CONDITIONS (TA = –40 to +85 °C, VSS = 0 V, VCC = 5 V, VDD = VCC to 15 V) CLOCK High Level Width CLOCK Low Level Width CLOCK Rise Time CLOCK Fall Time DATA IN Setup Time DATA IN Hold Time Pulse Width, LOAD High LOAD Lead Time LOAD Lag Time tCH tCL tcr tcf tDsetup tDhold tW(LOAD) tLIead tLIag 2 10 4 10 10 4.0 10.0 1.0 1.0 µs µs µs µs µs µs µs µs µs 4 µPD6325, µPD6326, µPD6335, µPD6336 ELECTRICAL CHARACTERISTICS (TA = –40 to +85°C, VSS = 0 V, VCC = 4.5 to 5.5 V, VDD = VCC to 15 V) PARAMETER Current Consumption Current Consumption Current Consumption of Interface Input Leak Current DATA OUT High Level Output Voltage Low Level Output Voltage SYMBOL IDD IDD ICC IILEAK IOH –100 MIN. TYP. MAX. 15 10 10 ±1 UNIT mA mA CONDITION No Load, for µPD6326, 6336 No Load, for µPD6325, 6335 No Load of DATA OUT, Static Consumption VIN = VCC or VSS VOH = VDD –0.5 V µA µA µA µA DATA OUT IOL IOLEAK tDA set 100 20 10 VOL = 0.5 V for µPD6325, 6326 Note Emitter Follower Leak Current Setling Time µA µs Note µPD6325, 6326: RL = 20 kΩ, CL = 50 pF µPD6335, 6336: No Load. 5 µPD6325, µPD6326, µPD6335, µPD6336 DATA CONFIGURATION Data Length is 12 bit. Last LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 First MSB D11 D/A output CONTROL BIT D11 0 0 0 0 0 0 0 0 1 1 D10 0 0 0 0 1 1 1 1 0 × D9 0 0 1 1 0 0 1 1 0 × D8 0 1 0 1 0 1 0 1 0 × Select D/A Don't Care DA1 DA2 DA3 DA4 DA5 DA6 DA7 DA8 Don't Care Target device µ PD6325, 6326 µ PD6335, 6336 µ PD6325, 6326 µ PD6335, 6336 µ PD6325, 6326 µ PD6335, 6336 µ PD6325, 6326 µ PD6335, 6336 µ PD6325, 6326 µ PD6335, 6336 µ PD6326 µ PD6336 µ PD6326 µ PD6336 µ PD6326 µ PD6336 µ PD6326 µ PD6336 µ PD6325, 6326 µ PD6335, 6336 OPTION output CONTROL BIT D7 0 0 1 1 D6 0 1 0 1 OPTION1 out. L H L H OPTION2 out. L L H H Note OPTION2 is only µ PD6325, 6326 OPTION2 is only µ PD6325, 6326 OPTION2 is only µ PD6325, 6326 OPTION2 is only µ PD6325, 6326 D/A Output Voltage CONTROL BIT D5 0 0 0 0 D4 0 0 0 0 D3 0 0 0 0 D2 0 0 0 0 D1 0 0 1 1 D0 0 1 0 1 Output Voltage VDD/64 2 x VDD/64 3 x VDD/64 4 x VDD/64 1 1 1 1 1 1 1 1 1 1 0 1 63 x VDD/64 VDD 6 µPD6325, µPD6326, µPD6335, µPD6336 EQUIVALENT CIRCUIT OF 6 bit D/A LSB D0 D1 D2 D3 D4 MSB D5 2R 2R 2R 2R 2R R R R R R 15 kΩ R 2R D/A OUT 2R Output voltage 1/64 VDD to VDD VDD TIMING CHART MSB DATA IN D11 D10 D9 D8 D3 D2 D1 LSB D0 CLOCK LOAD D/A OUTPUT COMMAND VALID Data is loaded when LOAD is high level. DATA IN tDsetup CLOCK tCL tCH tLlag LOAD tDAset D/A OUTPUT COMMAND VALID tW(LOAD) tL lead tDhold 7 µPD6325, µPD6326, µPD6335, µPD6336 LINIARITY OF D/A OUTPUT (µPD6335, 6336) (TYP.) •TA = –40 °C VE NONL (mV) 60 40 20 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 LSB VDD = 5 V VE NONL (mV) 150 100 50 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 VDD = 10 V LSB 200 VDD = 15 V VE NONL (mV) 150 100 50 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 LSB •TA = 25 °C VE NONL (mV) 60 40 20 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 VDD = 5 V LSB VE NONL (mV) 150 100 50 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 VDD = 10 V LSB 200 VE NONL (mV) VDD = 15 V 150 100 50 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 LSB 8 µPD6325, µPD6326, µPD6335, µPD6336 •TA = 85 °C VE NONL (mV) 60 40 20 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 LSB VDD = 5 V VE NONL (mV) 150 100 50 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 VDD = 10 V LSB VDD = 15 V 200 VE NONL (mV) 150 100 50 0 1 2 3 4 5 6 7 8 16 24 32 40 48 56 64 LSB * VE NONL = (MEASUREMENT VALUE) – (IDEAL VALUE) 9 µPD6325, µPD6326, µPD6335, µPD6336 Characteristics of Emitter follower buffer (µPD6325, 6326) (1) VBE - IE (including R-2R’s resister) 1.0 TA = 25 ˚C VBE (V) 0.5 0 0.01 0.03 0.1 IE (mA) 0.3 1 (2) VBE - TA 1.0 IDA = –100 µA VBE (V) 0.5 0 –40 0 TA (°C) 40 80 10 µPD6325, µPD6326, µPD6335, µPD6336 APPLICATION FOR TV SET +5 V VCC to +15 V +12 V VDD VCC DATA IN VDD DA1 DA2 Video Chroma Signal Processor CPU 17K Series 75X, 78K Series CLOCK DA3 LOAD DA4 GND µ PD6325 or µ PD6326 VSS +12 V Dual ATT. µ PC1406 APPLICATION FOR CASCADE CONNECTING +5 V VCC to +15 V VCC to +15 V VCC to +15 V VDD DATA CPU CLOCK VDD VCC DATA IN DATA OUT VDD VCC DATA IN DATA OUT VDD VCC DATA IN DATA OUT STB GND CLOCK µ PD6325 Series LOAD VSS CLOCK µ PD6325 Series LOAD VSS CLOCK µ PD6325 Series LOAD VSS 11 µPD6325, µPD6326, µPD6335, µPD6336 16PIN PLASTIC DIP (300 mil) 16 9 1 A 8 K I P L J H G F D N M C B M R NOTES 1) Each lead centerline is located within 0.25 mm (0.01 inch) of its true position (T.P.) at maximum material condition. 2) Item "K" to center of leads when formed parallel. ITEM A B C D F G H I J K L M N P R MILLIMETERS 20.32 MAX. 1.27 MAX. 2.54 (T.P.) 0.50±0.10 1.2 MIN. 3.5±0.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 7.62 (T.P.) 6.4 0.25 +0.10 –0.05 0.25 1.0 MIN. 0~15 ° INCHES 0.800 MAX. 0.050 MAX. 0.100 (T.P.) 0.020 +0.004 –0.005 0.047 MIN. 0.138±0.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.300 (T.P.) 0.252 0.010 +0.004 –0.003 0.01 0.039 MIN. 0~15 ° P16C-100-300A,C-1 12 µPD6325, µPD6326, µPD6335, µPD6336 16 PIN PLASTIC SOP (300 mil) 16 9 detail of lead end 1 A 8 H I J F G K E C D M N M B L NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition. ITEM A B C D E F G H I J K L M N P MILLIMETERS 10.46 MAX. 0.78 MAX. 1.27 (T.P.) 0.40 +0.10 –0.05 0.1±0.1 1.8 MAX. 1.55 7.7±0.3 5.6 1.1 0.20 +0.10 –0.05 0.6±0.2 0.12 0.10 ° 3 ° +7° –3 P INCHES 0.412 MAX. 0.031 MAX. 0.050 (T.P.) 0.016 +0.004 –0.003 0.004±0.004 0.071 MAX. 0.061 0.303±0.012 0.220 0.043 0.008 +0.004 –0.002 0.024 +0.008 –0.009 0.005 0.004 ° 3 ° +7° –3 P16GM-50-300B-4 13 µPD6325, µPD6326, µPD6335, µPD6336 REFERENCE Document Name NEC semiconductor device reliability/quality control system Quality grade on NEC semiconductor devices Semiconductor device mounting technology manual Semiconductor device package manual Guide to quality assurance for semiconductor devices Semiconductor selection guide Document No. IEI-1212 C11531E C10535E C10943X MEI-1202 X10679E 14 µPD6325, µPD6326, µPD6335, µPD6336 [MEMO] 15 µPD6325, µPD6326, µPD6335, µPD6336 [MEMO] No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5