0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
UPG100P

UPG100P

  • 厂商:

    NEC(日电电子)

  • 封装:

  • 描述:

    UPG100P - LOW NOISE WIDE-BAND AMPLIFIER - NEC

  • 详情介绍
  • 数据手册
  • 价格&库存
UPG100P 数据手册
LOW NOISE WIDE-BAND AMPLIFIER FEATURES • ULTRA WIDE BAND: 50 MHz to 3 GHz • LOW NOISE: 2.7 dB TYP at f = 50 MHz to 3 GHz • INPUT/OUTPUT IMPEDANCE MATCHED TO 50 Ω Power Gain, GP (dB) 20 UPG100B UPG100P POWER GAIN AND NOISE FIGURE vs. FREQUENCY 10 GP VDD = +5 V, VGG = -5 V TA = -25˚C TA = +25˚C TA = +75˚C • WIDE OPERATING TEMPERATURE RANGE 10 5 DESCRIPTION The UPG100 is a GaAs monolithic integrated circuit designed as a low noise amplifier from 50 MHz to 3 GHz. This device is suitable for low noise IF gain stages in microwave communication and measurement equipment. NF 0 10 20 50 100 200 500 1000 5000 0 Frequency, f (MHz) ELECTRICAL CHARACTERISTICS (TA = 25°C, VDD = +5V, VGG = -5 V, f = 0.05 to 3 GHz, Zs = ZL = 50 Ω) UPG100B, UPG100P B08, CHIP UNITS mA mA dB dB dB dBm dB dB dB °C/W +3 7 7 30 2.7 +6 10 10 40 33 14 MIN 30 TYP 45 0.7 16 ±1.5 3.5 MAX 60 1.5 PART NUMBER PACKAGE OUTLINE SYMBOLS IDD IGG GP ∆GL NF P1dB RLIN RLOUT ISOL RTH (CH-C) PARAMETERS AND CONDITIONS Drain Bias Current (RF off) Gate Bias Current (RF off) Power Gain Flatness Gain Noise Figure Output Power at 1 dB gain compression point Input Return Loss Output Return Loss Isolation Thermal Resistance (Channel to Case) California Eastern Laboratories Noise Figure, NF (dB) • HERMETIC SEALED PACKAGE ASSURES HIGH RELIABILITY UPG100B, UPG100P ABSOLUTE MAXIMUM RATINGS1 SYMBOLS VDD VGG VIN PIN PT Top TSTG PARAMETERS Drain Voltage Gate Voltage Input Voltage Input Power Total Power Dissipation2 Operating Temperature Storage Temperature UNITS V V V dBm W °C °C (TA = 25°C) RATINGS +8 -8 -3 to +0.6 +15 1.5 -65 to +125 -65 to +175 RECOMMENDED OPERATING CONDITIONS SYMBOLS VDD VGG PIN TOP PARAMETERS Drain Voltage Gate Voltage Input Power Operating Temperature UNITS V V dBm °C -50 25 MIN 4.5 -5.5 TYP MAX 5.0 -5.0 5.5 -4.5 10 +80 Notes: 1. Operation in excess of any one of these conditions may result in permanent damage. 2. TCASE (TC) ≤ 125°C TYPICAL PERFORMANCE CURVES (TA = 25°C) INPUT AND OUTPUT RETURN LOSS vs. FREQUENCY 0 0 VDD = +5V VGG = -5V ISOLATION vs. FREQUENCY VDD = + 5 V VGG = - 5 V 10 RLOUT Return Loss, RL (dB) Isolation, ISOL (dB) 500 1000 5000 10 20 20 RLIN 30 30 40 40 50 10 20 50 100 200 10 20 50 100 200 500 1000 5000 Frequency, f (MHz) Frequency, f (MHz) OUTPUT POWER vs. INPUT POWER 2.0 D. C. POWER DERATING CURVE Output Power, POUT (dBm) +10 Total Power Dissipation, PT (W) VDD = +5v VGG = -5V 1.5 f = 1 GHz f = 2 GHz f = 3 GHz 0 1.0 0.5 -10 -20 -10 0 0 50 100 150 200 Input Power, PIN (dBm) Case Temperature, TC (C°) UPG100B, UPG100P TYPICAL PERFORMANCE CURVES (TA = 25°C) 3RD ORDER INTERMODULATION and OUTPUT POWER vs. INPUT POWER 3rd Order Intermodulation, IM3(dBm) 923 MHz P1dB = 8.6 dBm EQUIVALENT CIRCUIT VDD C1 L1 C2 Output Power, POUT (dBm) 10 923 MHz 0 0 2.2 GHz P1dB = 7.3 dBm 2.2 GHz -20 RF1 RL1 R F2 RL2 -10 ∆f = 5 MHz -20 IDD = 42 mA VDD = +5 V VGG = -5 V -20 -10 0 10 -40 IN R1 C3 R2 L2 C4 R4 R5 R6 OUT -60 R3 -30 Input Power, PIN (dBm) VGG TYPICAL SCATTERING PARAMETERS (TA = 25°C) UPG100B VDD = 5.0 V VGG = -5.0 V Frequency GHz 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 MAG 0.301 0.209 0.194 0.186 0.183 0.185 0.182 0.157 0.159 0.138 0.135 0.143 0.150 0.158 0.172 0.189 0.204 0.200 0.216 0.229 0.231 0.226 0.207 0.164 0.212 0.305 S11 ANG -37.5 -32.2 -33.6 -40.0 -55.6 -63.1 -79.7 -94.8 -116.3 -128.1 -142.0 -156.0 -174.3 163.8 154.7 137.1 127.6 111.4 107.3 94.0 83.3 77.8 70.2 75.8 89.0 85.6 MAG 8.5 8.6 8.9 9.0 8.8 8.7 8.7 8.5 8.6 8.4 8.9 8.5 8.3 8.2 8.2 8.0 8.1 7.8 7.8 7.7 7.3 7.3 6.8 6.6 6.8 7.1 S21 ANG 23.6 2.5 -17.8 -30.4 -45.6 -58.1 -71.7 -83.1 -95.5 -109.1 -123.1 -133.7 -148.1 -159.6 -171.5 173.5 162.5 148.6 136.0 123.4 109.8 96.6 84.4 74.8 67.6 51.7 MAG 0.009 0.008 0.008 0.009 0.010 0.009 0.012 0.011 0.009 0.010 0.009 0.009 0.009 0.010 0.011 0.014 0.014 0.015 0.017 0.019 0.022 0.025 0.027 0.031 0.029 0.022 S12 ANG 18.5 7.7 0.1 2.8 -1.5 1.6 -7.3 -20.0 -21.6 -21.9 -9.8 -22.2 1.1 -22.8 -22.0 -29.1 -27.6 -35.1 -35.4 -38.1 -47.6 -55.7 -62.1 -84.1 -100.3 -100.7 MAG 0.094 0.048 0.029 0.026 0.023 0.022 0.030 0.034 0.028 0.028 0.033 0.039 0.039 0.047 0.056 0.062 0.071 0.082 0.088 0.099 0.110 0.118 0.127 0.116 0.070 0.013 S22 ANG -66.4 -61.5 -63.0 -69.6 -83.6 -110.9 -163.1 116.6 79.5 69.1 64.2 52.6 40.8 38.8 34.8 24.8 16.6 9.5 -1.4 -12.2 -25.0 -43.0 -64.2 -99.6 -145.6 176.5 5.9 7.0 6.8 6.0 5.6 6.2 4.7 5.2 6.4 5.9 6.2 6.5 6.6 6.0 5.4 4.3 4.2 4.1 3.6 3.3 2.9 2.6 2.6 2.4 2.5 3.0 k S21 (dB) 18.6 18.7 19.0 19.1 18.8 18.8 18.8 18.6 18.6 18.5 19.0 18.5 18.4 18.2 18.3 18.1 18.2 17.9 17.8 17.7 17.3 17.3 16.7 16.4 16.7 17.1 UPG100B, UPG100P OUTLINE DIMENSIONS (Units in mm) UPG 100B PACKAGE OUTLINE B08 1.27±0.1 1.27±0.1 (LEADS 2, 4, 6, 8) 0.6 4 10.6 MAX 7 IN 100 pF* 1 5 100 pF* OUT 1000 pF TEST CIRCUIT VDD 0.4 (LEADS 1, 3, 5, 7) 3 2 5 3.8±0.2 1 3 2, 4, 6, 8 6 7 8 1000 pF** 3.8±0.2 10.6 MAX 1.7 MAX 0.2 +0.05 -0.02 LEAD CONNECTIONS: 1. INPUT 2. GND 3. VGG 4. GND 5. OUTPUT 6. GND 7. VDD 8. GND VGG * Chip Capacitor **Recommended when cascading UPG100 with NEC's UPG100, 101, 103B's. RECOMMENDED CHIP ASSEMBLY CONDITIONS UPG100P (CHIP) DIE ATTACHMENT Atmosphere: Temperature: AuSn Preform: N2 gas 320± 5°C 0.5 x 0.5 x 0.05t (mm), 1 piece The hard solder such as AuSi or AuGe which has higher melting point than AuSn should not be used. Epoxy Die Attach is not recommended. IN OUT GND VDD GND 1.0 mm Base Material: CuW, Cu, Kovar (Other material should not be used) BONDING GND GND VGG 1.3 mm GND Machine: Thermo-compression bonding. Ultrasonic bonding is not recommended. Wire: 30 µm diameter Au wire, 10 wires Temperature: 260 ± 5°C Strength: 31 ± 3g Atmosphere: N2 gas It is critical that GND points be connected to the ground with the shortest possible wire. Notes: Bonding Pad Size: 100 µm Square Distance between Bonding Pad Outer Edge and Die Edge: 70 µm Typical Chip Thickness: 140± 10 µm EXCLUSIVE NORTH AMERICAN AGENT FOR RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS CALIFORNIA EASTERN LABORATORIES • Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279 24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM PRINTED IN USA ON RECYCLED PAPER -10/97 DATA SUBJECT TO CHANGE WITHOUT NOTICE
UPG100P
1. 物料型号: - UPG100B和UPG100P是两种型号,分别采用B08和CHIP封装。

2. 器件简介: - UPG100是一款砷化镓单片集成电路,设计为50MHz至3GHz的低噪声放大器,适用于微波通信和测量设备的低噪声中频增益阶段。

3. 引脚分配: - 输入(INPUT):引脚1 - 输出(OUTPUT):引脚5 - 地(GND):引脚2、4、6、8 - 栅极电压(VGG):引脚3 - 漏极电压(VDD):引脚7

4. 参数特性: - 工作频率范围:50MHz至3GHz - 低噪声:典型值为2.7dB,适用于f=50MHz至3GHz - 输入/输出阻抗匹配至50Ω - 密封封装确保高可靠性 - 宽工作温度范围

5. 功能详解: - UPG100在25°C下,VDD=+5V,VGG=-5V时的电气特性包括漏极偏置电流(IDD)、栅极偏置电流(IGG)、功率增益(GP)、平坦增益(AGL)、噪声系数(NF)、1dB增益压缩点输出功率(P1dB)、输入回波损耗(RLIN)、输出回波损耗(RLOUT)和隔离度(ISOL)。

6. 应用信息: - UPG100适用于需要低噪声放大的微波通信和测量设备。

7. 封装信息: - UPG100B采用B08封装,UPG100P采用CHIP封装。封装尺寸图和引脚连接图在文档中提供。
UPG100P 价格&库存

很抱歉,暂时无法提供与“UPG100P”相匹配的价格&库存,您可以联系我们找货

免费人工找货