NJG1524APC1

NJG1524APC1 DPDT SWITCH GaAs MMIC n GENERAL DESCRIPTION NJG1524APC1 is a DPDT switch GaAs MMIC. The two same switches are merged into one package and functionally linked. It is useful for switching two circuits in-line. Each switches feature very ow loss, high isolation l and wide frequency coverage from 50MHz to 3GHz at low control voltage of 2.5V. The ultra small & thin FFP16-C1package is adopted. n PACKAGE OUTLINE NJG1524APC1 n FEATURES lSingle low voltage control lLow insertion loss lHigh isolation lHanding power lLow current consumption lUltra small & thin package n PIN CONFIGURATION FFP16 Type (Top View) 16 1 2 3 4 5 6 7 8 15 14 13 +2.5~+6.5V 0.3dB typ.@f=1GHz, PIN=0dBm, each switch 0.5dB typ.@f=2GHz, PIN=0dBm, each switch 42dB typ. @f=2GHz,PC1-PC2 27dB typ.@f=2GHz, PC1-PA1 PC1-PA2, PC2-PB1, PC2-PB2, PA1-PA2, PB1-PB2 20dBm max. @f=2GHz, VCTL=2.7V 16uA typ.@f=2GHz, PIN=10dBm FFP16-C1 (Package size: 2.5x2.5x0.85mm) Pin Connection 1.GND 12 11 10 9 9.GND 10.PC1 11.GND 12.GND 13.PA2 14.VCTL1 2.GND 3.PC2 4.GND 5.PB1 6.NC 7.VCTL1 15.VCTL2 8.PA1 16.PB2 n TRUTH TABLE “H”=VCTL (H), “L”=VCTL (L) VCTL1 VCTL2 PC1 – PA1 PC2 – PB1 PC1 – PA2 PC2 – PB2 H L ON OFF L H OFF ON NOTE: Please note that any information on this catalog will be subject to change. -1- NJG1524APC1 n ABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER Input Power Control voltage Power Dissipation Operating Temp. Storage Temp. SYMBOL PIN VCTL PD Topr Tstg CONDITIONS VCTL (L)=0V, VCTL (H)=2.7V VCTL (H) - VCTL (L) RATINGS 28 7.5 400 -40~+85 -55~+125 UNITS dBm V mW °C °C n ELECTRACAL CHARACTERISTICS (EACH SWITCH) (VCTL (L)=0V, VCTL (H)=2.7V, ZS=ZO=50Ω , Ta=25°C) PARAMETER Operating voltage (L) Operating voltage (H) Control Current Insertion loss1 SYMBOL VCTL (L) VCTL (H) ICTL Loss1 f=2GHz, PIN=10dBm PC1-PA1, PC1-PA2, PC2-PB1, PC2-PB2 ON, f=1GHz, PIN=0dBm PC1-PA1, PC1-PA2, PC2-PB1, PC2-PB2 ON, f=2GHz, PIN=0dBm PC1-PA1, PC1-PA2, PC2-PB1, PC2-PB2 OFF, f=1GHz, PIN =0dBm PC1-PA1, PC1-PA2, PC2-PB1, PC2-PB2 OFF, f=2GHz, PIN =0dBm CONDITIONS MIN -0.2 2.5 - TYP 0 2.7 16 0.3 MAX 0.2 6.5 28 0.6 UNITS V V uA dB Insertion loss2 Isolation1 Isolation2 Loss2 ISL1 ISL2 25.5 25 0.5 27 27 0.8 - dB dB dB Isolation3 Pin at 1dB compression point VSWR (PC, P1, P2) Switch time ISL3 PA1, PA2, PB1, PB2 port 50Ω terminal, PC1-PC2 port, f=2GHz, PIN=0dBm VCTL1=2.7V f=2GHz f=0.05~2GHz, ON State f=0.05~2.5GHz 39 42 - dB P-1dB VSWR TSW 20 - 23 1.3 40 1.6 60 dBm ns -2- NJG1524APC1 n TERMINAL INFORMATION No. 3 5 6 SYMBOL PC2 PB1 NC DESCRIPTIONS Common RF port C2. In order to block the DC bias voltage of internal circuit, an external capacitor is required. RF port B1. This port is connected with PC1 port by controlling VCTL2 to -0.2~+0.2V and VCTL1 to 2.5~6.5V. In order to block the DC bias voltage of internal circuit, an external capacitor is required. No connected terminal. Control port 1. The voltage of this port controls PC1 to PA1/PA2 and PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by controlling voltage of this terminal to high-state (2.5~6.5V) or low-state (-0.2~+0.2V). The voltage of VCTL2 should be set to opposite state. The bypass capacitor should be connected with GND as close as possible for excellent RF performance. RF port A1. This port is connected with PC1 port by controlling VCTL2 to -0.2~+0.2V and VCTL1 to 2.5~6.5V. In order to block the DC bias voltage of internal circuit, an external capacitor is required. Common RF port C1. In order to block the DC bias voltage of internal circuit, an external capacitor is required. RF port A2. This port is connected with PC1 port by controlling V CTL (L) to -0.2~+0.2V and V CTL (H) to 2.5~6.5V. In order to block the DC bias voltage of internal circuit, an external capacitor is required. Control port 1. The voltage of this port controls PC1 to PA1/PA2 and PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by controlling voltage of this terminal to high-state (2.5~6.5V) or low-state (-0.2~+0.2V). The voltage of VCTL2 should be set to opposite state. The bypass capacitor should be connected with GND as close as possible for excellent RF performance. Control port 2. The voltage of this port controls PC1 to PA1/PA2 and PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by controlling voltage of this terminal to high-state (2.5~6.5V) or low-state (-0.2~+0.2V). The voltage of VCTL1 should be set to opposite state. The bypass capacitor should be connected with GND as close as possible for excellent RF performance. RF port B2. This port is connected with PC2 port by controlling VCTL1 to -0.2~+0.2V and VCTL2 to 2.5~6.5V. In order to block the DC bias voltage of internal circuit, an external capacitor is required. Ground terminal. Please connect this terminal with ground plane as close as possible for excellent RF performance. 7 VCTL1 8 10 13 PA1 PC1 PA2 14 VCTL1 15 VCTL2 16 1, 2, 4, 9, 11, 12 PB2 GND -3- NJG1524APC1 n TYPICAL CHARACTERISTICS (50MHz~3GHz, with application circuit, without DC blocking capacitor, losses of circuit are excluded.) PC1-PA1 Insetion Loss vs. Frequency ( VCTL1=2.7V, VCTL2=0V ) 0.0 PC1-PA2 Insetion Loss vs. Frequency ( VCTL1=0V, VCTL2=2.7V ) 0.0 Insertion Loss (dB) -0.5 Insertion Loss (dB) 0.5 1.0 1.5 2.0 2.5 3.0 -0.5 -1.0 -1.0 -1.5 -1.5 -2.0 0.0 -2.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Frequency (GHz) Frequency (GHz) PC1-PA1 Isolation vs. Frequency ( VCTL1=0V, VCTL2=2.7V ) 0 PC1-PA2 Isolation vs. Frequency ( VCTL1=2.7V, VCTL2=0V ) 0 -10 -10 Isolation (dB) -20 Isolation (dB) 0.5 1.0 1.5 2.0 2.5 3.0 -20 -30 -30 -40 -40 -50 0.0 -50 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Frequency (GHz) Frequency (GHz) PC1-PC2 Isolation vs. Frequency ( VCTL1=2.7V, VCTL2=0V ) -20 3.0 PA1 VSWR vs. Frequency ( VCTL1=2.7V, VCTL2=0V ) -30 2.5 Isolation (dB) -40 VSWR 0.5 1.0 1.5 2.0 2.5 3.0 2.0 -50 -60 1.5 -70 0.0 Frequency (GHz) 1.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Frequency (GHz) -4- NJG1524APC1 n TYPICAL CHARACTERISTICS (50MHz~3GHz, with application circuit, without DC blocking capacitor, losses of circuit are excluded.) Output Power ,Insertion Loss vs. Input Power ( PC1-PA1 ,f=2GHz ) 30 VCTL=2.5V VCTL=2.7V VCTL=3.0V VCTL=3.5V VCTL=4.0V VCTL=5.0V VCTL=6.5V Output Power ,Insertion Loss vs. Input Power ( PC1-PA2 ,f=2GHz ) 30 VCTL=2.5V VCTL=2.7V VCTL=3.0V VCTL=3.5V VCTL=4.0V VCTL=5.0V VCTL=6.5V -3.5 -3.5 25 -3.0 25 -3.0 Output Power (dBm) Output Power (dBm) Insertion Loss (dB) 15 -2.0 15 -2.0 10 -1.5 10 -1.5 5 -1.0 5 -1.0 0 -0.5 0 -0.5 -5 10 15 20 25 30 0.0 -5 10 15 20 25 30 0.0 Input Power (dBm) Input Power (dBm) Switching Speed (VCTL=2.7V,Pin=10dBm) VCTL1 40ns PA1port -5- Insertion Loss (dB) 20 -2.5 20 -2.5 NJG1524APC1 n TYPICAL CHARACTERISTICS Insertion Loss vs. Ambient Temperature (PC1-PA2,f=1GHz,Pin=0dBm) -0.2 Insertion Loss vs. Ambient Temperature (PC1-PA2,f=2GHz,Pin=0dBm) -0.2 -0.3 -0.3 Insertion Loss (dB) -0.4 Insertion Loss (dB) -0.4 -0.5 VCTL=2.5V VCTL=2.7V VCTL=3.0V VCTL=3.5V VCTL=4.0V VCTL=5.0V VCTL=6.0V -0.5 VCTL=2.5V VCTL=2.7V VCTL=3.0V VCTL=3.5V VCTL=4.0V VCTL=5.0V VCTL=6.0V -0.6 -0.6 -0.7 -0.7 -0.8 -50 0 50 o 100 -0.8 -50 0 50 o 100 Ambient Temperature ( C) Ambient Temperature ( C) PC1-PA2 Isolation vs. Ambient Temperature ( f=1GHz, VCTL2=0V ) -20 VCTL1=2.5V VCTL1=2.7V VCTL1=6.5V PC1-PA2 Isolation vs. Ambient Temperature ( f=2GHz, VCTL2=0V ) -20 VCTL1=2.5V VCTL1=2.7V VCTL1=6.5V -25 -25 Isolation (dB) -30 Isolation (dB) -50 0 50 o -30 -35 -35 -40 100 -40 -50 0 50 o 100 Ambient Temperature ( C ) Ambient Temperature ( C ) Control Current vs. Ambient Temperature ( PC1-PA2 ,f=1GHz ,Pin=10dBm ) 60 VCTL=2.5V VCTL=2.7V VCTL=3.0V VCTL=3.5V VCTL=4.0V VCTL=5.0V VCTL=6.5V P-1dB vs. Ambient Temperature (PC1-PA2 ,f=2GHz) 28 Control Current (uA) 50 26 40 P-1dB (dBm) 24 30 22 VCTL=2.5V VCTL=2.7V VCTL=3.0V VCTL=3.5V 20 20 10 -50 0 50 o 100 18 -50 0 50 o 100 Ambient Temperature ( C) Ambient Temperature ( C) -6- NJG1524APC1 n APPLICATION CIRCUIT n RECOMMENDED PCB DESIGN PA1 PB1 C6 PC1 C1 C5 C4 PC2 C2 C7 C8 C3 PCB SIZE=26x26mm PCB: FR-4, t=0.5mm CAPACITOR: size 1005 Strip line width=1.0mm Parts table Parts ID 1 fin=50-100 MHz 0.01uF 10pF PA2 VCTL1 VCTL2 PB2 C1~C6 C7,C8 2 fin=0.1-0.5 GHz 1000pF 10pF 3 fin=0.5-2.5 GHz 56pF 10pF PRECAUTION [1]The DC blocking capacitor have to be placed at RF terminal of PC1, PC2, PA1, PA2, PB1, PB2. Please choose appropriate capacitance values to the application frequency. [2]To reduce stripline influence on RF characteristics, please locate bypass capacitors (C7, C8) close to each terminal. [3]For good isolation the GND terminal must be placed possibly close to ground place of substrate, and through holes for GND should be placed near by the pin connection. -7- NJG1524APC1 n PACKAGE OUTLINE (FFP16-C1) 1pin INDEX 0.35 2pin INDEX 0.254±0.1 0.85±0.15 0. 10 0. 30 0. 3 0 2 . 5 ± 0 .1 0 .1 7 UNIT PCB OVER COAT : mm : Ceramic : Epoxy resin : 15mg 0 .5 0 0 .5 0 0.20 TERMINAL TREAT : Au 0.365 0.27 WEIGHT Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. • Do NOT eat or put into mouth. • Do NOT dispose in fire or break up this product. • Do NOT chemically make gas or powder with this product. • To w aste this product, please obey the relating law of y our country. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle with care to avoid these damages . [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -8-