NJG1665MD7

NJG1665MD7

  • 厂商:

    NJRC

  • 封装:

  • 描述:

    NJG1665MD7 - SP5T SWITCH GaAs MMIC - New Japan Radio

  • 详情介绍
  • 数据手册
  • 价格&库存
NJG1665MD7 数据手册
NJG1665MD7 SP5T SWITCH GaAs MMIC ! GENERAL DESCRIPTION The NJG1665MD7 is a GaAS SP5T switch featured low insertion loss, high isolation and small size package, and suited for mobile terminal applications. The NJG1665MD7 switches a path between common RF port and five RF ports by three bit control signal from 1.3V of logical high voltage. In addition, this switch includes ESD protection circuits for good ESD tolerance. The NJG1665MD7 is available in a very small, lead-free, halogen-free, 1.6mm x 1.6mm x 0.397 mm, 14-pin EQFN14-D7 package. ! FEATURES " Low control voltage " Low operating voltage " Low insertion loss " High ESD tolerance " Small and thin package " Lead -free and halogen-free ! PIN CONFIGURATION (Top view) 1 14 13 DECODER ! PACKAGE OUTLINE NJG1665MD7 VCTL(H)=+1.3V min VDD =+2.0~+4.5V 0.40 dB typ. @f=1.0GHz, PIN=23dBm 0.50 dB typ. @f=2.0GHz, PIN=23dBm 0.60 dB typ. @f=2.5GHz, PIN=23dBm On-chip ESD protection circuit EQFN14-D7 (package size: 1.6mm x 1.6mm x 0.397mm typ.) 12 11 2 10 3 9 Pin connection 1. GND 2. VDD 3. P5 4. GND 5. P4 6. P3 7. P2 8. GND 9. P1 10. PC 11. GND 12. CTL3 13. CTL2 14. CTL1 4 5 6 7 8 ! TRUTH TABLE PATH CTL1 CTL2 CTL3 PC-P1 L H L PC-P2 H H L PC-P3 L H H PC-P4 H H H PC-P5 X L L "H"…VCTL(H), "L"…VCTL(L) , “X” …Do not care. NOTE: The information on this datasheet is subject to change without notice Ver. 2009-12-15 -1- NJG1665MD7 ■ ABSOLUTE MAXIMUM RATINGS PARAMETER RF input power Supply voltage Control voltage Power dissipation Operating temp. Storage temp. SYMBOL PIN VDD VCTL PD Topr Tstg CONDITIONS VDD =2.7V, VCTL=0V / 1.8 V VDD terminal CTL1~3 terminals Four-layer FR4 PCB with through-hole (JESD51-5), Tj=150°C (Ta=+25°C, Zs=Zl=50Ω) RATINGS UNITS 30 5.0 5.0 1300 -40~+85 -55~+150 dBm V V mW °C °C ■ ELECTRICAL CHARACTERISTICS (DC) (General conditions: VDD=2.7 V, VCTL(L)=0 V, VCTL(H)=1.8 V, Zs=Zl=50 Ω, Ta=+25°C, with application circuit) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS Supply voltage Operating current Control voltage (LOW) Control voltage (HIGH) Control Current VDD IDD VCTL(L) VCTL(H) ICTL f=2.0GHz, PIN=23 dBm 0 1.3 2.0 2.7 45 1.8 5 4.5 100 0.4 4.5 10 V μA V V μA ■ ELECTRICAL CHARACTERISTICS (RF) (General conditions: VDD=2.7 V, VCTL(L)=0 V, VCTL(H)=1.8 V, Zs=Zl=50 Ω, Ta=+25°C, with application circuit) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS Insertion Loss1 Insertion Loss2 Insertion Loss3 Isolation1 Isolation2 Isolation3 Input Power at 0.2dB Compression Point VSWR Switching Time LOSS1 LOSS2 LOSS3 ISL1 ISL2 ISL3 P-0.2dB VSWR TSW f=1.0 GHz, PIN =23 dBm f=2.0 GHz, PIN =23 dBm f=2.5 GHz, PIN =23 dBm f=1.0 GHz, PIN =23 dBm f=2.0 GHz, PIN =23 dBm f=2.5 GHz, PIN =23 dBm f=2.0 GHz f=2.0 GHz, ON state 50% CTL to 10%/90% RF 25 20 18 26 0.40 0.50 0.60 29 23 21 29 1.2 1 0.60 0.70 0.80 1.5 5 μs dB dB dB dB dB dB dBm -2- NJG1665MD7 ! TERMINAL INFORMATION No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SYMBOL GND VDD P5 GND P4 P3 P2 GND P1 PC GND CTL3 CTL2 CTL1 DESCRIPTION Ground terminal. Connect to the PCB ground plane. Power supply input. This terminal should be connected to GND via a bypass capacitor. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. Ground terminal. Connect to the PCB ground plane. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. Ground terminal. Connect to the PCB ground plane. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. Common RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. Ground terminal. Connect to the PCB ground plane. Control port. “High level” is DC +1.3V~4.5V, “Low level” is DC 0~+0.4V. Control port. “High level” is DC +1.3V~4.5V, “Low level” is DC 0~+0.4V. Control port. “High level” is DC +1.3V~4.5V, “Low level” is DC 0~+0.4V. -3- NJG1665MD7 ■ ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) Loss, ISL vs Frequency (PC-P1 ON, V =2.7V, V 0.0 -0.2 -0.4 DD CTL(H) Loss, VSWR vs Frequency (V =2.7V, V =1.8V, V CTL(L) =0V) 0 -5 -10 0.0 -0.2 -0.4 DD CTL(H) =1.8V, V CTL(L) =0V) 2.0 1.9 1.8 Insertion Loss (dB) Insertion Loss (dB) -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 0.0 0.5 1.0 1.5 2.0 2.5 PC-P2 ISL PC-P1 ON PC-P3 ISL PC-P4 ISL PC-P5 ISL -20 -25 -30 -35 -40 -45 -50 3.0 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 0.0 0.5 1.0 1.5 2.0 PC-P1 ON PC-P2ON PC-P1 ON PC-P2 ON PC-P3ON PC-P3 ON PC-P4ON PC-P4 ON PC-P5 PC-P5ON ON 1.6 1.5 1.4 1.3 1.2 1.1 2.5 1.0 3.0 Frequency (GHz) Frequency (GHz) Output Power, IDD vs Input Power (f=2.0GHz, PC-P1 ON) 30 28 V =2.0V V DD=2.0V DD DD DD Loss, ISL vs Input Power (f=2.0GHz, PC-P1 ON) 0.0 0 100 V =2.5V V DD=2.5V 90 Output Power (dBm) 24 22 20 18 16 14 12 10 10 12 V =4.5V V =3.5V DD DD DD 70 60 50 40 30 20 10 0 DD VDD =3.5V -1.0 V =4.5V VVDD=2.0V =2.0V DD DD =2.5V VVDD=2.5V =2.7V VVDD=2.7V -10 -1.5 V DD=3.5V DD V =4.5V DD DD V =3.5V -15 -2.0 V =4.5V DD -20 -2.5 -25 -3.0 10 12 14 16 18 20 22 24 26 28 30 -30 14 16 18 20 22 24 26 28 30 Input Power (dBm) Input Power (dBm) Switching Time (V =2.7V, CTL2=0V/1.8V, CTL1=0V, CTL3=0V) DD CTL2 Voltage (arb. unit) 1.0μs 0.4μs P1 Port Input...PC Port Time (1μs/div) -4- PC-P2 Isolation (dB) Insertion Loss (dB) 26 V DD =2.7V V =2.7V 80 Operation Current I (μA) -0.5 -5 VSWR:PC Port Isolation (dB) -0.6 -15 -0.6 1.7 NJG1665MD7 ■ ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) Operation Current vs Temperature (f=2.0GHz, PC-P1 ON, P =23dBm) 100 IN Contorol Current vs Temperature (f=2.0GHz, PC-P1 ON, P =23dBm) 50 V CTL(H) CTL(H) CTL(H) CTL(H) CTL(H) IN =1.3V =1.8V =2.7V =3.5V =4.5V Operation Current I (μA) V 80 (μA) 40 V V V DD 60 Control Current I 100 CTL 30 40 V =2.0V DD DD DD DD DD 20 V =2.5V 20 V =2.7V V =3.5V V =4.5V 0 -50 -25 0 25 50 o 10 75 0 -50 -25 0 25 50 o 75 100 Ambient Temperature ( C) Ambient Temperature ( C) LOSS, ISL vs Temperature (f=2.0GHz, PC-P1 ON, P =23dBm) 0.0 -0.2 -0.4 IN VSWR vs Temperature (f=2.0GHz, PC-P1 ON) 0 -3 2.0 1.9 V =2.0V DD DD DD DD DD PC-P2 Isolation (dB) -6 -9 V =2.0V V =2.0V V DD=2.5V DD 1.8 V =2.5V V =2.7V V =3.5V V =4.5V Insertion Loss (dB) VSWR:PC Port -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 -50 -25 0 25 50 o 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 -50 -12 -15 -18 -21 -24 -27 75 -30 100 V DD=2.7V DD V =2.7V DD DD V =2.5V V =3.5V V =3.5V DD DD DD V DD=4.5V V =4.5V -25 0 25 50 o 75 100 Ambient Temperature ( C) Ambient Temperature ( C) P-0.2dB vs Temperature 32 (f=2.0GHz, PC-P1 ON) Switching Time vs Temperature (CTL2=0V/1.8V, CTL1=0V, CTL3=1.8V, PC-P1 rise/fall time) 3.0 V V =2.0V =2.0V DDDD Max Rating=30dBm 30 2.5 V VDD=2.5V =2.5V V DD =2.7V DD =3.5V V DD DD V =2.7V Switching Time ( μs) (dBm) 28 2.0 T V VDD=4.5V =3.5V DD DD rise V =4.5V -0.2dB 26 V =2.0V 24 DD DD DD DD DD 1.5 P V =2.5V V =2.7V V =3.5V V =4.5V 1.0 22 0.5 T fall 20 -50 -25 0 25 50 o 75 100 0.0 -50 -25 0 25 50 o 75 100 Ambient Temperature ( C) Ambient Temperature ( C) -5- NJG1665MD7 ■ APPLICATION CIRCUIT (Top view) CTL1 14 CTL2 13 DECODER CTL3 12 1 VDD C7 1000pF C5 56pF 11 2 10 C6 56pF C1 56pF PC 3 9 P5 4 5 6 C3 56pF 7 8 P1 C4 56pF C2 56pF P4 P3 P2 PARTS LIST Part ID C1~C6 C7 Value 56pF 1000pF Notes MURATA MFG (GRM15) ■ TEST PCB LAYOUT (TOP VIEW) PC GND C6 CTL3 CTL2 CTL1 VDD C7 GND 1pin mark PCB SIZE=39.0 x 20.0mm PCB: FR-4, t=0.2mm CAPACITOR: size 1005 STRIP LINE WIDTH=0.4mm Losses of PCB and Connectors Loss (dB) Freq. (GHz) 1.0 2.0 2.5 PC-P1 PC-P5 PC-P2 PC-P4 PC-P3 P5 C5 C4 C1 C3 C2 P1 0.41 0.62 0.74 0.43 0.65 0.79 0.36 0.52 0.61 P4 P3 P2 PRECAUTIONS [1] The DC blocking capacitors should be placed at RF terminal of P1, P2, P3, P4, P5 and PC. Please choose appropriate capacitance values to the application frequency. [2] The bypass capacitor (C7) should be placed as close as possible to VDD terminal. [3] For good RF performance, all GND terminals are should be connected to PCB ground plane. -6- NJG1665MD7 ■ PACKAGE OUTLINE (EQFN14-D7) Units Board Terminal treat Molding material Weight : mm : Cu : SnBi : Epoxy resin : 3.3mg Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. • Do NOT eat or put into mouth. • Do NOT dispose in fire or break up this product. • Do NOT chemically make gas or powder with this product. • To waste this product, please obey the relating law of your country. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle with care to avoid these damages. [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -7-
NJG1665MD7
物料型号: - 型号:NJG1665MD7

器件简介: - NJG1665MD7是一款基于砷化镓(GaAs)的SP5T开关,特点是低插入损耗、高隔离度和小型封装,适用于移动终端应用。这款开关通过1.3V的逻辑高电平信号控制信号路径在公共射频端口和五个射频端口之间切换。此外,该开关包含ESD保护电路,以提高ESD容忍度。NJG1665MD7采用非常小的无铅、无卤素、1.6mm x 1.6mm x 0.397mm的14引脚EQFN14-D7封装。

引脚分配: - 引脚1:GND(接地端,连接到PCB接地层) - 引脚2:VDD(电源输入端,应通过旁路电容连接到GND) - 引脚3:P5(射频输入/输出端口,需要外部电容以阻断内部电路的直流偏压) - 引脚4:GND(接地端,连接到PCB接地层) - 引脚5:P4(射频输入/输出端口,需要外部电容以阻断内部电路的直流偏压) - 引脚6:P3(射频输入/输出端口,需要外部电容以阻断内部电路的直流偏压) - 引脚7:P2(射频输入/输出端口,需要外部电容以阻断内部电路的直流偏压) - 引脚8:GND(接地端,连接到PCB接地层) - 引脚9:P1(射频输入/输出端口,需要外部电容以阻断内部电路的直流偏压) - 引脚10:PC(公共射频输入/输出端口,需要外部电容以阻断内部电路的直流偏压) - 引脚11:GND(接地端,连接到PCB接地层) - 引脚12:CTL3(控制端口,“高电平”为DC +1.3V~4.5V,“低电平”为DC 0~+0.4V) - 引脚13:CTL2(控制端口,“高电平”为DC +1.3V~4.5V,“低电平”为DC 0~+0.4V) - 引脚14:CTL1(控制端口,“高电平”为DC +1.3V~4.5V,“低电平”为DC 0~+0.4V)

参数特性: - 控制电压:$V_{CTL(H)}=+1.3 V$ 最小值 - 供电电压:$V_{DD}=+2.0\\sim+4.5 V$ - 插入损耗(典型值):1.0 GHz时为0.40 dB,2.0 GHz时为0.50 dB,2.5 GHz时为0.60 dB - 芯片级ESD保护电路 - 封装:EQFN14-D7(封装尺寸:1.6mm x 1.6mm x 0.397mm)

功能详解: - NJG1665MD7通过三个比特的控制信号切换公共射频端口与五个射频端口之间的路径。该开关包括ESD保护电路以提高ESD容忍度,并且采用小型封装。

应用信息: - 该开关适用于移动终端应用。

封装信息: - 封装类型:EQFN14-D7 - 封装尺寸:1.6mm x 1.6mm x 0.397mm
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