NJG1707PG1-C1

NJG1707PG1 800MHz TDMA FRONT-END GaAs MMIC n GENERAL DESCRIPTION NJG1707PG1 is a front-end IC for a digital cellular phone of 800MHz band. A 2x6 antenna switches and a low noise amplifier are included. The parallel control signals of three bits logic connect T/R circuits to internal two antennas or external two antennas. The termination ports with external matching circuits make low interference between diversity antennas. The ultra small & thin FFP32-G1 package is adopted. nFEATURES •Ultra small & thin package •Antenna Switch lLow voltage operation lLow current consumption lLow insertion loss lLow Adjacent Channel Leakage Power •Low Noise Amplifier lLow voltage operation lLow current consumption lSmall signal gain lLow noise figure lHigh input IP3 n PIN CONFIGURATION AN T2 GND n PACKAGE OUTLINE NJG1707PG1 FFP32-G1 (Mount Size: 4.5x4.5x0.85mm) -2.5V (Tx only) and +3.5V 10uA typ. (Tx Mode, Pin=30dBm), 2uA typ. (Rx Mode, Pin=10dBm) 0.5dB typ. @(Tx-ANT1, Tx-EXT1) fin=960MHz, Pin=30dBm -63dBc typ. @ VDD=+3.5V, VSS=-2.5V, fin=960MHz, Pin=30dBm +2.7V typ. +2.7mA typ. 17.5dB typ. @f=820MHz 1.4dB typ. @ f=820MHz IIP3=-4.5dBm typ. OIP3=+13dBm typ. @f=820MHz+820.1MHz FFP32 Type (Top View) AN T1 TE R 2 17 GND GND 24 23 22 21 20 19 18 TER1 GND(LN A) GND RX 25 SW 5 26 SW 6 16 GND 15 TX SW 1 SW 4-1 SW 3 SW 7 14 GND(LN A) 27 SW 8 13 GND LNAIN 28 SW 4-2 EXT1 GND 29 12 SW 9 GND LNAOUT 30 11 SW 2 EXT2 EXTCAP 31 ANT-SW CONTROL VO LTAGE 10 GND VDD A NT-SW GND 32 1 DECO RDER 9 2 3 4 5 6 7 8 G ND GN D GN D C T L1 C T L2 C T L3 GN D VS S -1- NJG1707PG1 nABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER Supply Voltage 1 Supply Voltage 2 Supply Voltage 3 Control Voltage Input Power SYMBOL VDD1 V DD2 VSS VCTL Pin CONDTIONS VDD Terminal LNAOUT Terminal VSS Terminal CTL1, CTL2, CTL3 Terminals TX, ANT1, EXT1 Terminals RX, ANT2, EXT2 Terminals LNAIN Terminal RATINGS 6.0 5.0 -4.0~+0.3 6.0 37 28 10 600 -40~+85 -55~+125 UNITS V V V V dBm dBm dBm mW °C °C Power Dissipation Operating Temperature Storage Temperature PD Topr Tstg n ELECTRICAL CHARACTERISTICS 1 [ANTENNA SWITCH DC CHARACTERISTICS] General Conditions: Ta=25°C, VDD=3.5V, VSS=-2.5V TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω) TER1, TER2 : grounded by 10pF capacitor PARAMETER Positive Supply Voltage Negative Supply Voltage Current Consumption 1 Current Consumption 2 Current Consumption 3 Current Consumption 4 Control Voltage (H) Control Voltage (L) Control Current Control terminal Input Impedance SYMBOL VDD VSS IDD1 ISS1 IDD2 ISS2 VCTL(H) VCTL(L) ICTL Rin CONDITIONS VDD Terminal VSS Terminal VDD Terminal Rx Mode, No RF Signal VSS Terminal Rx Mode, No RF Signal VDD Terminal, fin=0.1~2GHz Tx Mode, Pin=30dBm VSS Terminal, fin=0.1~2GHz Tx Mode, Pin=30dBm CTL1, CTL2, CTL3 Terminals CTL1, CTL2, CTL3 Terminals CTL1, CTL2, CTL3=VDD or CTL1, CTL2, CTL3=0V CTL1, CTL2, CTL3 Terminals MIN 2.7 -3.5 -0.1 -30 2.0 0 -1.3 4 TYP 3.5 -2.5 2.0 10 -10 3.0 0 MAX 5.0 -2.0 5.0 0 30 VDD 0.6 1.3 UNITS V V µA uA uA uA V V uA MΩ * The voltage of this terminal should be supplied before or same time with other DC supplying terminals. (CTL1~3, VSS). - 2- NJG1707PG1 n ELECTRICAL CHARACTRISTICS 2 [Tx Mode] General Conditions: Ta=25°C,VDD=3.5V,VSS=-2.5V, fin=885~940MHz Tested on PCB circuit as shown below. Insertion loss of each connectors, striplines, and capacitors are excluded. TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω) TER1, TER2: grounded by 10pF capacitor. PARAMETER Tx-ANT1 Insertion Loss Tx-EXT1 Insertion Loss Tx-Rx Isolation Tx-ANT1 Isolation Tx-ANT2 Isolation Tx-EXT1 Isolation Tx-EXT2 Isolation Input Power at 0.5dB Compression 1 Adjacent Channel Leakage Power 1 Adjacent Channel Leakage Power 2 2nd Harmonics 1 3rd Harmonics 1 VSWR 1 Switching Time 1 SYMBOL LOSS1 LOSS2 ISL1 ISL2 ISL3 ISL4 ISL5 P-0.5dB(1) ACP1 Pin=30dBm Pin=30dBm CONDITION MIN 24 22 33 21 32 33 - TYP MAX UNITS 0.50 0.50 27 25 38 24 37 35 -63 0.65 0.65 -60 dB dB dB dB dB dB dB dBm dBc Pin=30dBm Tx-ANT1, Tx-EXT1 passing Pin=30dBm Tx-EXT1 passing Pin=30dBm Tx-ANT1, Tx-EXT1 passing Pin=30dBm Tx-ANT1 passing Pin=30dBm Tx-ANT1,Tx-EXT1 passing Tx-ANT1,Tx-EXT1 passing PDC Standard, ±50kHz offset Pin=30dBm Input Signal ACP=-64dBc @ 30dBm PDC Standard, ±100kHz offset Pin=30dBm Input Signal ACP=-76dBc @ 30dBm Pin=30dBm Input Signal 2nd Harmonics=-70dBc Pin=30dBm Input Signal 3rd Harmonics=-100dBc ACP2 2f0(1) 3f0(1) VSWR1 T D1 - -74 -65 -64 1.2 120 -70 -63 -62 1.5 500 dBc dBc dBc Tx-ANT1, Tx-EXT1 passing CTL1~3 nsec -3- NJG1707PG1 n ELECTRICAL CHARACTRISTICS 3 [Rx Mode] General Conditions: Ta=25°C, VDD=3.5V, VSS=0V, fin=810~885MHz Tested on PCB circuit as shown below. Insertion loss of each connectors, striplines, and capacitors are excluded. TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω) TER1, TER2: grounded by 10pF capacitor. PARAMETER Rx-ANT1 Insertion Loss Rx-ANT2 Insertion Loss Rx-EXT1 Insertion Loss Rx-EXT2 Insertion Loss Rx-ANT1 Isolation Rx-ANT2 Isolation Rx-EXT1 Isolation Rx-EXT2 Isolation Input Power at 1dB Compression 1 VSWR 2 Switching Time 2 SYMBOL LOSS3 LOSS4 LOSS5 LOSS6 ISL6 ISL7 ISL8 ISL9 P-1dB(1) VSWR2 T D2 Pin=10dBm Pin=10dBm Pin=10dBm Pin=10dBm Pin=10dBm Rx-ANT2, Rx-EXT1, Rx-EXT2 passing CONDITION MIN 22 24 22 22 21 - TYP 0.65 0.60 0.70 0.65 26 30 26 26 26 1.2 120 MAX 0.80 0.75 0.85 0.80 1.6 500 UNITS dB dB dB dB dB dB dB dB dBm Pin=10dBm Rx-ANT1, Rx-EXT1, Rx-EXT2 passing Pin=10dBm Rx-ANT1, Rx-ANT2, Rx-EXT2 passing Pin=10dBm Rx-ANT1, Rx-ANT2, Rx-EXT1 passing Rx-ANT1, Rx-ANT2, Rx-EXT1, RxEXT2 passing RX-ANT1, RX-ANT2, RX-EXT1, RXEXT2 passing CTL1~3 nsec n ELECTRICAL CHARACTRISTICS 4 [LNA] General Conditions: Ta=25°C, VDD=3.5V, VSS=0V, fin=820MHz Tested on PCB circuit as shown below. PARAMETER Operation Frequency Drain Voltage Current Consumption Small Signal Gain Gain Flatness Noise Figure Pout at 1dB Gain Compression Point Input 3rd order Intercept Point LNAIN Port VSWR LNAOUT Port VSWR SYMBOL fRF VDD3 IDD3 Gain Gflat NF P-1dB(2) IIP3 VSWRi VSWRo fRF=810~885MHz No RF input CONDITION MIN 810 2.5 16.0 -3.0 -8.0 TYP 2.7 2.7 17.5 0.5 1.4 +1.0 -4.5 1.5 1.5 MAX 885 4.5 3.6 18.5 1.0 1.6 2.5 2.5 UNITS MHz V mA dB dB dB dBm dBm - 4- NJG1707PG1 n TERMINAL INFORMATION PIN NO. 4 5 6 7 SYMBOL CTL1 CTL2 CTL3 VSS DESCRIPTIONS Control signal input terminal of high impedance C-MOS logic. Logic level: High; more than +2V, Low; 0~+0.6V. Please connect to GND or VDD with 100kΩ if potential is open or uncertain. Negative supply terminal. Negative voltage of -3.5~-2.0V must be supplied on Tx mode. This terminal is isolated on Rx mode, so open or –2.5~0V condition can be used. Please connect bypass capacitor with GND to keep RF performance. Positive supply terminal. The voltage of this terminal should be supplied before or same time with other DC supplying terminals (CTL1~3, VSS). The bias voltage should be +2.7~+5.0V. Please connect bypass capacitor with GND to keep RF performance. RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. Tx power input terminal. A DC cut capacitor is required to block VDD voltage, and also an external matching circuit is required to improve VSWR(See Application circuit). A termination terminal for ANT1 in case ANT2 is in use. The influence of ANT1 against ANT2 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage. RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. Rx output terminal. A DC cut capacitor is required to block VDD voltage, and also an external matching circuit is required to improve VSWR(See Application circuit). RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. A termination terminal for ANT2 in case ANT1 is in use. The influence of ANT2 against ANT1 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage. Ground terminal of LNA. Please place ground plane close to this pin for good RF performance. LNA input terminal. An external matching circuit is required. LNA output terminal. An external matching circuit with LNA biasing element L3, L4 as in application circuit is required. Bypass capacitor terminal of LNA. Please place C9 as in application circuit close to this terminal. Ground terminal. Please connect to ground plane as close as possible for good RF performance. 9 11 13 15 17 19 21 23 25 26,27 28 30 31 1,2,3,8,10, 12,14,16,1 8,20,22,24, 29,32 VDD EXT2 EXT1 TX TER2 ANT1 RX ANT2 TER1 GND(LNA) LNAIN LNAOUT EXTCAP GND n TRUTH TABLE ”H”=VCTL (H), ”L”=VCTL (L), ”X”=H or L CONTROL INPUT ROUTE Tx-ANT1 Tx-EXT1 Rx-ANT1 Rx-ANT2 Rx-EXT1 Rx-EXT2 Tx/Rx CTL1 H H L L L L Diversity IN/OUT CTL2 X X L H L H CTL3 H L H H L L CONTROL OUTPUT SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9 OFF OFF OFF OFF OFF OFF OFF ON OFF ON ON ON OFF OFF ON ON ON ON ON ON OFF OFF OFF ON OFF ON ON ON ON ON ON OFF ON ON ON ON ON ON ON ON OFF ON OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF -5- NJG1707PG1 n TYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. ANT SW Loss,V.S.W.R vs. Frequency (Thru:TX-ANT1,V =3.5V,V =-2.5V) 0 DD SS ANT SW Loss,V.S.W.R vs. Frequency (Thru:TX-EXT1,V =3.5V,V =-2.5V) 1.8 0 DD SS 1.8 Loss -0.5 Insertion Loss (dB) 1.6 Insertion Loss (dB) -0.5 Loss 1.6 V.S.W.R -1 1.4 -1 1.4 -1.5 V.S.W.R -2 500 1.2 -1.5 V.S.W.R 1.2 600 700 800 900 1 1000 -2 500 600 700 800 900 1 1000 Frequency (MHz) Frequency (MHz) ANT SW Loss,V.S.W.R vs. Frequency 0 (Thru:RX-ANT1,VDD=3.5V,V SS=0V) 1.8 0 ANT SW Loss,V.S.W.R vs. Frequency (Thru:RX-ANT2,V =3.5V,V =0V) DD SS 1.8 Insertion Loss (dB) Insertion Loss (dB) -0.5 Loss 1.6 -0.5 Loss 1.6 V.S.W.R -1 1.4 -1 1.4 -1.5 V.S.W.R 1.2 -1.5 V.S.W.R 1.2 -2 500 600 700 800 900 1 1000 -2 500 600 700 800 900 1 1000 Frequency (MHz) Frequency (MHz) ANT SW Loss,V.S.W.R vs. Frequency (Thru:RX-EXT1,V =3.5V,V =0V) 0 DD SS ANT SW Loss,V.S.W.R vs. Frequency (Thru:RX-EXT2,V =3.5V,V =0V) 1.8 0 DD SS 1.8 -0.5 Insertion Loss (dB) Loss 1.6 Insertion Loss (dB) -0.5 Loss 1.6 V.S.W.R -1 1.4 -1 1.4 -1.5 V.S.W.R 1.2 -1.5 V.S.W.R 1.2 -2 500 600 700 800 900 1 1000 -2 500 600 700 800 900 1 1000 Frequency (MHz) Frequency (MHz) - 6- V.S.W.R V.S.W.R V.S.W.R NJG1707PG1 n TYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. ANT SW Isolation vs. Frequency (Thru:TX-ANT1 , V =3.5V , V =-2.5V) -10 -20 -30 -40 TX-EXT2 Isolation DD SS ANT SW Isolation vs. Frequency (Thru:TX-EXT1 , V =3.5V , V =-2.5V) -20 -25 DD SS TX-EXT1 Isolation TX-RX Isolation TX-ANT1 Isolation -30 Isolation (dB) -35 -40 -45 -50 TX-EXT2 Isolation TX-RX Isolation Isolation (dB) -50 -60 -70 500 TX-ANT2 Isolation TX-ANT2 Isolation -55 -60 500 600 700 800 Frequency (MHz) 900 1000 600 700 800 Frequency (MHz) 900 1000 ANT SW Isolation vs. Frequency (Thru:RX-ANT1 , V =3.5V , V =0V) -20 DD SS ANT SW Isolation vs. Frequency (Thru:RX-ANT2 , V =3.5V , V =0V) -20 DD SS -25 Isolation (dB) RX-EXT1 Isolation -25 Isolation (dB) RX-EXT2 Isolation -30 RX-EXT2 Isolation -30 RX-EXT1 Isolation -35 RX-ANT2 Isolation -35 RX-ANT1 Isolation -40 500 600 700 800 Frequency (MHz) 900 1000 -40 500 600 700 800 Frequency (MHz) 900 1000 ANT SW Isolation vs. Frequency (Thru:RX-EXT1 , V =3.5V , V =0V) -20 DD SS ANT SW Isolation vs. Frequency (Thru:RX-EXT2 , V =3.5V , V =0V) -20 DD SS -25 Isolation (dB) RX-ANT1 Isolation -25 Isolation (dB) -30 RX-EXT2 Isolation RX-ANT2 Isolation -30 RX-ANT1 Isolation RX-ANT2 Isolation -35 -35 RX-EXT1 Isolation -40 500 600 700 800 Frequency (MHz) 900 1000 -40 500 600 700 800 Frequency (MHz) 900 1000 -7- NJG1707PG1 n TYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. ANT-SW Pout,Loss vs. Pin (TX-ANT1,fin=960MHz,V =3.5V,V =-2.5V) 40 35 30 Output Power (dBm) 25 20 15 10 5 0 0 5 10 15 20 25 30 Input Power (dBm) 35 40 DD SS I 1.2 1.1 50 1 Insertion Loss (dB) 40 (uA) 0.9 0.8 0.7 0.6 10 0.5 0.4 0 0 5 60 DD2 vs. Input Power DD SS ( Tx-ANT1,V =3.5V,V =-2.5V,f=960MHz) I 20 DD2 30 10 15 20 25 Input Power (dBm) 30 35 40 ANT-SW Pout,Loss vs. Pin (RX-ANT1,fin=885MHz,V =3.5V,V =0V) 35 30 25 20 15 10 5 0 0 5 10 15 20 25 Input Power (dBm) 30 35 DD SS I 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0 0 5 6 DD1 vs. Input Power DD SS ( Rx-ANT1,V =3.5V,V =0V,f=885MHz) 5 Output Power (dBm) Insertion Loss (dB) 4 (uA) I 2 1 DD1 3 10 15 20 25 Input Power (dBm) 30 35 2nd Harmonics vs. Frequency (Tx-ANT1,Pin=30dBm,V =-2.5V) -60 VDD=3.5V VDD=2.9V 2nd Harmonics (dBc) -65 3rd Harmonics (dBc) -65 SS 3rd Harmonics vs. Frequency (Tx-ANT1,Pin=30dBm,V =-2.5V) -60 SS -70 -70 VDD=3.5V VDD=2.9V -75 880 900 920 940 960 980 -75 880 900 920 940 960 980 Frequency (MHz) Frequency (MHz) - 8- NJG1707PG1 n TYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit, losses of circuits are eliminated. Loss vs. Temperature 1.0 (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) SS Loss vs. Temperature (Rx-ANT1,f=885MHz,Pin=10dBm,V =0V) 1.0 VDD=3.5V 0.8 Insertion Loss(dB) VDD=2.9V SS VDD=3.5V 0.8 Insertion Loss(dB) VDD=2.9V 0.6 0.6 0.4 0.4 0.2 0.2 0.0 -50 0 50 o Ambient Temperature( C) 100 0.0 -50 0 50 o Ambient Temperature( C) 100 Rx Isolation vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) 32 VDD=3.5V 30 VDD=2.9V 28 SS EXT1 Isolation vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) 30 VDD=3.5V VDD=2.9V SS Isolation(dB) 28 Isolation(dB) -50 0 50 o Ambient Temperature( C) 100 26 26 24 24 22 22 20 -50 0 50 o Ambient Temperature( C) 100 P 40 -0.5dB vs. Temperature SS I 20 DD2 vs. Temperature DD ss (Tx-ANT1,f=960MHz,V =-2.5V) VDD=3.5V 38 VDD=2.9V 15 (dBm) 36 ( Tx-ANT1,fin=960MHz,Pin=30dBm,V =3.5V,V =-2.5V ) VDD=3.5V VDD=2.9V (uA) I DD2 -0.5dB 10 P 34 5 32 30 -50 0 50 o Ambient Temperature( C) 100 0 -50 0 50 o 100 Ambient Temperature( C) -9- NJG1707PG1 n TYPICAL CHARACTERISTICS (ANTENNA SWITCH) Measured on the PCB evaluation circuit. ACP(100kHz) vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) -65 VDD=3.5V VDD=2.9V ACP offset:100kHz (dBc) -70 SS ACP(50kHz) vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) -55 VDD=3.5V VDD=2.9V ACP offset:50kHz (dBc) -60 SS -65 -75 -70 -50 0 50 o 100 -80 -50 Ambient Temperature ( C) 0 50o Ambient Temperature ( C) 100 2nd Harmonics vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) -60 SS 3rd Harmonics vs. Temperature (Tx-ANT1,f=960MHz,Pin=30dBm,V =-2.5V) -60 VDD=3.5V VDD=2.9V SS 2nd Harmonics (dBc) -65 3rd Harmonics (dBc) VDD=3.5V VDD=2.9V 0 50 o Ambient Temperature ( C) 100 -65 -70 -70 -75 -50 -75 -50 0 50 o Ambient Temperature ( C) 100 - 10- NJG1707PG1 n TYPICAL CHARACTERISTICS (LNA) Measured on the PCB evaluation circuit. LNA NF,Gain vs. Frequency (V 19 DD3 LNA Gain,NF vs. V 2 19 (f=820MHz) =2.7V,I DD3 =2.7mA) DD3 2 18 GAIN 1.8 18 Gain 1.8 Gain (dB) NF(dB) Gain (dB) 16 NF 1.4 16 NF 1.4 15 1.2 15 1.2 14 750 800 850 900 Frequency (MHz) 1 950 14 2.5 1 3 3.5 V DD3 4 (V) 4.5 5 LNA I 5 DD3 ,P-1dB vs. V DD3 LNA Pout,IM3 vs. Pin (V 6 10 0 P-1dB Output Power (dBm) Pout DD3 (f=820MHz) P-1dB =2.7V,I DD3 =2.7mA,f=820+820.1MHz) 4.5 4 (mA) 3.5 I DD3 4 2 0 -2 -4 -6 3 3.5 V DD3 Output Power,IM3 (dBm) -10 -20 -30 -40 -50 -60 -70 -40 -35 -30 -25 -20 -15 Input Power (dBm) -10 -5 0 IM3 I DD3 3 2.5 2 2.5 4 (V) 4.5 5 LNA IIP3,OIP3 vs. V 4 2 0 IIP3 (dBm) -2 -4 -6 -8 -10 2.5 IIP3 DD3 ANT SW - LNA OUT Isolation vs. Frequency ( RX and LNAin :50ohm terminated,V =3.5V , V =0V) 18 16 14 Isolation (dB) 12 10 8 6 -80 4 OIP3 (dBm) -50 RX-ANT1 Thru (f=820+820.1MHz,Pin=-30dBm) -30 DD SS RX-ANT2 Thru OIP3 -40 RX-EXT1 Thru -60 -70 RX-EXT2 Thru 3 3.5 V DD3 4 (V) 4.5 5 100 200 300 400 500 600 700 Frequency (MHz) 800 900 1000 - 11 - NF (dB) 17 1.6 17 1.6 NJG1707PG1 n TYPICAL CHARACTERISTICS (LNA) Measured on the PCB evaluation circuit. VDD3=2.7V - 12- NJG1707PG1 n TYPICAL CHARACTERISTICS (LNA) Measured on the PCB evaluation circuit. LNA Gain,I (V 19 DD3 vs. Temperature 4.5 2 1.8 LNA NF vs. Temperature (V DD3 DD3 =2.7V,f=820MHz) =2.7V,f=820MHz) 18 Gain (dB) 4 1.6 (mA) NF (dB) 1.4 1.2 16 3 1 0.8 -50 15 -50 0 50 o 2.5 100 I DD3 17 3.5 Ambient Temperature ( C) 0 50 o Ambient Temperature ( C) 100 LNA P-1dB vs. Temperature (V 5 DD3 LNA IIP3,OIP3 vs. Temperature (V 2 1 DD3 =2.7V,f=820MHz) =2.7V,f=820.0+820.1MHz,Pin=-30dBm) 16 15 14 OIP3(dBm) 13 12 11 10 9 8 100 4 0 P-1dB(dBm) IIP3(dBm) 0 50 o Ambient Temperature ( C) 100 3 -1 -2 -3 -4 1 -5 0 -50 -6 -50 0 50 o Ambient Temperature ( C) 2 - 13 - NJG1707PG1 n TYPICAL CHARACTERISTICS (LNA) LNA Scattering Parameter Table Freq. (GHz) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 S11 mag. ang. (unit) (deg.) 1.000 -2.22 0.987 -5.10 0.985 -7.12 0.987 -10.49 0.967 -12.19 0.967 -15.33 0.943 -17.89 0.928 -20.65 0.911 -23.45 0.894 -26.19 0.882 -28.43 0.867 -30.91 0.861 -33.29 0.853 -35.74 0.848 -37.65 0.843 -39.63 0.834 -41.23 0.832 -42.72 0.823 -43.91 0.816 -44.93 S21 mag. ang. (unit) (deg.) 2.147 176.00 2.087 168.16 2.053 161.77 2.079 154.25 2.020 147.74 1.998 141.28 1.947 134.57 1.899 128.63 1.845 122.18 1.795 116.45 1.723 111.16 1.675 105.79 1.613 100.76 1.556 95.80 1.498 90.90 1.442 86.45 1.384 82.25 1.344 78.49 1.288 74.67 1.253 71.30 S12 mag. ang. (unit) (deg.) 0.009 48.67 0.008 38.98 0.005 68.44 0.010 61.48 0.008 58.51 0.007 57.29 0.010 62.79 0.010 57.35 0.013 61.22 0.013 64.15 0.013 68.15 0.014 66.63 0.014 69.43 0.015 65.80 0.015 69.41 0.017 75.17 0.018 76.93 0.018 80.33 0.021 84.19 0.022 82.05 S22 mag. ang. (unit) (deg.) 0.949 -1.04 0.940 -3.71 0.954 -4.61 0.940 -7.50 0.939 -8.86 0.931 -11.32 0.921 -13.70 0.918 -15.28 0.924 -18.33 0.914 -20.15 0.923 -22.40 0.910 -24.64 0.927 -26.98 0.916 -28.74 0.921 -30.73 0.915 -32.14 0.913 -33.86 0.913 -35.13 0.908 -36.37 0.912 -37.14 VDD3=2.7V, IDD3=3mA, Zo=50Ω - 14- NJG1707PG1 nRECOMMENDED CIRCUIT (Tx-ANT1 PASSING) PRECAUTIONS Please connect resistors R1~R3 between VCTL1~VCTL3 terminals (Pin#4, 5, 6) and GND or VDD only when CTL1~CTL3 voltage is required to clip to H or L level. - 15 - NJG1707PG1 n RECOMMENDED PCB DESIGN Board total loss (Capacitors, Connectors, and PCB) Frequency Pass route 800MHz band (dB) (MHz) TX-ANT1 0.30 960 TX-EXT1 0.26 RX-ANT1 0.28 RX-ANT2 0.29 885 RX-EXT1 0.32 RX-EXT2 0.37 PARTS LIST PARTS ID R1-R3 C1~3, C9 C4, C5, C7, C8 C10, C12 C11 C13 L1 L2 L3 L4 L5 L6 VALUE 100Ω 1000pF 22pF 10pF 16pF 4pF 27nH 33nH 27nH 12nH 15nH 22nH COMMENT 1005 Size MURATA(GRM36) MURATA(GRM36) MURATA(GRM36) MURATA(GRM36) MURATA(GRM36) TAIYO-YUDEN(HK1608) TAIYO-YUDEN(HK1005) TAIYO-YUDEN(HK1005) TAIYO-YUDEN(HK1005) TAIYO-YUDEN(HK1005) TAIYO-YUDEN(HK1005) PRECAUTIONS [1] The bypass capacitors should be connected to the VDD, VSS terminals as close as possible respectively. [2] For good RF performance, the ground terminals should be directly connected to the ground patterns and through-holes as close as possible by using relativity wide pattern. - 16- NJG1707PG1 n PACKAGE OUTLINE (FFP32-G1) 1pin INDEX 2pin INDEX 0.35 0.254±0.1 0.85±0.15 0 .1 0 0 .3 0 0 .3 0 0 .1 7 0.20 0 .5 0 .5 3 . 5 ±0 . 1 0.365 0.27 UNITS PCB OVER COAT LEAD SURFACE WEIGHT : mm : Ceramic : Epoxy resin : Au : 30mg Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. • Do NOT eat or put into mouth. • Do NOT dispose in fire or break up this product. • Do NOT chemically make gas or powder with this product. • To waste this product, please obey the relating law of your country. [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle - 17 -