NJW1303
SYNCHRONOUS SEPARATOR WITH COUNT DOWN
TGENERAL DESCRIPTION The NJW1303 is a synchronous separator performs Horizontal and Vertical synchronous signal from composit video signals. It contains count down circuit for H,V keeping high sync separation in the weak signal. It is suitable for car navigation and LCD TV. TPACKAGE OUTLINE
NJW1303V
TFEATURES + §Operating Voltage V =2.7V to 5.3V + §Operating Current 5mA typ. at V =5V §Output for HD,VD,C sync §unnecessary adjustment of oscillation frequency for internal count down circuit §Internal BGP §Bi-CMOS Technology §Package Outline SSOP14 TPIN FUNCTION, BLOCK DIAGLAM
Vcc +
14
Vcc
3
GND
13
DIGREF
6
VS Reg
V Sync Sep
V count down BGP Generator H count down
4 8 5
VD BGP HD
7
Sync IN
2
Sync Sep
1
Phase Det
12 9
32fH VCO
10 11
SW
C Sync OUT
LPF
VCO Out
VCO Filter 2
VCO Filter 1
Ver.4 -1-
NJW1303
T ABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER SYMBOL RATINGS + Supply Voltage V 8.0 Power Dissipation PD 300 Operating Temperature Range Topr -40 to +85 Storage Temperature Tstg -40 to +125 T RECOMMENDED OPERATING CONDITION PARAMETER SYMBOL RATINGS Supply Voltage Vopr 2.7 to 5.3
+
UNIT V mW °C °C
UNIT V
T ELECTRICAL CHARACTERISTICS ( V =5V, Ta=25°C) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. Operating Current ICC No input signal 3.3 5.0 7.5 Measure the Input connect to GND AFC Free Run Frequency fOH 15.654 15.734 15.814 under 300ohm Miss lock to high frequency +600 +700 ∆fHL1 AFC Lock Range Miss lock to Low frequency -700 -600 ∆fHL2 Capture from high frequency +600 +700 ∆fHP1 AFC Capture Range Capture from Low frequency -700 -600 ∆fHP2 PwHD Input Signal Horizontal Output 3.5 3.9 4.3 Pulse Width 4.8us
286mVpp
UNIT mA kHz Hz Hz us
Horizontal Output Delay
TpDH
Output Signal TpDH PwHD
0.48
0.64
0.8
us
Horizontal Output Saturation Level
VoLH
VoLH 0V *point1
-0.2
0.1
0.3
V
Horizontal AFC Keep Limit Input
VINGM
Input is Color Bar of 1Vpp,and Horizontal signal of 4.8 uS pulth width. ATT less of miss lock Sync at valuable of input signal level.
Input Signal 4.8us
-
-
-20
dB
BGP Pulse Width
PwGP
286mVpp TpDG
3.1
3.6
4.1
us
Output Signal PwGP 0V *point1
BGP Delay
TpDG
0.35
0.6
0.85
us
BGP Limit Input
VMINBGP
Input is Color Bar of 1Vpp,and Horizontal signal of 4.8 uS pulth width. ATT less of changeable BGP output at less of input signal level.
-
-
-17
dB
Ver.4 -2-
NJW1303
T ELECTRICAL CHARACTERISTICS ( V =5V, Ta=25°C) PARAMETER SYMBOLS TEST CONDITIONS Vertical Output Pulse Width Vertical Output Delay Vertical Output Saturation Level C.SYNC Output Delay C.SYNC Output Saturation Voltage *point PwVD *point TpVD VLVD TpCS VLCS Low level of Vertical output 0.47 0.32 0.66 0.2 0.5 0.2 0.85 0.5 0.64 0.5 H V us V
+
MIN. 2.5
TYP. 3.0
MAX. 3.5
UNIT H
Equivalent Palse
Vertical Sync.Pulse
Equivalent Palse
Signal Input Signal
VD Output TpVD
*When measure of pulse timing
50%
50%
50%
50%
Ver.4 -3-
NJW1303
TTEST CIRCUIT
910kΩ TPV (VCC) 360Ω 330pF 3 100uF 68000pF 4 5 6 7 VD HD DIGREF SW VCOFIL1 VCOFIL2 VCOOUT BGP 11 1.8kΩ 10 390Ω 9 8 1000pF 150pF VCC LPF 12 1kΩ 1 1uF 2 SYNCIN GND 13 15000pF 3kΩ 4.7uF CSYNCOUT VS 14 1uF
*1
*2
*1: CSBLA503KE5ZF10 at MURATA *2: NTSC/PAL SW NTSC : GND PAL :Vcc,and 9 to10pin is 360 ohm, 10 to 11pin is 2 k ohm sAPPLICATION NOTES • The ratio of the vertical synchronous pulse term and the vertical synchronous signal cycle Please adjust following expression. The vertical synchronous signal cycle / The vertical synchronous pulse term ≥ 75 (see following figure) Vertical Synchronous Signal cycle
Vertical Synchronous Pulse term
Vertical Synchronous Pulse term
• The pulse width of horizontal synchronous signal shall be set 3.7 to 5.7µ.s
Ver.4 -4-
NJW1303
T EQUIVALENT CIRCUIT No. NAME INSIDE EQUIVALENT CIRCUIT
VCC
No.
NAME
INSIDE EQUIVALENT CIRCUIT
VCC
1
Csync. Out
3k
10
20k 3k GND VCC
VCO Filter 2
GND VCC
10k
2
Sync. In
200
11
VCO Filter 1
GND
GND VCC
3 4 5 7 8
Vcc
VCC
12 VD HD SW BGP
DIGREF VCC 200
LPF
GND
6 13
DIGREF GND
VCC
9
VCO Out
200
200
14
VS
GND GND
Ver.4 -5-
NJW1303 MEMO
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
Ver.4 -6-
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