CF5705CF

CF5705 series NIPPON PRECISION CIRCUITS INC. Analog Watch Stepping Motor Driver OVERVIEW The CF5705 series is a low-current analog watch stepping motor driver CMOS IC with built-in 32.768 kHz crystal oscillator circuit. FEATURES s s 32.768 kHz crystal oscillator circuit CG and CD built-in −3.6 to −1.2 V operating supply voltage range s Operating current consumption • VSS = –1.55V, CD = 16pF: 250 nA (max) • VSS = –2.8V, CD = 26pF: 1000 nA (max) N ote: Current consumption depends on the built-in capacitor. s Reset function 4 Hz and subsequent frequency dividers are reset SERIES LINEUP P ad coordinates V ersion 1 CF5705AA CF5705BC CF5705AD CF5705AE CF5705CF CF5705CG XT VSS XT XT VSS VSS 2 XTN RESET XTN XTN TEST TEST 3 RESET XT RESET RESET XTN XTN 4 VSS XTN VSS VSS XT XT 5 TEST VDD TEST TEST VDD VDD 6 OUT2 OUT2 OUT2 OUT2 OUT2 OUT2 7 OUT1 OUT1 OUT1 OUT1 OUT1 OUT1 8 VDD TEST VDD VDD RESET RESET C y c le (Tcy/2) sec 1 250m 1 20 1 1 Motor Pulse (Tpw) sec 4.9m 23.4m 23.4m 5.9m 4.9m 3.9m Test (Tcy) sec 125m 125m 125m 125m 62.5m 62.5m Built-in capacitor 1 CG pF 4 4 4 4 4 4 CD pF 16 26 30 16 16 16 1 . Parasitic capacitance is included. Parasitic capacitance: C G = C D = 4 pF PART NUMBER GUIDE CF5705 Function(Motor, Built-in capacitor) Pad coordinate ORDERING INFORMATION D e vice C F 5 7 0 5 ×× P ackag e C hip form NIPPON PRECISION CIRCUITS—1 C F5705 series PAD DIMENSIONS (Top view) (1000,1060) NPC PAD COORDINATES Number 1 2 3 4 5 X ( µm ) 155 155 155 155 844 844 844 844 Y ( µm ) 785 597 363 175 175 363 694 882 1 2 3 4 (0,0) 8 7 6 5 Chip size: 1.000 × 1 .060 m m Chip thickness: 220 µm P ad size: 100 × 1 00 µm R e verse side: V D D l evel BLOCK DIAGRAM RESET TEST XT XTN PAD DESCRIPTION Name VSS VDD XT XTN OUT1 OUT2 RESET TEST Description Negative supply voltage Positive supply voltage Cr ystal oscillator circuit input Cr ystal oscillator circuit output Stepping motor driver output 1 Stepping motor driver output 2 Reset input Test mode select. 512 Hz clock output P in nu m b e r : Refer to Series lineup. HA5705 6 7 8 32kHz Oscillator Divider and Output buffer control Voltage regulator OUT1 OUT2 NIPPON PRECISION CIRCUITS—2 C F5705 series SPECIFICATIONS Absolute Maximum Ratings VDD = 0 V P arameter S upply voltage range Input voltage range Storage temperature range Symbol VSS V IN T s tg Rating −5 .0 to 0.3 V S S − 0 .3 to 0.3 −4 0 to 125 Unit V V °C Recommended Operating Conditions P arameter S upply voltage Operating temperature Symbol VSS To p g Rating −3 .6 to −1 .2 −2 0 to 75 Unit V °C Electrical Characteristics VDD = 0 V, Ta = 25 °C, X’tal CI = 55kΩ max Rating P arameter O perating supply voltage Symbol VSS N o load, V S S = – 1.55V, (C T R + C G ) = 1 5 pF, C D = 1 6 pF No load, V S S = – 2.8V, (C T R + C G ) = 2 4 pF, C D = 2 6 pF R E S E T : V RST = V DD , V SS = – 1.55V R E S E T : V R S T = V D D , V S S = – 2.8V Reset input resistance R RST V R S T = −1 .35 V, V S S = – 1.55V V R S T = −2 .6 V, V S S = – 2.8V R L = 2 k Ω , V S S = −1 .55 V R L = 1 k Ω , V S S = −2 .4 V Condition min −2 .0 – – – – 15 5 0.7 2.18 typ − 0.15 0.40 6 25 35 15 – 2.29 max −1 .2 0.25 1.00 – 100 60 50 – – V µA µA nA nA kΩ kΩ mA mA s R efer to the SERIES LINEUP ms ms −1 .3 F rom supply ON to 512 Hz output on T E S T V S S = −1 .2 → −3 .6 V, C T R = 5 p F Built-in C D Built-in C D a nd C G ( C G + C D ) < 6 2 pF – – –8 – 16 – 2 0.2 – – – 5 1 8 16 V s ppm/0.1V ppm ppm pF Unit Operating current consumption 1 ID D Reset input current IR S T M otor output current Motor output cycle Motor output cycle Motor output time 2 time 2 ( normal mode) ( test mode) IM O T TCY tC Y TPW V S TA T S TA ∆f/f ε’ C G , CD pulsewidth 2 voltage 2 Oscillator start Oscillator start time Frequency voltage deviation Frequency deviation 3 Internal capacitance 2 Refer to the SERIES LINEUP 1 . Current consumption is measured in the measurement circuit (see next page). 2. Refer to Series lineup. 3 . ε’ = [ f (1.55V) – f’0 ] / f ’0 ( C D = 1 6pF) ε’ = [ f (2.8V) – f’0 ] / f ’0 ( C D = 2 6pF) f’0 : O scillation frequency center value of Standard Deviation in the same measuring conditions NIPPON PRECISION CIRCUITS—3 C F5705 series Measurement Circuit VDD CTR RESET A IRST XT CD TEST XTN X'tal OUT1 VSS OUT2 A IMOT RL C r ystal: f = 32.768 kHz, CI = 20 k Ω , C 0 = 1.3pF, C1 = 2.6fF NIPPON PRECISION CIRCUITS—4 C F5705 series FUNCTIONAL DESCRIPTION Motor Output Waveform TPW VDD OUT1 VSS TPW VDD OUT2 VSS TCY/2 TCY/2 The motor output waveform cycle time and output pulsewidth are set by mask option. Reset Function T < TON RESET (open) VSS T > TON VDD TPW VDD OUT1 VSS VDD OUT2 VSS TCY/2 TCY/2 TD Reset operation A reset operation occurs when RESET is held HIGH (VDD) for a period of 93.75 ms or greater, otherwise Reset Release When the reset is released, the first output pulse occurs on the output pin opposite the output pin where the preceding motor drive output pulse occurred; first pulse occurs on OUT1 if previous motor drive pulse occurred on OUT2, and vice versa. A delay of TCY/2 − 0.125 to TCY/2 takes place from when reset is released until the first output pulse occurs. the reset is ignored. When the reset pulse is valid, the 4 Hz and subsequent frequency dividers are reset. NIPPON PRECISION CIRCUITS—5 C F5705 series Test Function T < Tch TEST VSS T > Tch VDD TCY/2 OUT1 TCY/2 tCY/2 tCY/2 VDD TPW VSS VDD OUT2 TPW TPW VSS Normal mode (TEST = open circuit) In test mode, a 512 Hz rectangular wave is output on TEST. Note that the output load (probe) must be greater than 10 MΩ and less than 20 pF. The motor Test mode 1 (TEST = VDD) Test mode 1 is invoked when TEST is held HIGH for a minimum of 2 cycles of the 512 Hz clock (TCH > 3.9 ms), otherwise it is ignored. In test mode Test mode 2 (TEST = VSS) Test mode 2 is a dedicated IC test mode. In test mode 2, the device operates at 32-times speed, with the supply voltage connected directly to the oscillator circuit. Note that if a reset input occurs, the internal operation is reset and device output stops. Once operation stops, normal operation is not restored until TEST is either open circuit or goes LOW. 1, high-speed motor output operation occurs, with the cycle time set by mask option to 62.5 or 125 ms. drive outputs on OUT1 and OUT2 continue to operate normally. NIPPON PRECISION CIRCUITS—6 C F5705 series N IPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9815AE 2000.07 NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS—7