CF5707CG

CF5707CG Analog Watch Stepping Motor Driver OVERVIEW The CF5707CG is a 32.768kHz reference frequency crystal oscillator CMOS LSI for stepping motor drives in low-current consumption analog watches. FEATURES I PAD LAYOUT (Top view) I I NPC SA5707 I 32.768kHz crystal oscillator circuit • CG = 5pF, CD = 17pF built-in −1.2 to −2.0V operating supply voltage range 150nA (typ) to 250nA (max) operating current consumption Reset function • Reset in 4Hz frequency steps (830,970) VSS TEST 1 2 3 4 8 7 6 5 RESET OUT1 OUT2 VDD ORDERING INFORMATION Device CF5707CG Package Chip form XTN XT (0,0) Chip size: 830 × 970µm Chip thickness: 220 ± 30µm Pad size: 98 × 98µm Reverse side: VDD level SEIKO NPC CORPORATION —1 CF5707CG BLOCK DIAGRAM RESET TEST XT XTN 32kHz oscillator circuit Frequency divider circuit OUT1 Fixed-voltage circuit Output waveform controller OUT2 PAD DESCRIPTION/DIMENSIONS Number 1 2 3 4 5 6 7 8 Name VSS TEST XTN XT VDD OUT2 OUT1 RESET Negative supply voltage Test mode switch control. 512Hz clock output during normal operation Crystal oscillator circuit output Crystal oscillator circuit input Positive supply voltage Stepping motor driver output 2 Stepping motor driver output 1 Reset input Description Dimensions [µm] X 165 165 165 165 665 696 696 665 Y 828 598 371 141 139 342 627 830 SEIKO NPC CORPORATION —2 CF5707CG SPECIFICATIONS Absolute Maximum Ratings VDD = 0V Parameter Supply voltage range Input voltage range Storage temperature range Symbol VSS VIN Tstg Rating −5.0 to 0.3 VSS − 0.3 to 0.3 −40 to 125 Unit V V °C Recommended Operating Conditions Parameter Supply voltage Operating temperature Symbol VSS Topr Rating −2.0 to −1.2 −20 to 75 Unit V °C Electrical Characteristics VDD = 0V, VSS = −1.55V, Ta = 25°C, (CTR + CG) = 16pF, CD = 17pF (including parasitic capacitance), X’tal CL = 8pF, CI = 55kΩ max Rating Parameter Operating supply voltage1 Operating current consumption Reset input current2 Reset input resistance Test input current3 Motor output current1 Normal mode Movement period Test mode Motor pulsewidth Oscillator startup voltage Oscillator startup time4 Frequency voltage deviation Frequency deviation5 Internal capacitance6 1. 2. 3. 4. 5. Symbol VSS IDD IRST RRST IIH IIL IMOT TCY tCY TPW VSTA TSTA ∆f/f ε’ CG CD (CG + CD) < 62pF, CG, CD min 5pF VSS = −1.2 to −2.0V, CTR = 5pF No load VRST = VDD VRST = −1.35V VIH = 0V VIL = −1.55V RL = 2kΩ, VSS = −1.55V Condition min −2.0 − − 15 − − ± 0.7 − − − −1.3 − − −8 − − typ −1.55 0.15 6 35 1 1 − 2 62.5 3.9 − 2 0.2 − 5 17 max −1.2 0.25 − 60 3 3 − − − − − 5 1 8 − − V µA nA kΩ µA µA mA sec msec msec V sec ppm/0.1V ppm pF pF Unit Parameters measured using the following measurement circuits. The current flowing from the VDD pin into the RESET pin. IIH, IIL are the input current values with clock stopped when TEST is H, L, respectively. The time interval from when power is applied until the 512Hz output on the TEST pin. ε’ = [f (1.55V) − f ’0] / f ’0 where f’0 is the oscillator center frequency under the same measurement conditions. 6. CG is measured between VDD − XT, and CD is measured between VDD − XTN. Measurement conditions: f = 40kHz, 50mVp-p SEIKO NPC CORPORATION —3 CF5707CG Measurement Circuit VDD CTR RESET A IRST XT CD TEST A IIH, IIL XTN X'tal OUT1 VSS OUT2 A IMOT RL X’ tal parameters: f = 32.768kHz, CI = 20kΩ, C0 = 1.3pF, C1 = 2.6fF SEIKO NPC CORPORATION —4 CF5707CG FUNCTIONAL DESCRIPTION Motor Output Waveform TPW VDD OUT1 VSS TPW VDD OUT2 VSS TCY/2 TCY/2 Watch movement period Tcy = 2s, Pulsewidth Tpw = 3.9ms Reset Function T < TON RESET (open) VSS T > TON VDD TPW VDD OUT1 VSS VDD OUT2 TCY/2 TCY/2 TD VSS Reset operation The device reset condition occurs when the RESET pin goes HIGH (VDD), and the circuits are reset in 4Hz frequency divider steps. Note, however, that RESET must stay HIGH for 93.7ms or longer, otherwise the reset input is ignored. Reset release operation If the last pulse before reset was output on OUT1, then the first pulse after reset is released is output on OUT2, and vice versa. The time interval, TD, after reset is released until the first pulse output occurs is TCY/2 − 0.125s to TCY/2. SEIKO NPC CORPORATION —5 CF5707CG Test Function T < Tch TEST VSS T > Tch VDD TCY/2 OUT1 TCY/2 tCY/2 tCY/2 VDD TPW VSS VDD OUT2 TPW TPW VSS Test mode 1 Normal mode (TEST = open) A 512Hz rectangular waveform is output on the TEST pin. Note that the load resistance is 10MΩ or greater and capacitance is 20pF or less. Normal watch movement waveforms are output on OUT1 and OUT2. Test mode 1 (TEST = VDD) The device switches to test mode 1 when the TEST pin goes HIGH (VDD). Note, however, that the TEST must stay HIGH for 2 cycles of the 512Hz clock (TCH > 3.9ms), otherwise the input is ignored. In test mode 1, highspeed watch movement period (TCY = 62.5ms) is selected. Test mode 2 (TEST = VSS) (Note. IC test mode only) The device switches to test mode 2 when the TEST pin goes LOW (VSS). In test mode 2, operation occurs at 32-times speed. Furthermore, if an input on RESET occurs, all internal registers are cleared and circuit operation stops. Once in this condition, the circuit remains stopped until the TEST pin becomes open circuit or HIGH level (VDD). SEIKO NPC CORPORATION —6 CF5707CG Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter “Products”) are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from SEIKO NPC CORPORATION (hereinafter “NPC”). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. SEIKO NPC CORPORATION 15-6, Nihombashi-kabutocho, Chuo-ku, Tokyo 103-0026, Japan Telephone: +81-3-6667-6601 Facsimile: +81-3-6667-6611 http://www.npc.co.jp/ Email: sales@npc.co.jp NC0419CE 2006.09 SEIKO NPC CORPORATION —7